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United States Patent m

Wishart et al.

[ii]

[45]

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US005293329A

Patent Number:
Date of Patent:

1111

5,293,329 Mar. 8, 1994

[54] APPARATUS FOR AND METHOD OF DIGITAL SIGNAL PROCESSING

[75] Inventors: Alexander W. Wishart; Francis J.

Lake; Paul C. Marston, all of

Stevenage, Great Britain

[73] Assignee: British Aerospace Public Limited Company, London, England

[21] Appl. No.: 839,555

[22] Filed: Feb. 24,1992

[30] Foreign Application Priority Data

Feb. 28, 1991 [GB] United Kingdom 9104186

[51] IntCl.5 G06F 15/31

[52] U.S. CI 3«4/724.13; 364/724.1

[58] Field of Search 364/724.13, 724.1, 726

[56] References Cited

U.S. PATENT DOCUMENTS

4,691,292 9/1987 Rothweiler 364/724.13

4,829,378 5/1989 LeGall 364/724.13 X

4,918,524 4/1990 Ansari et al 364/724.1 X

FOREIGN PATENT DOCUMENTS

2241853 11/1991 United Kingdom .

OTHER PUBLICATIONS

Michael R. Portnoff, "Implementation of the Digital Phase Vocoder Using the Fast Fourier Transform", IEEE Transactions on Acoustics, Speech, and Singal Processing, vol. ASSP-24, No. 3, Jun. 1976, pp. 243-248.

S. Joseph Campanella et al., "A Flexible On-Board

[blocks in formation]

Apparatus for and a method of digital signal processing utilises a technique known as sub-band decomposition and reconstruction. A plurality of input channels are provided each of which is mixed with a vernier frequency correction. In a multiplexer implementation, a fast fourier transform (FET) weighted overlap-add demultiplexer is provided for decomposing each input channel into sub-bands. The sub-band outputs are decimated by a factor to the common input sampling rate of a multiplexer, the sub-bands from each channel then being passed into the appropriate ports of an FFT weighted overlap-add multiplexer by a switch matrix. The multiplexer reconstructs the individual channels, interpolates each channel up to the output sampling rate of the FDM signal, mixes each channel up to its assigned carrier frequency in the frequency division multiplexed (FDM) (FDM) and multiplexes the channels. This provides a computationally efficient architecture with the flexibility to accommodate channels of differing bandwidths.

13 Claims, 3 Drawing Sheets

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U.S. Patent Mar. 8, 1994 Sheet 2 of 3 5,293,329

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U.S. Patent Mar. 8, 1994 Sheet 3 of 3 5,293,329

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