Adjustable elasticity FIFO buffer with preload value having a number of ...

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ADJUSTABLE ELASTICITY FIFO BUFFER WITH PRELOAD VALUE HAVING A NUMBER OF STORAGE CELLS EQUAL TO FREQUENCY OFFSET TIMES BETWEEN DATA UNITS IN A DATA STREAM

Inventors: Andrew Castellano, Laguna Beach, CA (US); Pinghua Peter Yang, Saratoga,

CA (U S)

Assignee: Broadcom Corporation, Irvine, CA
(US)

Notice: Subject to any disclaimer, the term of this

patent is extended or adjusted under 35 U.S.C. 154(b) by 461 days.

App1.No.: 11/798,467

Filed: May 14, 2007
Prior Publication Data
US 2007/0214291A1 Sep. 13, 2007

Related U.S. Application Data

Division of application No. 10/811,126, filed on Mar. 29, 2004, now Pat. No. 7,234,007.

Provisional application No. 60/502,674, filed on Sep. 15, 2003, provisional application No. 60/549,940, filed on Mar. 5, 2004.

Int. Cl.

G06F 3/00 (2006.01)

G06F 3/02 (2006.01)

G06F 3/05 (2006.01)

U.S. Cl. .............. .. 710/29; 710/33; 710/52; 710/53; 710/57; 710/58; 710/60; 710/310

Field of Classification Search ................ .. 711/100;

710/29, 33, 52, 58, 60, 53, 57, 310 See application file for complete search history.

(56) References Cited U.S. PATENT DOCUMENTS 4,600,945 A 7/1986 Bolger 5,337,315 A * 8/1994 Ehrlich ....................... .. 370/505 5,884,099 A * 3/1999 Klingelhofer 5,918,073 A * 6/1999 Hewitt ...... .. .. 6,016,521 A * 1/2000 Matsubara .................... .. 710/34 6,233,629 B1 5/2001 Castellano 6,408,349 B1 6/2002 Castellano 6,594,329 B1 * 7/2003 Susnow ...................... .. 375/372 6,611,884 B2 8/2003 Castellano (Continued) FOREIGN PATENT DOCUMENTS WO WO97/17777 5/1997 (Continued) OTHER PUBLICATIONS

Budruk, Ravi; Anderson, Don; and Shanley, Tom; PCI Express System Architecture; Mindshare Inc.; 2004; pp. 434,436-439,442-443.*

(Continued) Primary Examiner * Tammara Peyton

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A method of processing a data stream through a buffer is performed in accordance with a write clock and a read clock. The buffer has a plurality of sequentially numbered storage cells. The method includes the steps of selecting an initial preload value, with the selecting step including determining a product of the maximum frequency offset between the write and read clocks, and a maximum time between arbitrary symbols in the data stream. The storage cells then receive data units in response to a write pointer. Data units are then provided from the storage cells in response to a read pointer.

ABSTRACT

16 Claims, 7 Drawing Sheets