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U.S. Patent Nov. 1,2011 Sheet 4 0f5 US 8,049,569 B1 ,- 300
CIRCUIT AND METHOD FOR IMPROVING THE ACCURACY OF A CRYSTAL-LESS OSCILLATOR HAVING DUAL-FREQUENCY MODES
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to clock signal generation and, more particularly, to an improved clock generation circuit and method for operating a crystal-less oscillator having at least two distinct frequency modes.
2. Description of the Related Art
The following descriptions and examples are given as background only.
Many integrated circuits (ICs) feature on-chip oscillators. For example, many processor-based systems have internal oscillators, which enable the processor (e.g., a CPU or MCU) to generate its own clock signal without the need for an extemal oscillator. In some cases, the processor may be configured to operate at two different clock frequencies. In one example, the processor may use a high frequency clock during “awake” modes and a low frequency clock during “sleep” modes. In another, the processor may operate at more than one frequency while awake to trade off speed and power consumption.
In some cases, a single oscillator may be used to generate the high frequency and low frequency clock signals. For example, some systems may include a crystal oscillator for generating the high frequency clock, and a divider for dividing down the high frequency clock to generate the low frequency clock. As known in the art, crystal oscillators use the mechanical resonance of a vibrating crystal of piezoelectric material (typically quartz) to create very precise frequencies. Although crystal oscillators are used in many high-precision applications (e.g., watches, clocks, radio transmitters and receivers, and communication devices such as Local Area Network (LAN) interfaces), they are generally more costly, consume larger amounts of power and require longer start-up times than crystal-less oscillators. Therefore, crystal oscillators may not be desired in all applications.
In other cases, separate oscillators may be used to generate the high frequency and low frequency clock signals. For example, a system may include a high-precision crystal oscillator for generating the high frequency clock and a separate, crystal-less oscillator for generating the low frequency clock. As the name implies, “crystal-less” oscillators do not use crystals for generating clock frequencies. Crystal-less oscillators are generally less accurate than crystal oscillators and other oscillators built with other extemal components, such as Surface Acoustic Wave (SAW) devices and ceramic resonators. However, crystal-less oscillators are also less expensive and consume less power than their high-precision counterparts. For this reason, crystal-less oscillators are commonly used to provide low frequency clock signals during low power and/or sleep modes, and main clock signals in many power sensitive applications.
Various methods have been proposed to improve the accuracy of crystal-less oscillators. In one method, a crystal oscillator may be used to calibrate or tune a crystal-less oscillator. In some cases, both oscillators may be provided on-chip, as described above. In other cases, an intemal crystal-less oscillator may be calibrated by an extemal crystal (i.e., an off-chip crystal oscillator coupled to the intemal oscillator for calibration purposes). However, since the method requires at least one crystal oscillator for calibration purposes, it cannot be used to provide a low cost and/or low power solution to the
problem. The extemal crystal also consumes space on the circuit board and increases the pin count on the IC package (e.g., two extra pins may be needed to connect the extemal crystal to the package).
A need remains for a highly accurate, multi-frequency, on-chip oscillator. More specifically, a multi-frequency, crystal-less oscillator is needed on-chip to avoid the disadvantages associated with high-precision crystal oscillators (such as, e.g., high cost and power consumption, additional space consumption and extra pins). An improved circuit and method for improving the accuracy of a crystal-less oscillator is also needed. In a preferred embodiment, the improved circuit and method would improve the accuracy of a crystalless oscillator without using high-precision crystal oscillators or external clock signals for calibration purposes.
The following description of various embodiments of clock generation circuits, systems and methods is not to be construed in any way as limiting the subject matter of the appended claims.
According to one embodiment, a clock generation circuit is provided for improving the accuracy of a low power oscillator circuit contained therein. In general, the clock generation circuit may include a crystal-less oscillator having at least two distinct frequency modes, including a low frequency mode and a high frequency mode. In some cases, the crystal-less oscillator may be adapted to generate a first clock frequency with relatively high accuracy and a second clock frequency with relatively low accuracy. A calibration and control circuit is included within the clock generation circuit for increasing the accuracy of the second clock frequency. As described in more detail below, the calibration and control circuit may increase accuracy by using the first clock frequency to calibrate the second clock frequency, which is generated by the same crystal-less oscillator. In one implementation, the first clock frequency may be significantly lower than the second clock frequency. Examples of crystal-less oscillators adapted to provide highly accurate, low frequency signals and less accurate, high frequency signals include, but are not limited to, relaxation oscillators and ring oscillators.
In some implementations, the calibration and control circuit may include a frequency multiplier, a pair of counters and control logic. The frequency multiplier may be coupled to the crystal-less oscillator for generating a frequency multiplied version of the first clock signal. For example, the frequency multiplier may be enabled for a short period of time to generate a third clock frequency by multiplying the first clock frequency by an amount, which enables the third clock frequency to be relatively close to the second clock frequency. In some cases, a PLL may be used to provide accurate frequency multiplication. During low frequency modes, the PLL may be disabled to reduce power consumption in the clock generation circuit. The first clock frequency generated by the crystal-less oscillator may be used for clocking downstream components during this time.
The PLL may be enabled for a short period of time during high frequency modes to generate the third clock frequency, as mentioned above. More specifically, the PLL may be run in a closed loop mode until the third clock frequency is generated from the first clock frequency. The PLL may then be run in an open loop mode to maintain the third clock frequency while: (i) the crystal-less oscillator is switched from the first clock frequency to the second clock frequency, and (ii) a frequency difference between the third clock frequency and the second clock frequency is determined. After the fre