A field programmable gate array (FPGA) is provided that can selectively accept or reject selected software (macros). Specifically, configuration data for the FPGA is passed through a configuration port to a decoder. The decoder processes the configuration data to detect locked macros. If a locked macro...http://www.google.co.uk/patents/US6381732?utm_source=gb-gplus-sharePatent US6381732 - FPGA customizable to accept selected macros
