A method and apparatus for resuming operations from a low latency wake-up low power state. One embodiment provides a system including a processor, an operating system, and a memory subsystem that requires initialization commands to exit a memory low power state. Control logic detects exit from an operating...http://www.google.co.uk/patents/US6886105?utm_source=gb-gplus-sharePatent US6886105 - Method and apparatus for resuming memory operations from a low latency wake-up low power state
