A data in/out channel control circuit for a semiconductor memory device with multi-bank structure includes a plurality of split banks each provided with memory cell arrays, each split bank having a plurality of bit line pairs and a sub in/out line pair connected through a column selection...http://www.google.co.uk/patents/US5761146?utm_source=gb-gplus-sharePatent US5761146 - Data in/out channel control circuit of semiconductor memory device having multi-bank structure 