An integrated circuit including a dynamic random access memory (DRAM) array is disclosed herein in which a DRAM cell includes a storage capacitor within a deep trench, a transistor having a channel extending along a sidewall of the deep trench and a gate conductor within the deep trench, and a wordline...http://www.google.co.uk/patents/US20040036100?utm_source=gb-gplus-sharePatent US20040036100 - STRUCTURE AND METHOD OF FABRICATING EMBEDDED DRAM HAVING A VERTICAL DEVICE ARRAY AND A BORDERED BITLINE CONTACT
