A system includes a first circuit that generates error-correction (EC) bits based on received data bits. Memory includes M data portions that store the data bits, where M is an integer greater than one, and M error-correction (EC) portions that store the EC bits. An input receives test data bits. A switching...http://www.google.co.uk/patents/US7478308?utm_source=gb-gplus-sharePatent US7478308 - Error-correction memory architecture for testing production
