Methods and apparatus are described relating to a system-on-a-chip which includes a plurality of synchronous modules, each synchronous module having an associated clock domain characterized by a data rate, the data rates comprising a plurality of different data rates. The system-on-a-chip also includes...http://www.google.co.uk/patents/US20060239392?utm_source=gb-gplus-sharePatent US20060239392 - Asynchronous system-on-a-chip interconnect
