Disclosed are various techniques for deploying multiple processing resources, operating in parallel, to compile electronic designs. The disclosed methods identify "compilation tasks" that can be performed in isolation from the remainder of a large "compilation project." When one of these stand alone...http://www.google.co.uk/patents/US6080204?utm_source=gb-gplus-sharePatent US6080204 - Method and apparatus for contemporaneously compiling an electronic circuit design by contemporaneously bipartitioning the electronic circuit design using parallel processing
