WO2010068126A1

WO2010068126A1 - A method of encoding and decoding of synchronous serial transmission, particularly for low power devices and fiber optics media

Info

Publication number: WO2010068126A1
Application number: PCT/PL2009/000102
Authority: WO
Inventors: Rafal Pietrak
Original assignee: Rafal Pietrak
Priority date: 2008-12-12
Filing date: 2009-12-01
Publication date: 2010-06-17
Also published as: PL386787A1; PL216621B1

Abstract

A method of encoding and decoding of serially transmitted data is disclosed for telecommunication links where at least one neutral symbol is available, comprising of alternatively sending payload symbols interleaved with neutral symbols. According to present invention clock is recovered from such encoded transmission by detection of neutral symbols on the line, allowing receiver to operate without precise local reference clock generators or phase locked loop. In case when physical layer have two or more neutral symbols available, present invention allows for transport of additional symbols (like frame demarcation symbols), and for multiplexing of two separate payload data- streams at the level of physical layer. Also disclosed is a method of encoding payload data, transport clock and frame demarcation symbols, when transmission link consists of only two physical circuits.

Description

A method of encoding and decoding of synchronous serial transmission, particularly for low power devices and fiber optics media.

The field of invention is encoding and decoding of synchronous serial transmission, particularly for low power devices and fiber optics media. There are many known methods of encoding serially transmitted data, among those there are: NRZI, NRZ, HDB3, B8SZ, 8blθb (Patent US4 486 739), 64b66b (Patent EP1_133_123). When emitter or receiver should be particularly simple, the clock signal is transported independently from the data over a separate circuit. A method known as I²C, which defines start-of-frame symbol and end-of-frame symbol on a dual circuit transmission line, have throughput limitations, resulting from the way it defines its symbols. Other encoding methods, with clock signal is transmitted over a separate circuit, known to yield better throughput then I²C, like SPI line code, need an additional circuit to transport start-of-frame and/or end-of-frame symbols.

Serial line code in accordance with present invention is capable of transporting three streams of events, namely: data bits, transmission clock and additional symbols like frame demarcation, using only two physical circuits, with throughput comparable to that of an SPI line code.

According to present invention, neither clock, nor data is carried over a dedicated circuit, contrary to known multiple-circuit line codes e.g.: I²C, SPI or others. According to present invention, data bits D (as of fig.l) are encoded so, that data bit value 0 is encoded as a pulse on circuit AO, while data bit value 1 is encoded as a pulse on circuit Al, with clock signal being implicitly encoded as width of those pulses. End-of-frame symbol (E), according to present invention, is encoded as the first point in time, when both circuits are concurrently excited. The start-of-frame symbol (B) is encoded as the first point in time, when there is no excitation on either of the circuits of transmission line. Subsequent concurrent circuit excitation (Ex symbols) following first such event (E); and subsequent lack of any circuit excitation (denoted as Bx, but not presented on drawings) following first such event (B) - both are defined as line neutral symbols. According to present invention, each of those symbols can stay unchanged on the transmission line as long as it's deemed necessary without limitations; yet, this will not degrade recipient's ability to correctly recover transmitted symbols or clock.

According to present invention, clock recovery (C-dark and C-bright according to fig.2) is achieved by detection of neutral symbols (Bx or Ex) on the transmission line., In case when transmission line consists of two physical circuits, clock recovery between symbols B and E (fig.2: C-bright) according to present invention is achieved by means of logical sum of signals on circuits AO and Al. In that same physical setup, clock recovery in time between symbols E and B (C-dark) is achieved by logical multiplication (AND operation) of signals on circuits AO and Al.

According to present invention, transmitted data (D-dark and D-bright on fig.2) is recovered in an R-S flip-flop which has its R input connected to circuit AO, and its S input connected to circuit Al. Attacking edges of pulses on A0/A1 circuits set that flip- flop state to the value of incoming data bit, while tail edges of those pulses are active edges of the recovered clock and are used to latch the recovered data at the receiver.

The advantage of using the encoding and decoding method according to present invention is that the number of circuits between transmitter and receiver is limited to two circuits only - just like in case of I²C line encoding. Yet, due to the fact, that data is fetched at the active edge of the recovered clock, the achievable data rates is comparable to that of an SPI line encoding.

Further, due to the method of encoding serial transmission according to present invention, there are two independent transport channels available between transmitter and receiver - one in "bright frames", which come between B symbol and E symbol, and the other one in "dark frames" which come between E and B symbols. Those separate channels can be used as left and right channels of a stereo sound transmission or one channel may carry PCM telephone voice channel, while the other may carry associated call signaling. Serial transmission encoded according to present invention does not need to be scrambled, since receiver ability to recover the clock signal does not degrade when long trains of zeros or ones arrive.

Clock signal recovery method, in accordance with present invention, allows for moderation of rising and falling slopes of transmission signal, and in consequence reduction of EMS emission generated by transmission circuits, while at the same time limiting of the driving power of line output buffers. Also, the clock recovery method according to present invention makes it unnecessary for a transmitter to have a precise bit-rate clock, and allows the receiver to avoid sophisticated clock recovery circuitry like: precise local reference clock generators or PLL (Phase Locked Loop). It's also unnecessary to pre-configure transmitter and receiver for the same baud rates.

Line codes according to present invention is applicable also when there is only one circuit between transmitter and receiver if only its physical layer allows for definition of two independent neutral symbols Bx and Ex. In that case, encoding of serial transmission according to present invention is achieved by sending one of two available neutral symbols, after every transmitted payload symbol. Clock recovery according to present invention is possible in such case if there is a circuit detecting those two neutral symbols. Detection of Bx symbols will then produce recovered bright clock (C-bright) of the transmission, while detection of Ex symbols will give its dark clock (C-dark). Circuit presented on fig.2 can also be used to recover transmitted data in case, when this single wire transmission has just two other symbols - one representing bit value zero, the other bit value one. In such case, detectors sensing symbol representing bit value one should activate circuit Al, while detector sensing symbol representing bit value of zero should activate circuit AO. When there is only one neutral symbol defined at the physical layer of transmission line, clock encoding and clock recovery according to present invention is also possible. However in such case, it's not possible to transport special symbols according to present invention, so payload framing if required, will have to be provided by other means.

Fig.1 show dark frame transmitted some time after earlier transmitted bright frame ended. In the interim between those frames, transmission line is inactive.

Line encoding according to present invention allows for clock signal being fed into the line even in time, when there is no payload to be transmitted. This can be realized by convention taken at the higher level of protocol stack, like discarding of any frames of designated sizes (like all frames one bit long, or all frames shorter then N bits). Those frames of designated sizes do not necessarily have to be discarded, but have to be distinguished at the receiver as separate (from dark frames and bright frames) data streams using their frame size instead of frame demarcation special symbols. When line code according to present invention is used by the Ethernet (IEEE-802.3) MAC device to connect to its PHY, instead of traditional Mϋ/RMII interface, frames shorter then 512 bits may be used to transport clock signal or as additional data streams, since frames shorter then that may not be emitted/received by PHY at its Ethernet side. One such additional data stream may replace PHY control port, traditionally implemented using separate I²C link. Data streams separated from transmission line only by their frame size, do not have start-of-frame or end-of-frame symbols, so when this is required, it have to be provided at the higher level of protocol stack, like by the HDLC line code within each such data stream. Since clock signal can be continuously fed into the line, even when payload is not available for transmission, clock signal recovered from the line according to present invention may be used by the simplest receivers as their main clock source, thus saving them clock generating circuitry.

Fig.1 apart from sample bright frame and dark frame, shows also two consecutive one-bit-frames designated by S.

Application of present invention to fiber optics transmission allows for lower power dissipation in light emitting components.

In current invention disclosure, a word payload refers to a stream of bits transported between sender and receiver. In current invention disclosure, a word frame refers to a block of symbols beginning with a start of frame symbol and ending with an end of frame symbol - in some systems, the same symbol plays both start-of-frame role and end-of-frame role. Symbols transmitted between frame demarcation symbols are referred to as payload symbols. In current invention disclosure, a phrase transmitted symbol refers to any state of physical medium or any designated change of state of physical medium of a circuit. The process of encoding for serial transmission assigns binary values (one- or multi-bit in size) or other designated information (like frame demarcation - e.g. an end-of-frame or a start-of-frame or any other frame related point, which is significant for frame transmission), to a particular transmitted symbol. In present invention disclosure, symbols assigned to payload data are referred to as payload symbols, other symbols are referred to as neutral symbols. Those neutral symbols that carry additional information (like frame demarcation) are referred to as special symbols.

In current invention disclosure, a phrase circuit refers to any physical medium used between transmitter and receiver - a connecting wire, a radio link, a radio guide or optical fiber, all are examples of circuits. Here, fiber optics media can have separate circuits realized as left and right light polarization of the very same wavelength inside of a single fiber.

In current invention disclosure, a phrase excitation pulse refers to a short change in physical state of a circuit which is immediately followed by a return of that state to its previous value. Here, in case of a circuit build from conducting wire an excitation pulse can be, a change in applied voltage, a change in floating current, or a reverse of either of those. Also here, an excitation pulse on a fiber optic circuit can be a blink of a light or a moment when fiber illumination is temporarily off.

I²C i SPI are industry recognized trademarks.

Claims

W h a t i s c l a i m e d i s :

1. A method of encoding of serial transmission when at least one neutral symbol is defined at the physical layer of a transmission line, characterized in that every payload symbols emission is interleaved with an emission of any of the defined neutral symbols.

2. A method of claim 1 when at least two neutral symbols Bx and Ex (see fig.l) are defined at the physical layer of a transmission line, characterized in that a start of frame symbol B is encoded as the first of the train of consecutive Bx symbols when payload symbols are not taken into account, and an end of frame symbol E is encoded as the first of the train of consecutive Ex symbols when payload symbols are not taken into account.

3. A method of clock recovery from serial transmission encoded as of claim 1, characterized in that transmission clock is recovered by the detection of neutral symbols at the transmission line so, that one logic level of the clock signal indicates that a neutral symbol is present on the transmission line, while the other logic level of the clock signal indicates that neutral symbol is not currently present there.

4. A method of claim 1, when transmission line consists of two separate physical circuits, characterized in that a bit value of zero is transmitted as a pulse on circuit AO (see fig.l), and a bit value of one is transmitted as a pulse on circuit Al.

5. A method of claim 1, when transmission line consists of two separate physical circuits, characterized in that neutral symbols are transmitted when both circuits have identical physical state, e.g. one neutral symbol is transmitted when AO and Al circuits (see fig.l) are both concurrently excited, and the other neutral symbol is transmitted when both AO and Al circuits are concurrently de-excited.