WO2010038452A1 - リードフレーム基板とその製造方法、及び半導体装置 - Google Patents
リードフレーム基板とその製造方法、及び半導体装置 Download PDFInfo
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- WO2010038452A1 WO2010038452A1 PCT/JP2009/005041 JP2009005041W WO2010038452A1 WO 2010038452 A1 WO2010038452 A1 WO 2010038452A1 JP 2009005041 W JP2009005041 W JP 2009005041W WO 2010038452 A1 WO2010038452 A1 WO 2010038452A1
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- semiconductor element
- connection terminal
- outer frame
- lead frame
- external connection
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Definitions
- the present invention relates to a semiconductor package substrate and a semiconductor device suitable for mounting a semiconductor element, and more particularly to a lead frame substrate, a manufacturing method thereof, and a semiconductor device using them.
- outer leads for connection to a printed wiring board are arranged on the side surface of the semiconductor package.
- the lead frame forms a desired photoresist pattern on both sides of the metal plate, and etches from both sides, thereby fixing the semiconductor element mounting part, the inner lead and outer leads that are the connection parts with the semiconductor element electrode, and these.
- An outer frame part can be obtained. Moreover, it can obtain also by the punching process by a press other than an etching construction method.
- the electrode of the semiconductor element and the inner lead are electrically connected using a gold wire or the like. Thereafter, the vicinity of the semiconductor element including the inner lead portion is sealed with resin, the outer frame portion is cut, and the outer lead is bent as necessary.
- the outer leads placed on the side surfaces in this way are limited to 200 to 300 pins in a package size of about 30 mm square in view of the processing capability for miniaturization.
- the number of electrodes of a semiconductor element gradually increases, the number of terminals can no longer be accommodated in a lead frame type semiconductor package having outer leads on the side surfaces.
- the external connection terminal with a printed wiring board such as a grid array) type has been replaced with a semiconductor package arranged in an array on the bottom surface of the package board.
- the board used for these is drilled in a double-sided copper-coated glass epoxy board with a drill, the inside of the hole is made conductive by plating, one side is a terminal for connecting to the electrode of the semiconductor element, the other side It is common to form external connection terminals arranged in an array.
- the manufacture of these substrates is complicated and expensive, and has a problem that the reliability is inferior to that of a lead frame type package because plating is used for wiring connection in the substrate. is there.
- Patent Document 1 a BGA type semiconductor package structure using a lead frame using a process of etching the lead frame from both sides is disclosed.
- connection terminals for the semiconductor element electrodes are formed on the surface, and the external connection terminals are formed in an array on the other surface.
- FIGS. 5A and 5B A cross-sectional view of a prior art lead frame substrate is shown in FIGS. 5A and 5B.
- the length of the wiring 110 on the semiconductor element electrode connection terminal 109 side becomes longer.
- This wiring is produced by half-etching a metal plate. The width and thickness of the wiring are small, and there is a problem that the yield is very poor due to the occurrence of bending or bending in the steps after the etching.
- FIG. 6C shows the state of the resin layer in the vicinity of the external connection terminal that has been heat-cured after printing. As schematically shown in FIGS. 6A to 6C, there is a concern that bubbles are formed beyond the external connection terminal in the printing direction (indicated by arrow D1).
- the present invention has been invented in view of such problems of the prior art, can cope well with an increase in the number of electrodes of a semiconductor element, does not contain bubbles, has high reliability, and is manufactured and has a semiconductor package. It is an object of the present invention to provide a lead frame substrate that can be stably assembled, a method for manufacturing the same, and a related semiconductor device.
- a metal plate having a first surface and a second surface, a semiconductor element mounting portion, a semiconductor element electrode connection terminal, and a first element formed on the first surface.
- the lead frame substrate is characterized in that at least one protrusion is formed on the side bottom of the first surface.
- a semiconductor element mounting portion, a semiconductor element electrode connection terminal, and an outer frame portion are formed on the first surface of the metal plate, and the semiconductor plate is formed on the second surface of the metal plate.
- a photoresist pattern for forming an external connection terminal connected to the device electrode connection terminal and an outer frame portion is formed, and the photoresist pattern for forming the external connection terminal has a protruding shape at one or more places.
- a hole not penetrating is formed in the exposed portion of the metal plate where the metal plate of the second surface is exposed by etching, and the direction of the protruding portion from the external connection terminal is formed in the hole.
- a liquid pre-mold resin is applied to the resin, a resin layer is formed by heat curing, and the first surface is etched to be electrically connected to the semiconductor element mounting portion and the external connection terminal.
- a manufacturing method of a lead frame substrate, and forming a semiconductor element electrode connecting terminal, and an outer frame portion is a manufacturing method of a lead frame substrate, and forming a semiconductor element electrode connecting terminal, and an outer frame portion.
- a metal plate having a first surface and a second surface, a semiconductor element mounting portion, a semiconductor element electrode connection terminal, and a first element formed on the first surface.
- a lead frame substrate having at least one projecting portion formed on a side bottom of the first surface; a semiconductor element mounted on the lead frame substrate; and the lead frame substrate and the semiconductor by wire bonding
- the electrical connection with the device is made,
- a semiconductor device comprising.
- external connection terminals for connecting to a printed wiring board can be arranged in an array on the entire back surface of the lead frame substrate, which can cope with an increase in the number of terminals of semiconductor elements. Moreover, since it is a board
- FIG. 3B is a cross-sectional view in the next step of FIG. 1B, illustrating an example of the method for manufacturing the lead frame substrate according to the embodiment of the present invention.
- FIG. 3A is a cross-sectional view in the next step of FIG. 1C, showing an example of the method for manufacturing the lead frame substrate of the embodiment of the present invention.
- FIG. 2C is a cross-sectional view in the next step of FIG. 1D, showing an example of the method for manufacturing the lead frame substrate of the embodiment of the present invention.
- FIG. 1B is a cross-sectional view in the next step of FIG. 1B, illustrating an example of the method for manufacturing the lead frame substrate according to the embodiment of the present invention.
- FIG. 3A is a cross-sectional view in the next step of FIG. 1C, showing an example of the method for manufacturing the lead frame substrate of the embodiment of the present invention.
- FIG. 2C is a cross-sectional view in the next step of FIG. 1D, showing an example of the method for manufacturing
- FIG. 8B is a cross-sectional view in the next step of FIG. 1E, illustrating an example of the method for manufacturing the lead frame substrate according to the embodiment of the present invention. It is a top view which shows the photoresist pattern in the lead frame board
- FIGS. 1A to 1F A schematic cross section of the manufacturing process of the lead frame substrate is shown in FIGS. 1A to 1F.
- Photoresist patterns 2 are formed on both surfaces of the metal plate 1 used for the lead frame (FIG. 1B). 1A to 1F, the pattern of the semiconductor element mounting portion 8, the connection terminal 9 to the semiconductor element electrode, the wiring 10, and the outer frame portion 12 is formed on the upper surface, and the pattern of the external connection terminal 11 and the outer frame portion is formed on the lower surface. To do.
- one or more protrusions 13 are appropriately formed.
- the pattern of the protrusion 13 made of this photoresist is designed so that the second metal surface does not remain by subsequent etching.
- the pattern of the protrusions 13 is generally good to set the width to 30 ⁇ m or less and the length to 100 ⁇ m or less.
- the size of the protrusion 13 of the photoresist pattern is optimized by taking this into consideration. It is necessary to keep.
- the metal plate any material can be used as long as it has etching processability, mechanical strength, thermal conductivity, expansion coefficient, etc. as a lead frame, but an iron-nickel alloy represented by 42 alloy is used. In addition, a copper alloy to which various metal elements are added in order to improve mechanical strength is often used.
- Etching is performed from below using an etchant that dissolves the metal plate, such as ferric chloride, to form holes 3 (FIG. 1C). Since the remaining portion of the metal plate finally becomes a wiring, the depth of the hole 3 is preferably left about 10 to 50 ⁇ m thick so that a fine wiring can be formed at the time of etching from the second upper surface side.
- the external connection terminal is formed with at least one protrusion 14 as shown in FIGS. 2B and 2C.
- FIG. 2C shows a cross section between A2 and A2 in FIG. 2B, but the protrusion 14 is formed lower than the second surface.
- FIG. 2B shows a state in which the protruding portion 14 is formed at one place, and FIG.
- the liquid premold resin 5 is applied to the upper surface of the metal plate in the direction of arrow D5 (FIG. 1D).
- a printing technique for coating from the viewpoint of productivity and quality.
- any method can be used as long as it can be applied appropriately thickly, but screen printing is generally preferable.
- the direction of printing is performed in the directions of the arrow D2 in FIG. 2B and the arrows D3 and D4 in FIG. 2D, so that the flow of the pre-mold resin is given direction and bubbles can be prevented from being involved.
- the premold resin is cured by heating (FIG. 1E).
- the removal method can be selected from dry etching, mechanical polishing, chemical polishing, and the like. Further, the opposite surface was etched to form the semiconductor mounting portion 8, the semiconductor element electrode connection terminal 9, and the wiring 10 to obtain the lead frame substrate 7 (FIG. 1F). A top view of the external connection terminal side is shown in FIG.
- the external connection terminals can be arranged in an array, and it is possible to cope with the increase in the number of pins of the semiconductor element.
- FIG. 4A shows a cross-sectional view in which the semiconductor element 15 is mounted and wire-bonded.
- the semiconductor element 15 is pasted by the die attach material 17 and connected to the semiconductor element electrode connection terminal 9 by the gold wire 16.
- the semiconductor element electrode connection terminal is appropriately subjected to any of nickel-gold plating, tin plating, silver plating, nickel-palladium-gold plating, and the like.
- the lead frame substrate is placed on a heat block and bonded while being heated.
- the premold resin exists on the lower surface of the semiconductor element electrode connection terminal 9 and is hollow. Because the structure is difficult to assemble, it can be assembled without causing poor bonding.
- the semiconductor element side is sealed by transfer molding or potting, and the outer frame portion is separated with a diamond blade or the like to make small pieces (FIG. 4B).
- a semiconductor package using a lead frame substrate can be obtained by mounting solder balls on external connection terminals.
- a BGA (Ball Grid Array) type lead frame substrate will be described with reference to FIGS. 1A to 1F.
- the manufactured BGA has a 10 mm square package size and has a 168-pin array of external connection terminals on the lower surface of the package.
- a long strip-shaped copper alloy metal plate 1 (Furukawa Electric, EFTEC64T) having a width of 150 mm and a thickness of 200 ⁇ m was prepared.
- EFTEC64T Fluukawa Electric
- FIG. 1B on both surfaces of the metal plate 1, a photoresist (manufactured by Tokyo Ohka Kogyo Co., Ltd., OFPR4000) is coated with a roll coater to a thickness of 5 ⁇ m, and then pre-baked at 90 ° C. went.
- pattern exposure is performed from both sides through a photomask having a desired pattern, followed by development with a 1% aqueous sodium carbonate solution, followed by washing with water and post-baking to obtain a photoresist pattern 2 as shown in FIG. 1B. It was.
- a pattern for forming the semiconductor element mounting portion 8, the semiconductor element electrode connection terminal 9, the wiring 10, and the outer frame portion 12 is formed on the first surface, and the protrusion 13 is formed on the second surface.
- a pattern for forming the external connection terminal 11 and the outer frame portion 12 having (FIG. 2A) was formed.
- the shape of the protrusion 13 is an isosceles triangle having a width of 30 ⁇ m in contact with the external connection terminal and a length of 80 ⁇ m.
- a first etching process is performed from the second surface of the metal plate using a ferric chloride solution.
- the thickness of the metal plate portion exposed from the resist pattern on the second surface side was reduced to 30 ⁇ m (FIG. 1C).
- the protrusion part 14 about 40 micrometers in length was able to be formed in the external connection terminal side surface.
- the specific gravity of the ferric chloride solution used was 1.38, and the liquid temperature was 50 ° C.
- thermosetting resin SMC-376KF1, manufactured by Shin-Etsu Chemical Co., Ltd.
- the direction of printing was performed from the place where there was no protrusion 14 to the direction of the protrusion (FIG. 1D). Further, curing was performed at 180 ° C. for 3 hours to form a premold layer 13. The embedding property of the thermosetting resin was good, and no defects including bubbles were observed.
- thermosetting resin layer of about 1 ⁇ m remained on the surfaces of the external connection terminals 11 and the outer frame portion 12 that were not etched, an alkaline aqueous solution of potassium permanganate at 60 ° C. (40 g / L potassium permanganate + 20 g / L sodium hydroxide) was removed by treatment for about 3 minutes.
- a second etching process is performed from the first surface side of the metal plate with a ferric chloride solution to dissolve and remove the metal plate portion exposed from the resist pattern.
- the semiconductor element mounting portion 8, the semiconductor element electrode connection terminal 9, the wiring 10, and the outer frame portion 12 were formed (FIG. 1E).
- the external connection terminal 11 extends from the semiconductor element electrode connection terminal 9.
- the photoresist pattern 2 on the first surface was peeled off to obtain a desired lead frame type BGA substrate 7 (FIG. 1F).
- electrolytic nickel-gold plating was applied to the exposed metal surface.
- the thickness of nickel was 5 ⁇ m, and the thickness of gold was 0.1 ⁇ m (not shown).
- the semiconductor element 15 was mounted on the lead frame type BGA substrate 7 of the present invention using the die attach material 17, and the die attach material was cured at 150 ° C. for 1 hour. Furthermore, the wire of the semiconductor element electrode and the semiconductor element electrode connection terminal 9 were connected by wire bonding using a gold wire 16 having a diameter of 30 ⁇ m (FIG. 4A). When the wire bonding heating temperature was 200 ° C. and the pull strength of the wire on the semiconductor element electrode connection terminal side was measured, it was 9 g or more, and a good connection was obtained.
- the area including the semiconductor element and the semiconductor element electrode connection terminal was transfer-molded and cut into small pieces to obtain a semiconductor package using a lead frame type BGA substrate.
- a lead frame substrate of the present invention By using the method for manufacturing a lead frame substrate of the present invention, it becomes possible to obtain a lead frame substrate with reduced defects during manufacturing and semiconductor package assembly and improved reliability against thermal stress. It is applied to a multi-pin package substrate that cannot be handled by a type of semiconductor package.
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Abstract
Description
本願は、2008年9月30日に、日本に出願された特願2008-254312に基づき優先権を主張し、その内容をここに援用する。
リードフレームは金属板の両面に所望のフォトレジストパターンを形成し、両面からエッチングすることにより、半導体素子搭載部、半導体素子電極との接続部であるインナーリード、アウターリード、これらを固定している外枠部を得ることができる。また、エッチング工法以外に、プレスによる打ち抜き加工によっても得ることができる。
半導体パッケージの組立工程としては、半導体素子搭載部に半導体素子をダイボンディングしたのち、金ワイヤー等を用いて、半導体素子の電極とインナーリードを電気的に接続する。その後、インナーリード部を含む半導体素子近傍を樹脂封止し、外枠部を断裁し、必要に応じてアウターリードに曲げ加工を施す。
そして近年、半導体素子の電極数が次第に増加するにつれて、アウターリードを側面に有するリードフレームタイプの半導体パッケージでは、もはや端子数が対応しきれなくなり、一部、BGA(Ball Grid Aray)やLGA(Land Grid Aray)タイプ等プリント配線基板との外部接続端子がパッケージ基板底面でアレイ状に配置された半導体パッケージへ置き換わってきている。
しかしながら、これらの基板の製造は工程が複雑になり、コスト高になるとともに、基板内の配線接続にめっきが使用されているため、リードフレームタイプのパッケージに比べ、信頼性が劣るという問題点がある。
BGAタイプのリードフレームでは、外部接続端子111の数が増加すると、半導体素子電極接続端子109側の配線110長が長くなる。この配線は金属板をハーフエッチングして作製するもので、その幅も厚さも小さく、エッチング以降の工程で折れや曲がりが発生して収率は非常に悪くなるという問題があった。
しかし、特許文献1の技術によると、本構造のリードフレーム基板に半導体素子を搭載し、ワイヤーボンディングにより半導体素子電極接続端子109を接続する際、接続端子109の下部は中空になっているため、ワイヤー接続の力が掛からず、接続不良が発生し、組み立て収率を著しく落とすという問題点があった。
このため、印刷技術を用いて第2の面に一定量プリモールド樹脂を塗布すると、比較的均一に樹脂層が形成される。外部接続端子上にも樹脂層が形成されるが、均一な膜厚のために除去工程が容易になると推察される。
図6Cは印刷後、熱硬化させた外部接続端子近傍の樹脂層の状態を示してる。図6A~図6Cに模式的に示すように、印刷方向(矢印D1で示す)に対して外部接続端子を越えた先に気泡が形成されてしまう問題点が心配される。
一方、本基板作製時において、配線の折れや曲がり、さらには気泡混入の不良が発生せず、半導体パッケージ組み立て工程であるワイヤーボンディング時において、ワイヤーボンディング接続端子の下部はプリモールド樹脂層が外部接続端子表面と面一に存在するため、安定して接続が可能となる。
リードフレームに用いられる金属板1の両面に、フォトレジストのパターン2を形成する(図1B)。図1A~図1Fでは上面に、半導体素子搭載部8、半導体素子電極との接続端子9、配線10、外枠部12のパターンを、下面に、外部接続端子11、外枠部のパターンを形成する。
このフォトレジストで出来た突起部13のパターンは、その後のエッチングで第2の金属面は残らないように設計する。
突起部13のパターンは、幅を30μm以下、長さを100μm以下に設定するのが一般に良い。但し、孔部3を形成するエッチング条件、エッチング量によって影響され、エッチング後に残った金属部分の大きさと形状が変化するので、それを考慮してフォトレジストパターンの突起部13のサイズを最適化しておく必要がある。
塩化第二鉄液等、金属板を溶解するエッチング液を用いて下面からエッチングを行い、孔部3を形成する(図1C)。孔部3の深さは金属板の残存部が最終的に配線になるため、第2回目の上面側からのエッチング時に微細配線が形成できるように10から50μm厚程度残すことが好ましい。
図2Cは、図2BのA2-A2間の断面を示すが、突出部14は第2の面よりも低く形成される。図2Bは突出部14が一箇所、図2Dは二箇所形成された状態を示す。
塗工は印刷技術を応用する事が、生産性や品質の面から一般に好ましい。印刷方法としては、適宜に厚く塗工できればどのような方法でも構わないが、一般にスクリーン印刷が好ましい。印刷の方向は、図2Bの矢印D2、図2Dの矢印D3、D4の方向に行うことにより、プリモールド樹脂の流れに方向性を持たせ、気泡の巻き込みを防止することができる。塗工後にプリモールド樹脂を加熱硬化させる(図1E)。
さらに、反対の面をエッチングして、半導体搭載部8、半導体素子電極接続端子9、配線10を形成してリードフレーム基板7を得た(図1F)。外部接続端子側の上面図を図3に示す。外部接続端子をアレイ状に配置することができ、半導体素子の多ピン化に対応が可能となった。
尚、ワイヤーボンディングを行う際、本リードフレーム基板をヒートブロックの上に載せ、加熱しながら接合を行うが、半導体素子電極接続端子9の下部にプリモールド樹脂が面一で存在し、また、中空構造が出来にくい為に、接合不良を起こさず組み立てることができる。
BGAタイプであればはんだボールを外部接続端子に搭載して、リードフレーム基板を用いた半導体パッケージが得られる。
製造したBGAのパッケージサイズは10mm角で、パッケージ下面には168ピンのアレイ状の外部接続端子を持つものである。
次いで、図1Bに示すように、この金属板1の両面に、ロールコーターでフォトレジスト(東京応化(株)製、OFPR4000)を5μmの厚さになるようにコーティングした後、90℃でプレベークを行った。
次に、所望のパターンを有するフオトマスクを介して両面からパターン露光し、その後1%炭酸ナトリウム水溶液で現像処理を行った後に水洗及びポストベークを行い、図1Bに示すようにフォトレジストパターン2を得た。
また、外部接続端子側面に、長さがおよそ40μmの突出部14を形成することができた。用いた塩化第二鉄溶液の比重は1.38、液温50℃であった。
さらに、180℃、3時間で硬化を行い、プリモールド層13を形成した。熱硬化樹脂の埋め込み性は良好で、気泡を含め不良は観察されなかった。
尚、図示していないが、下面側に不要なエッチングが行われないよう、第2回目のエッチング処理時には第2の面側にバックシート等を貼り付けておくのが好ましい。
次に、レジストの剥離後、露出した金属面に対し、電解ニッケル-金めっきを施した。
ニッケルの厚さは5μm、金の厚さは0.1μmであった(図示せず)。
ワイヤーボンディングの加熱温度は200℃で行い、半導体素子電極接続端子側のワイヤーのプル強度を測定したところ、9g以上あり、良好な接続が得られた。
2・・・フォトレジストパターン、
3・・・孔部、
4・・・スキージ、
5・・・液状プリモールド樹脂、
6・・・樹脂層、
7・・・リードフレーム基板、
8・・・半導体素子搭載部、
9・・・半導体素子電極接続端子、
10・・・配線、
11・・・外部接続端子、
12・・・外枠部、
13・・・フォトレジスト突起パターン、
14・・・突出部、
15・・・半導体素子、
16・・・金線、
17・・・ダイアタッチ材、
18・・・トランスファーモールド樹脂、
19・・・気泡
Claims (3)
- 第1の面と第2の面とを有する金属板と、
前記第1の面に形成された、半導体素子搭載部、半導体素子電極接続端子、および第1の外枠部と、
前記第2の面に形成され、前記半導体素子電極接続端子と電気的に接続された外部接続端子と、
前記第2の面に形成された第2の外枠部と、
前記第1の外枠部と前記第2の外枠部との間隙に形成された樹脂層と、を備えたリードフレーム基板であって、
前記樹脂層に埋設された前記外部接続端子の側面には、前記第1の面の側底部にかけて少なくとも1箇所の突出部が形成されていることを特徴とするリードフレーム基板。 - 金属板の第1の面に、半導体素子搭載部、半導体素子電極接続端子、および外枠部を形成し、
前記金属板の第2の面には、前記半導体素子電極接続端子と接続される外部接続端子、及び外枠部を、それぞれ形成する為のフォトレジストパターンを形成し、
前記外部接続端子の形成の為の前記フォトレジストパターンは一箇所以上の突起状のパターンを有するように形成し、
前記第2の面の金属板が露出した金属板露出部に、貫通しない孔部をエッチングにより形成し、
前記孔部に、前記外部接続端子から突出部の方向へ液状プリモールド樹脂を塗布したうえ、加熱硬化することにより樹脂層を形成し、
前記第1の面をエッチングすることにより、前記の半導体素子搭載部、前記外部接続端子と電気的に接続される前記半導体素子電極接続端子、及び外枠部を形成することを特徴とするリードフレーム基板の製造方法。 - 第1の面と第2の面とを有する金属板と、
前記第1の面に形成された、半導体素子搭載部、半導体素子電極接続端子、および第1の外枠部と、
前記第2の面に形成され、前記半導体素子電極接続端子と電気的に接続された外部接続端子と、
前記第2の面に形成された第2の外枠部と、
前記第1の外枠部と前記第2の外枠部との間隙に形成された樹脂層と、を備えたリードフレーム基板であって、
前記樹脂層に埋設された前記外部接続端子の側面には、前記第1の面の側底部にかけて少なくとも1箇所の突出部が形成されているリードフレーム基板と、
前記リードフレーム基板に、半導体素子が搭載され、且つ、ワイヤーボンディングで前記リードフレーム基板と前記半導体素子との電気的接続が成されていること、を特徴とする半導体装置。
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- 2009-09-30 CN CN200980138144.0A patent/CN102165585B/zh not_active Expired - Fee Related
- 2009-09-30 KR KR1020117006885A patent/KR101602982B1/ko not_active IP Right Cessation
- 2009-09-30 WO PCT/JP2009/005041 patent/WO2010038452A1/ja active Application Filing
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TWI583267B (zh) * | 2011-01-28 | 2017-05-11 | 馬維爾國際貿易有限公司 | 單層球形柵格陣列基材製程方法 |
CN102244060A (zh) * | 2011-06-02 | 2011-11-16 | 日月光半导体制造股份有限公司 | 封装基板及其制造方法 |
Also Published As
Publication number | Publication date |
---|---|
TWI502711B (zh) | 2015-10-01 |
KR101602982B1 (ko) | 2016-03-11 |
JP2010087221A (ja) | 2010-04-15 |
JP5549066B2 (ja) | 2014-07-16 |
TW201021186A (en) | 2010-06-01 |
US20110163435A1 (en) | 2011-07-07 |
CN102165585A (zh) | 2011-08-24 |
KR20110074514A (ko) | 2011-06-30 |
US8558363B2 (en) | 2013-10-15 |
CN102165585B (zh) | 2014-03-26 |
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