WO2009156882A1

WO2009156882A1 - System on chip system and method to operate the system

Info

Publication number: WO2009156882A1
Application number: PCT/IB2009/052197
Authority: WO
Inventors: Paul Spaanderman; Gert Josef Elisa Copejans
Original assignee: Nxp B.V.
Priority date: 2008-06-25
Filing date: 2009-05-26
Publication date: 2009-12-30

Abstract

A System on Chip system (100) comprises two or more Processor Systems (1, 2) interacting with each other. In order to augment the reliability of the System (100) the interaction between the Processor Systems (1, 2) is controllable by an Interaction Guard (3). Further a method for the operation of such a System (100) is disclosed.

Description

SYSTEM ON CHIP SYSTEM AND METHOD TO OPERATE THE SYSTEM

FIELD OF THE INVENTION

This invention relates to a System on Chip system comprising two or more Processor Systems interacting with each other.

BACKGROUND OF THE INVENTION

Especially in the technical field of automotive engineering the interaction between different electrical and electronical components becomes more and more relevant. For example a hands free set for a mobile phone has to interact with a car hi-fi system in order to mute the system in case of an incoming or outgoing telephone call. Most of these infotainment devices have been developed and designed without the consideration of certain demands in automotive engineering.

Nowadays mostly all functions of a car are controlled via a data bus and a central control device. It is obvious that the functions of the car should not be influenced by further systems or devices namely infotainment devices.

Further it is known that more and more electronic functionalities are consolidated and integrated within so called System on Chip systems which comprise two or more Processor Systems for the implementation of different functionalities respectively. For example a first Processor System has the functionality of a motor controller device and interacts via different sensors with the motor. The second Processor System implements the functionality of a hi-fi system and can be influenced via different manual control elements by a user. In this case the volume of the hi-fi system could be influenced by the motor speed so that the Processor Systems have to interact with each other or that data are exchanged. From the US 7,093,288 Bl is known the usage of packet filters and network virtualization to restrict network communication. Therefore a network mediator includes a set of one or more filters with parameters which can be compared to corresponding parameters of a data packet which shall pass through the network mediator either from or to a computing device itself. Which form of data exchange or interaction within the computing device is fulfilled is not influenced by the filters or the network mediator. Further the GB 2386804 A discloses communication network node access switches. Additional components are introduced into a network which operate as a communication diode. These components serve as a firewall for uncontrolled node failures so that in case of a defect not the whole network fails. Controlling data exchanged during a normal operation is not influenced.

OBJECT AND SUMMARY OF THE INVENTION

It is an object of the invention to provide a System on Chip system fulfilling different functionalities whereas uncontrolled behavior of the different Processor Systems through intricate interactions between them is avoided. Further a method for operating such a System on Chip system shall be indicated.

These problems are solved with a system as described in claim 1 and a method as described in claim 6 respectively. The core of the invention lies in the fact that a free interaction and/or data transfer between different areas of the System on Chip system or between its Processor Systems respectively is prohibited in a controlled way with the aid of an Interaction Guard. In modern System on Chip systems it is the desired capability to exchange data easily between different processors to achieve a benefit for the system. But by introducing an additional Interaction Guard a situation of separation of concerns is created that allows the development and re-use from either area or Processor System to happen with minimal impact to the integrity of each other component or the whole system itself.

Within the scope of the invention this Interaction Guard can be implemented by a person skilled in the art in different ways, preferably as described as following. In the most simple embodiment the Interaction Guard or an Interaction Guard function will let no signal or data pass from one Processor System to another or it will allow all signals and data to travel freely between different Processor Systems.

By controlling the interaction between different Processor Systems with an Interaction Guard the different Processor Systems may be developed individually by different research teams whereas they know that their development work will not be invalidated by events occurring at the other side of the Interaction Guard or the Interaction Guard function. For example one Processor System could be a CAN control (Controller Area Network) to control all relevant functions of a car and the other Processor System is a car hi-fi system whereas the two Processor Systems do not influence each other through undesired data or information exchange which is controlled by an Interaction Guard. Further it is possible to implement such an Interaction Guard without raising the complexity of the whole system to much. It is obvious that there can be implemented one single Interaction Guard to control all communications between two, three or more Processor Systems or that for each pair a respective Interaction guard is implemented, with four processor Systems this would be six Interaction guards.

With this Interaction Guard a free interaction and data transfer between the different areas or Processor Systems of the System on Chip system is prohibited in a controlled way to distinguish trust or secure zones from non trusted or non secure zones. In a first preferred embodiment the Interaction Guard is implemented in a hardware of the System on Chip system. This offers maximum protection for controlling the data transfer because modifications of the Interaction Guard in order to make data transfer easier require a modification of the hardware of the integrated circuit itself which is virtually excluded.

For this hardware embodiment it is proposed that the Interaction Guard is implemented around a single point in the System on Chip system, for example in form of a filter that evaluates the incoming messages or data prior to passing to the other component of the System on Chip system. When no other link between the two Processor Systems is physically available the proper controlling of data exchange is secured.

Further the Interaction Guard could be implemented distributed over the whole system within its hardware to allow more complex interactions. Of course this kind of implementation is more difficult to achieve but at the end more performance implementation may be achieved.

In a second preferred embodiment the Interaction Guard is implemented within a software of the System on Chip system in order to reach a higher flexibility by changing different parameters of the software. So data exchange between different components can be made easier or more difficult.

It is to understand that the Interaction Guard may be implemented in the Hardware and the software as well.

In order to adjust the System on Chip system with an additional Interaction Guard to different needs or modes of operation the Interaction Guard can be operated by a remote control. By this the degree of data or information exchange between different Processor Systems can be adjusted as required.

BRIEF DESCRIPTION OF THE DRAWINGS An embodiment of the invention is hereinafter described with reference to the according drawing. The only figure shows a schematic view of a system according to the invention. DESCRIPTION OF EMBODIMENTS

In figure 1 is depicted a System on Chip system 100 comprising in this embodiment two Processor Systems 1, 2 which interact each other as indicated by the connecting lines. Each Processor System 1, 2 is allotted to a respective interaction area 4, 5 in order to communicate for example with a user of the System on Chip systemlOO or further sensors.

For example the Processor System 1 could implement the functionalities of a motor control device and interacts via its interaction area 4 with different sensors like a motor speed sensor. The Processor System 2 on the other hand implements the functionality of a car hi-fi system and can be controlled by a user via its dedicated interaction area 5, maybe an operating element for the volume.

Further the System on Chip systemlOO comprises an Interaction Guard 3 which can be embodied in the hardware and/or in the software of the System on Chip system 100.

With this Interaction Guard 3 an exchange of data and/or information between different Processor System 1, 2 is controlled in order to achieve a separation of concerns of the different Processor Systems 1, 2.

By such an architecture the integration of different Processor Systems 1, 2 is simplified because what ever happens at one side of the Interaction Guard 3 will have no or only little effect on the integrity of the other side of the Interaction Guard 3. For example a car crash, security attacks or a misbehaving content is contained within the Processor System 2 representing an infotainment system and will have no adverse effect on the other Processor System 1 representing for example a CAN-bus.

LIST OF REFERENCES:

1. Processor System

2. Processor System

3. Interaction Guard

4. interaction area

5. interaction area

100. System on Chip system (SoC)

Claims

CLAIMS:

1. System on Chip System (100) comprising two or more Processor Systems (1, 2) interacting with each other, characterized in that the interaction between the Processor Systems (1, 2) is controllable by an Interaction Guard (3).

2. System (100) according to claim 1, characterized in that the Interaction Guard (3) is implemented in a hardware of the System (100).

3. System (100) according to claim 2, characterized in that the Interaction

Guard (3) is implemented around a single point in the System (100) or is distributed over the System (100).

4. System (100) according to claim 1, characterized in that the Interaction Guard (3) is implemented in a software of the System (100).

5. System (100) according to one of the claims 1 to 4, characterized in that the Interaction Guard (3) is controllable by a remote control.

6. Method to operate a System on Chip system (100) whereas this System (100) comprises two or more Processor Systems (1, 2) interacting with each other, characterized in that the interaction between the Processor Systems (100) is controlled by an Interaction Guard (3).

7. Method according to claim 6, characterized in that the Interaction Guard (3) is implemented in a hardware of the System (100).

8. Method according to claim 7, characterized in that the Interaction Guard (3) is implemented around a single point in the System (100) or is distributed over the System (100).

9. Method according to claim 6, characterized in that the Interaction Guard (3) is implemented in a software of the System (100).

10. Method according to one of the claims 6 to 9, characterized in that the

Interaction Guard (3) is controlled by a remote control.