WO2009128851A1 - Détection d'erreur basée sur un décodage de voie - Google Patents

Détection d'erreur basée sur un décodage de voie Download PDF

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Publication number
WO2009128851A1
WO2009128851A1 PCT/US2008/069056 US2008069056W WO2009128851A1 WO 2009128851 A1 WO2009128851 A1 WO 2009128851A1 US 2008069056 W US2008069056 W US 2008069056W WO 2009128851 A1 WO2009128851 A1 WO 2009128851A1
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WIPO (PCT)
Prior art keywords
data
error
encoded data
metric
decoding process
Prior art date
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PCT/US2008/069056
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English (en)
Inventor
Harinath Garudadri
Somdeb Majumdar
David Jonathan Julian
Chinnappa K. Ganapathy
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Qualcomm Incorporated
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Incorporated filed Critical Qualcomm Incorporated
Priority to EP08781295A priority Critical patent/EP2269337A1/fr
Priority to CN200880128626.3A priority patent/CN102007721B/zh
Priority to JP2011504991A priority patent/JP2011517255A/ja
Priority to KR1020107025574A priority patent/KR101254606B1/ko
Publication of WO2009128851A1 publication Critical patent/WO2009128851A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10L—SPEECH ANALYSIS OR SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING; SPEECH OR AUDIO CODING OR DECODING
    • G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
    • G10L19/005—Correction of errors induced by the transmission channel, if related to the coding algorithm
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes

Definitions

  • This application relates generally to data processing and more specifically, but not exclusively, to detecting and concealing data errors.
  • data is transferred between system components that provide different data processing functionality.
  • a system component that operates on data also may send the data to and retrieve the data from a storage component in the system.
  • one component may generate data and then transmit the data to another component that uses the data for a designated purpose.
  • data may be corrupted in some manner when it is transferred between system components.
  • data may be corrupted when it is written into or read out of a storage medium or when it is transmitted through a communication medium.
  • the data a system component receives from another system component may include one or more errors.
  • a bit in a block of pulse code modulation ("PCM") data that was transmitted by a transmitting component as a "0" (or "-1") may be received at a receiving component as a "1" due to interference along the data transmission path.
  • PCM pulse code modulation
  • Various techniques may be used to handle errors in received data.
  • a receiving device may convert the received data into representative PCM data (sampled at the Nyquist frequency) and process the PCM data to determine whether there is an error in the data.
  • a receiving device may request that a transmitting device resend any data that is received with one or more errors.
  • a receiving device may perform some type of post-processing on the PCM data to correct the errors.
  • the PCM data represents a waveform (e.g., an audio signal)
  • the receiving device may employ filtering operations that process a relatively large portion of the waveform data (e.g., process the PCM data that precedes and follows one or more corrupted data bits in time) to correct the error.
  • Error processing schemes such as those discussed above may have several drawbacks. For example, data retransmissions may result in an increase in data processing latency, an increase in processing load, and an increase in traffic over the data transmission path. Similarly, post-processing operations may result in an increase in data processing latency and may involve complex, power-hungry signal processing operations.
  • the disclosure relates in some aspects to low latency and computationally efficient techniques for processing data having one or more errors.
  • this data may comprise oversampled data such as sigma delta modulated data.
  • the disclosure relates in some aspects to detecting errors in encoded data.
  • an error may be detected in a set of encoded data based on an outcome of a channel decoding process.
  • the disclosure relates in some aspects to concealing data errors.
  • the set of data may be replaced with another set of data that is based on one or more neighboring data sets.
  • a set of data identified as having at least one bit in error may be replaced with data that is generated by a cross-fading operation that is based on a neighboring data set that precedes the identified data set and a neighboring data set that follows the identified data set.
  • the disclosure relates in some aspects to concealing bit errors in oversampled data through the use of PCM equivalent data that is associated with the bits in error.
  • an error in a data bit may be corrected through the use of a linear prediction operation that is based on PCM equivalent data associated with that data bit and its neighboring data bits.
  • a set of data including at least one bit in error may be replaced with data that is generated by linear interpolation operations that are applied to PCM equivalent data associated with the data set's neighboring bits.
  • the disclosure relates in some aspects to mitigating audio artifacts.
  • the teachings herein may be employed to detect and conceal errors in oversampled encoded audio data such as a sigma delta modulated data.
  • the disclosure relates in some aspects to providing a low power and low latency solution to eliminate artifacts that occur due to bit errors in an SDM bit stream.
  • filtering operations may be performed in the SDM domain, the bit stream need not be converted (e.g., decoded) to the PCM domain for error processing.
  • high filter performance may be achieved in some aspects by taking advantage of the noise shaping properties of a high data rate SDM stream.
  • low latency may be achieved through the use of efficient filter operations in the SDM domain.
  • a low power solution may be provided in some aspects through the use of low complexity filtering operations on narrow bit width SDM samples.
  • FIG. 1 is a simplified block diagram illustrating several sample aspects of a data processing system
  • FIG. 2 is a simplified block diagram illustrating several sample aspects of a wireless communication system
  • FIG. 3 is a flowchart of several sample aspects of error detection-related operations
  • FIG. 4 is a flowchart of several sample aspects of concealment-related operations.
  • FIG. 5 is a simplified block diagram illustrating several sample aspects of a system comprising an error detector and an error filter;
  • FIG. 6 is a simplified diagram illustrating several sample aspects of cross- fading-based data processing
  • FIG. 7 is a simplified diagram illustrating several sample aspects of prediction-based data processing
  • FIG. 8 is a simplified diagram illustrating several sample aspects of interpolation-based signal processing
  • FIG. 9 is a simplified block diagram of several sample aspects of communication components.
  • FIGS. 10 and 11 are simplified block diagrams of several sample aspects of apparatuses configured to process data as taught herein.
  • a method of data processing comprises: receiving encoded data; and detecting at least one error in the encoded data based on an outcome of a channel decoding process.
  • this encoded data may comprise oversampled data.
  • a method of data processing comprises: identifying data in a set of oversampled data; identifying subsets of the oversampled data that are proximate to the identified data; generating substitute data based on the subsets; and replacing the identified data with the substitute data.
  • this set of oversampled data comprises noise-shaped samples.
  • FIG. 1 illustrates sample aspects of a system 100 where a data source 102 (e.g., a component that generates data or forwards data) sends data via a transmission medium and/or stores data in a storage medium (hereafter referred to, for convenience, as "the medium 104").
  • a data destination 106 includes a receiver 108 (e.g., some form of data sink) that receives the data via the medium 104 and provides the received data to a data processor 110 (e.g., a component that uses, outputs, or forwards the data).
  • the receiver 108 may receive the data via a wireless link, a wired link, an optical link, or some other suitable data link.
  • the data source 102 and the data destination 106 may reside in the same device (e.g., in a data storage system) or in different devices (e.g., in a wireless communication system).
  • the data source 102 comprises a wireless audio source (e.g., an audio player or audio receiver) that wirelessly transmits an audio data stream to one or more data destinations 106 that comprise one or more wireless earpieces (e.g., a wireless headset).
  • the data received by the receiver 108 may include errors such as impulse distortion-based errors.
  • the signals transmitted by the data source 102 may be corrupted by interference, noise, or signal processing operations at one or more points along the data path between the data source 102 and the data destination 106.
  • these errors may adversely affect the operational performance of the data processor 110 (e.g., an output device).
  • some audio encoders employ sigma-delta modulation ("SDM") encoding whereby an SDM encoded data stream may be sent from one component (e.g., an audio player) to another component (e.g., an output device). Errors in the encoded data stream arising from transmission and/or retrieval of such data may result in artifacts in the audio output (e.g., perceived "clicks and pops").
  • SDM sigma-delta modulation
  • the data destination 106 includes an error detector 112 and an error processor 114.
  • the error detector 112 may identify an error in a set of data and the error processor 114 may perform operations to mitigate (e.g., conceal) the error in the received data before the data is provided to the data processor 110.
  • the error detector 112 and the error processor 114 may cooperate to filter received audio data to mitigate artifacts in the audio data (e.g., to reduce noise in an audio output signal derived from the audio data).
  • FIGS. 2 - 8 For illustration purposes, the discussion that follows describes various components and operations of a wireless communication system where one wireless device transmits data to another wireless device. It should be appreciated that the teachings herein may be applicable to other types of devices (e.g., wireless or non-wireless devices) and other types of systems (e.g., data processing systems) and other types of components.
  • devices e.g., wireless or non-wireless devices
  • systems e.g., data processing systems
  • a wireless system 200 includes a wireless device 202 that sends SDM encoded data to a wireless device 204.
  • FIG. 2 simply depicts wireless transmission from one wireless device to another wireless device. It should be appreciated, however, that a communication system constructed according to the teachings herein may include a different number of wireless devices and that each of these wireless devices may include transmission and/or reception capabilities.
  • the wireless device 202 includes a data source 206 (e.g., an audio data source) that provides PCM data (e.g., oversampled PCM domain audio data) at a bit width of M (e.g., 16 bits).
  • PCM data e.g., oversampled PCM domain audio data
  • the data source 206 may comprise a component that generates or forwards audio data (e.g., oversampled PCM domain audio data).
  • An SDM encoder 208 processes the PCM data to generate SDM encoded data.
  • the encoded data may comprise an oversampled, low bit-width data. That is, the data may be sampled at a rate that is higher than the Nyquist frequency (e.g., an oversampling rate of 2 or more).
  • the data stream may have a bit width of 1 (as shown), 2, 3, or some other bit width that is relatively low as compared to, for example, the bit width of the PCM data.
  • the SDM decoder 208 may generate low bit-width, pulse-density modulated ("PDM") data.
  • PDM pulse-density modulated
  • the SDM data received at the wireless device 204 may be prone to bit errors. As will be described in detail below, this data may therefore be passed through an error filter (e.g., an artifact filter that mitigates artifacts) whereby the affected bits are modified through the use of operations in the SDM domain.
  • an error filter e.g., an artifact filter that mitigates artifacts
  • Sample operations of the wireless device 204 will be described in more detail in conjunction with the flowcharts of FIGS. 3 and 4. For convenience, the operations of FIGS. 3 and 4 (or any other operations discussed or taught herein) may be described as being performed by specific components (e.g., one or more of the components of FIGS. 1, 2, and 4 - 8).
  • FIG. 3 describes several operations that may be performed to detect one or more data errors.
  • the following discussion relates to detecting an error in encoded data (e.g., whereby errors may be detected before the data is provided to an application layer). It should be appreciated that the teaching herein also may be employed to detect errors in other types of data.
  • the wireless device 204 obtains encoded data in some manner.
  • a receiver 214 may receive signals via an antenna 216 and process the signals to provide oversampled data 218 (e.g., an SDM bit stream).
  • Blocks 304 - 310 of FIG. 3 relate to detecting one or more errors in the encoded data and invoking error concealment operations.
  • a channel decoder 220, a comparator 222, and a threshold 224 are employed to detect an error in a set of data and generate an indication of a detected error.
  • these components may comprise the error detector 112 of FIG. 1.
  • the following discussion may refer to operations performed on a block of data (e.g., a packet). It should be appreciated that the techniques described herein may be broadly applicable to various types of data sets.
  • the channel decoder 220 decodes the encoded data. For example, a received data stream may be segmented into blocks of a defined size (e.g., 330 bits) whereby the channel decoder 220 individually decodes blocks of the encoded data (e.g., in a successive manner).
  • a defined size e.g., 330 bits
  • the channel decoder 220 may be implemented in various ways.
  • the channel decoder 220 may comprise at least one of: a Reed-Solomon decoder, a convolutional decoder, a turbo code decoder, a Viterbi decoder, a hybrid automatic repeat request (“HARQ") decoder, a log likelihood ratio-based (“LLR- based”) decoder, low density parity check (“LDPC”) code-based decoder, or some other suitable type of decoder.
  • HARQ hybrid automatic repeat request
  • LLR- based log likelihood ratio-based
  • LDPC low density parity check
  • the channel decoder 220 may generate a set of (e.g., one or more) channel coding metrics 226 for each block of encoded data.
  • a channel coding metric 226 may take various forms depending on the type of decoding employed by the channel decoder 220.
  • a channel coding metric 226 may comprise a hard or soft metric and may comprise at least one of: a Viterbi distance metric for a convolutional code, a re-encode and compare metric, a HARQ Viterbi metric, a log likelihood ratio metric, a turbo code belief propagation metric, an LDPC metric, or some other suitable metric.
  • a channel coding metric 226 may be used (e.g., by a higher layer process) to determine whether a block of data has one or more errors.
  • a soft-decision metric generated by a block-based Reed-Solomon error correction module may indicate how effectively the channel decoding process decoded the encoded data (e.g., as indicated by the number of codewords the module attempted to correct in a given block of data).
  • the channel coding metric may provide an indication of the probability of whether the block still contains at least one error. For example, a higher metric value may indicate a lower level of confidence in the accuracy of the error correction process.
  • a metric value (e.g., a value of 0) that indicates that the decoder did not correct any code-words in the block may be used to determine that the block does not have any bits in error.
  • a metric value that indicates that the decoder corrected one code -word in the block may be used to determine that the block no longer has any errors.
  • such an assumption may be made since there may be a high probability that the decoder successfully corrected the code-word when there is only one erroneous code -word detected in the block.
  • the probability that the decoder successfully corrected all of the erroneous code-words may decrease.
  • a given value of the metric (e.g., five) may be defined as indicating that there is an error (e.g., there is a sufficient likelihood of an error) in the block.
  • a given decoder may be designed to correct up to four bits. In this case, if the metric from this decoder indicates that it corrected five or more bits, it may be assumed that there is an error in the block.
  • an indication (e.g., an estimate) of whether a given block contains any errors may be generated by comparing the channel coding metric with a threshold.
  • the comparator 220 may compare the channel coding metric 226 with the threshold 222 (e.g., defined to have a magnitude of five) to generate a filter control indication 228.
  • the wireless device 204 may determine whether to invoke an error concealment operation based on the detection of an error in a block of data.
  • invoking an error concealment operation involves providing the filter control signal 228 to an error filter 230 mitigates the effect of errors in the data.
  • Sample error concealment operations will be described in conjunction with FIGS. 4 - 8.
  • FIGS. 4 and 5 illustrate several operations and components that may be used to provide an output signal by replacing oversampled data containing an error will be treated.
  • FIG. 4 describes several sample operations for processing a set of data (e.g., a block of data) containing an error.
  • FIG. 4 describes several sample operations for processing a set of data (e.g., a block of data) containing an error.
  • a system 500 include sample components that may be employed to identify and replace data in a set of oversampled data.
  • the components of the system 500 correspond to the error detector and error processor (e.g., error filter) components of FIGS. 1 and 2.
  • error detector and error processor e.g., error filter
  • FIGS. 1 and 2 The following discussion relates in some aspects to operations that may be performed on encoded data as discussed above. It should be appreciated that the teaching herein also may be employed to process errors in other types of data.
  • the system 500 obtains oversampled data 502 in some manner.
  • the data 502 may correspond to the encoded, oversampled data 218 (e.g., an SDM bit stream) provided by the receiver 214 of FIG. 2 as discussed above.
  • the encoded, oversampled data 218 e.g., an SDM bit stream
  • a data identifier 504 identifies data to be processed (e.g., altered) in the oversampled data 502. For example, as discussed above in conjunction with FIG. 3, the data identifier 504 may identify a block of data that includes an error. This identified block may therefore be subjected to an error concealment operation. It should be appreciated that different amounts of data may be identified here depending on the particular implementation. For example, one or more bits may be identified for processing (e.g., to determine whether the bit is or the bits are in error).
  • a neighboring data acquirer 506 acquires (e.g., identifies) two or more subsets of the oversampled data 502 that are proximate to the identified data.
  • the neighboring data acquirer 506 may acquire the subsets in response to an indication 508 (e.g., an error indication) from the data identifier 504 indicating that the current data block includes one or more errors.
  • an indication 508 e.g., an error indication
  • a different number of bits may be specified for each subset in different implementations. For example, in some cases each subset may comprise a block of data that is equal in size to an identified block of data. In some cases, a subset may comprise a single bit.
  • the location of the subsets relative to the identified data also may depend on the implementation. For example, in some cases one subset may precede the identified data in time (e.g., the subset is received before the identified data) and another subset may follow the identified data in time. In some cases all of the subsets may precede the identified data. Also, in some cases a given subset may immediately precede and/or immediately follow the identified data. Several examples of subsets are described below in conjunction with FIGS. 6 - 8.
  • a substitute data generator 510 uses the subsets to generate data 514 to be substituted for the identified data.
  • the substitute data generator 510 may apply a function to the subsets to generate data that conceals any errors in the identified data. Several examples of such a function are described below in conjunction with FIGS. 6 - 8.
  • a data replacer 512 replaces the identified data with the substitute data 514. For example, if the indication 508 indicates that the current data block (corresponding to data 502) includes an error, the data replacer 512 may output the substitute data block (corresponding to data 514) instead of the current data block. Thus, the data replacement operation may mitigate the effect an artifact in the data has on an output signal that is generated from the processed data (i.e., the data after the substitution of the substitute data for the identified data). Conversely, if there is no error in a given block of data, the data replacer 512 may simply output the current data block in its original form. In the example of FIG.
  • the data replacer 512 outputs data on a data bus 516 (e.g., in the form of a data stream).
  • this data replacement operation may involve a change in the number of bits that represent a given data value.
  • the oversampled data 502 comprises a stream of bits where a single bit (e.g., having a value of +1 or -1) represents a given data sample. Such an example is represented by the bit width "1" designation for the oversampled data 502 in FIG. 5.
  • the substitute data 514 also may comprise a 1-bit data. This scenario is represented by the bit width of "1" for the substitute data 514 in FIG. 5.
  • the output data 516 also may comprise 1-bit data (e.g., representing a value of + 1 or -1).
  • the substitute data 514 may comprise multi-bit data (represented by a bit width of "N" in FIG. 5).
  • a given value of the substitute data 514 may be based on a combination of multiple bits and/or weights. In some cases, this resulting value may not equate to an integer value (e.g., +1 or -1).
  • the output of the system 500 may comprise multi-bit data as represented by a bus width of "N" for the output data 516.
  • the multi-bit output data 516 may simply represent a value of +1 or -1 (or some other suitable 1-bit value).
  • the output data 516 (e.g., corresponding to filtered data 232 in FIG. 2) may be upsampled by an upsampler 234 (FIG. 2).
  • Upsampling may be performed, for example, to improve the noise shaping properties of the signal for a subsequent SDM encoding stage and/or in a case where an output stage (e.g., an output device 236) is configured to process data at a higher rate than the data rate of the filtered data 232.
  • the data 232 may comprise an SDM stream having a bit rate of approximately 1 Mbps.
  • the output device 236 may be configured to output an audio signal based on an SDM bit stream having a bit rate of approximately 5 Mbps.
  • the upsampler 234 upsamples the data 232 by a factor of five.
  • an SDM encoder 238 may be employed to noise-shape the optionally upconverted data and/or to convert the optionally upconverted data back to SDM data.
  • the data 232 e.g., data 516) may comprise multi-bit data.
  • the output device 236 may be configured to operate on an SDM bit stream. Consequently, the SDM encoder 238 (or some other suitable component) may be employed to convert the multi-bit data into a bit stream 240 (e.g., a 1-bit wide bit stream).
  • the SDM encoder 238 may comprise a low order (e.g., 1 st order or 2 nd order) SDM encoder.
  • the bit stream 240 may comprise a PDM representation.
  • the output device 236 processes the bit stream 240 in a designated manner. For example, in an audio application the output device 236 processes the bit stream to provide an output signal to a speaker or some other suitable component.
  • the SDM data may be directly applied to a digital-to-analog converter to drive a speaker (e.g., using a class-D amplifier).
  • the output signal may be filtered entirely in the SDM domain without the need to convert the signal to the PCM domain for filtering operations.
  • the teachings herein may be used to process various types of input data.
  • the teachings herein may be employed to process over- sampled noise-shaped samples.
  • over-sampling refers to sampling that exceeds the Nyquist rate.
  • noise-shaping relates to techniques (e.g., filtering techniques) for spreading the quantization-noise energy associated with a signal of a given bandwidth (e.g., 20 kHz) over a larger bandwidth (e.g., 320 kHz) to effectively reduce the noise floor associated with the signal.
  • SDM samples are one example of oversampled noise-shaped samples.
  • a data stream that may be represented by 16-bit pulse code modulation (“PCM”) data at 48 kHz may be represented by a 1-bit SDM stream at a rate approaching 1 MHz.
  • PCM pulse code modulation
  • FIGS. 6 - 8 For convenience, the following describes scenarios where an oversampled bit stream has a block (e.g., packet) structure.
  • some form of technique e.g., as described above is used to identify a block that contains one or more bits in error. It is not assumed that the exact positions of the bits in error are known.
  • one method of block-level detection of bits in error is based on Reed-Solomon check-sums.
  • FIG. 6 illustrates a system 600 employing a sample cross-fading-based scheme.
  • a block Q in a set of oversampled data e.g., a bit stream
  • Blocks P and R in the set of oversampled data are blocks that are adjacent to block Q.
  • the data identifier 504 may identify the block Q and the data acquirer 506 may identify the blocks P and R (e.g., as the subsets of the oversampled data 502).
  • each of the blocks P, Q, and R has a length of "Z" bits. It should be appreciated, however, that in some cases different blocks may have different lengths.
  • a cross-fade filter 602 e.g., the data generator 510) may perform the operation of Equation 1 for each bit in Q.
  • a and b are vectors each of which contains suitably chosen weighting coefficients.
  • the values of the vector a(n) may increase with an increase in n and the values of the vector a(n) also may decrease with an increase in n.
  • a plot of the weights a(n) versus b(n) serves to illustrate the cross-fading effect of
  • the resulting data block Q' may be substituted into the bit stream in place of the original block Q (e.g., by the data replacer 512), thereby replacing any bits in error from the bit stream. Moreover, since block Q' is based on the values of the neighboring blocks P and R, the resulting bit stream may be less likely to contain artifacts that are readily noticeable in an output signal (e.g., audible clicks and pops).
  • an output signal e.g., audible clicks and pops.
  • each value Q '(n) that is substituted in for a bit Q(n) in the original block may comprise a multi-bit value (e.g.,
  • the SDM encoder 238 (FIG. 2) may be employed in a cross-fading-based scheme to operate on a data stream that includes block Q' with multi-bit values to provide an equivalent SDM bit stream.
  • Q' may be a linear or non- linear combination of the neighboring blocks.
  • the value for a given bit Q'(n) may be a function of multiple bits from block P and multiple bits from block R. For example, for a given value "n,” a given number of bits around bit L-n+l may used from block P while a given number of bits around bit n may used from block R.
  • a data replacement scheme may utilize neighboring data sets having a length of one or more bits.
  • a cross-fading scheme may provide a relatively low power and low latency way to effectively mitigate artifacts.
  • a scheme may have a relatively low processing load since relatively simple operations (e.g., Equation 1) are performed on low bit- width data.
  • relatively simple operations e.g., Equation 1
  • such a scheme may have relatively low latency since the latency may be based in some aspects on the length L of the blocks and the processing time of these simple bit-wise operations.
  • the latency time associated with identifying data (e.g., block Q) and replacing the identified data is based on at least one of: the size of one or more of the subsets (e.g., block P and/or block R), or the size of the identified data.
  • FIG. 7 illustrates a sample system 700 employing a prediction-based scheme.
  • This scheme also may be used to detect and correct bits in error in an oversampled data stream such as an SDM bit stream.
  • an oversampled data stream such as an SDM bit stream.
  • the data is 1-bit encoded. It is also assumed that a block of data Q has been identified to contain some bits in error.
  • w is the number of samples in the window over which the mean is taken. Typically, this will be the same as the oversampling ratio ("OSR") for the SDM encoder 208.
  • OSR oversampling ratio
  • OSR is typically very high (e.g., on the order of 20 or greater)
  • the samples are relatively close to one another. Consequently, the values of the samples may be approximated by a linear equation. For example, under error-free conditions:
  • T is a threshold that may be dynamically adapted to the signal under test.
  • T accounts for any non-linearity associated with a plot of the values of the samples n, n- ⁇ and n-2.
  • the predicted value of b mean (n) may thus be represented by:
  • Equation 5 thus represents a way to determine whether the PCM equivalent of a given bit is within an expected range. If the PCM equivalent is within the range, it is assumed that the value of the associated bit (e.g., b(n)) is not in error. Thus, the value of the bit is not changed.
  • the value of the associated bit may be checked to determine whether the value of the bit corresponds in an expected manner to the deviation (i.e., high or low) of that bit's PCM equivalent relative to the range. For example, in this case the validity for Equation 4 for each b(n) in Q may be tested. If this equation is violated, the following conditions arise:
  • the block of data shown may be identified as having at least one error as discussed herein.
  • the data identifier 504 may identify this data block.
  • each of the bits in the block may be checked to determine whether a given bit is in error.
  • the data identifier 504 also may identify each bit during this process.
  • bit 1 precedes bits 2 and 3 in time.
  • the data acquirer 506 may identify the neighboring bits 1 and 2.
  • the data acquirer 506 may identify first, second, and third sets of bits associated with bits 1, 2, and 3, respectively (as indicated by the lines with different line patterns).
  • the data generator 510 may comprise an average calculator (e.g., employing a boxcar averaging function) that is configured to calculate an average of each of these sets (e.g., PCM equivalent values). These operations are represented by the average calculators 702A, 702B, and 702C in FIG. 7.
  • the data generator 510 may include a function 704 (e.g., a linear predictor based on Equation 4 discussed above) that processes the results of the average calculations using, for example, Equation 5.
  • the function 704 may then determine whether to flip the value of bit 3 based on Equations 6 and 7 and the current value of bit 3.
  • the data replacer 512 of FIG. 5 may change the value of a single bit if a bit flip is indicated by Equation 6 or 7.
  • Prediction operations may be implemented in various ways.
  • the function 704 may comprise a linear function (e.g., a first order curve) or a non- linear function (e.g., second, third, etc., order curves).
  • a prediction may be based on two or more than two preceding bits.
  • the threshold T and/or the coefficients of the prediction equation may be adaptive (e.g., based on signal frequency or some other factor).
  • more than one bit may be adjusted (e.g., flipped) based on the prediction operation.
  • a function other than averaging may be used to operate on the sets of bits.
  • a prediction scheme as taught above may thus provide a low power and low latency way to mitigate artifacts.
  • Such a scheme may have a relatively low processing load since relatively simple operations (e.g., Equations 5 - 7) are performed on low bit- width data.
  • relatively simple operations e.g., Equations 5 - 7
  • relatively low latency e.g., essentially no latency
  • it is predictive in nature e.g., relies on bits that precede any bit being corrected.
  • FIG. 8 illustrates a sample system 800 implementing an interpolation-based scheme. This scheme also may be used to detect and correct bits in error in an oversampled data stream such as an SDM bit stream. Again, it is assumed that a block of data Q of length L has been identified to contain one or more bits in error. [0088] Let b(n) be the first sample in block Q. In some aspects, all of the elements of block Q may be replaced based on an interpolation (e.g., a linear interpolation) between b mean (n-l) and b mean (n-l+L). As described above for the prediction-based scheme of FIG.
  • an interpolation e.g., a linear interpolation
  • b mean (n-l) represents the PCM equivalent of the w samples in the neighborhood o ⁇ b(n-l).
  • the above operation may be equivalent to linear interpolation between ZvOSR samples in the PCM domain.
  • this operation may reflect as a linear interpolation over a very small number of samples when the OSR is high. Accordingly, such a scheme may effectively smooth artifacts (e.g., clicks and pops) while introducing relatively minimal distortions in the oversampled data.
  • a block of data identified as containing one or more errors e.g., by the data identifier 504 of FIG.
  • the neighboring data acquirer 506 of FIG. 5 may identify bits on either side of the identified block as anchor points 810A and 810B for generating substitute data 808 for the identified block.
  • the neighboring data acquirer 506 may identify a first set of bits associated with the anchor point 810A and a second set of bits associated with the anchor point 810B.
  • the data generator 510 of FIG. 5 may then generate values as a function of each set of bits. For example, the data generator 510 may calculate an average (e.g., a PCM equivalent value) associated with each of the anchor points 810A and 810B.
  • an average e.g., a PCM equivalent value
  • These operations are represented by the average calculators 802A and 802B in FIG. 8.
  • the average calculator 802A operates on a set of bits including the anchor point 810A and a number of bits preceding that anchor point.
  • the average calculator 802B operates on a set of bits including the anchor point 810B and a number of bits following that anchor point.
  • the data generator 510 may include a function 804 (e.g., a linear interpolator) that processes the results of the average calculations to provide the substitute data 808 for the identified block.
  • a function 804 e.g., a linear interpolator
  • the value for a given bit n in the identified block may be set to a value based on a linear interpolation between the PCM equivalent calculated for the anchor point 810A (dubbed PCMEl in the example that follows) and the PCM equivalent calculated for the anchor point 810B (PCME2).
  • the substitute value Q'(n) for a given bit of the identified block may be:
  • the interpolation scheme also may provide a low power and low latency way to effectively mitigate artifacts.
  • such a scheme may have a relatively low processing load since relatively simple operations (e.g., averaging associated with calculating PCM equivalents) are performed on low bit-width data.
  • such a scheme may have relatively low latency since the latency may be based in some aspects on the length of the blocks and the processing time of the above bit- wise operations.
  • the teachings herein may be advantageously employed to process errors in data.
  • the disclosed scheme may provide low latency and provide high quality filtering by exploiting the high data-rate and noise- shaping properties of oversampled encoded bit streams (e.g., an SDM bit stream).
  • the disclosure thus provides an effective way to minimize audio artifacts introduced due to bit-errors in an encoded bit stream.
  • the above techniques may be specialized to specific bit- widths in the stream and for any OSR. The examples given above are intended to be for illustration only and are not intended to limit the number of ways that artifact (e.g., click and pop) elimination may be implemented in a bit stream.
  • FIG. 9 depicts several sample components that may be employed to facilitate communication between devices.
  • a first device 902 and a second device 904 are adapted to communicate via a wireless communication link 906 over a suitable medium.
  • a transmit (“TX”) data processor 908 receives traffic data (e.g., data packets) from a data buffer 910 or some other suitable component.
  • the transmit data processor 908 processes (e.g., encodes, interleaves, and symbol maps) each data packet based on a selected coding and modulation scheme, and provides data symbols.
  • a data symbol is a modulation symbol for data
  • a pilot symbol is a modulation symbol for a pilot (which is known a priori).
  • a modulator 912 receives the data symbols, pilot symbols, and possibly signaling for the reverse link, and performs modulation (e.g., OFDM or some other suitable modulation) and/or other processing as specified by the system, and provides a stream of output chips.
  • a transmitter (“TMTR") 914 processes (e.g., converts to analog, filters, amplifies, and frequency upconverts) the output chip stream and generates a modulated signal, which is then transmitted from an antenna 916.
  • the modulated signals transmitted by the device 902 (along with signals from other devices in communication with the device 904) are received by an antenna 918 of the device 904.
  • a receiver (“RCVR”) 920 processes (e.g., conditions and digitizes) the received signal from the antenna 918 and provides received samples.
  • a demodulator (“DEMOD”) 922 processes (e.g., demodulates and detects) the received samples and provides detected data symbols, which may be a noisy estimate of the data symbols transmitted to the device 904 by the other device(s).
  • a receive (“RX”) data processor 924 processes (e.g., symbol demaps, deinterleaves, and decodes) the detected data symbols and provides decoded data associated with each transmitting device (e.g., device 902).
  • a forward link Components involved in sending information from the device 904 to the device 902 (e.g., a forward link) will be now be treated.
  • traffic data is processed by a transmit (“TX") data processor 926 to generate data symbols.
  • a modulator 928 receives the data symbols, pilot symbols, and signaling for the forward link, performs modulation (e.g., OFDM or some other suitable modulation) and/or other pertinent processing, and provides an output chip stream, which is further conditioned by a transmitter (“TMTR") 930 and transmitted from the antenna 918.
  • signaling for the forward link may include power control commands and other information (e.g., relating to a communication channel) generated by a controller 932 for all devices (e.g. terminals) transmitting on the reverse link to the device 904.
  • the modulated signal transmitted by the device 904 is received by the antenna 916, conditioned and digitized by a receiver (“RCVR”) 934, and processed by a demodulator (“DEMOD”) 936 to obtain detected data symbols.
  • a receive (“RX”) data processor 938 processes the detected data symbols and provides decoded data for the device 902 and the forward link signaling.
  • a controller 940 receives power control commands and other information to control data transmission and to control transmit power on the reverse link to the device 904.
  • the controllers 940 and 932 direct various operations of the device 902 and the device 904, respectively. For example, a controller may determine an appropriate filter, reporting information about the filter, and decode information using a filter.
  • Data memories 942 and 944 may store program codes and data used by the controllers 940 and 932, respectively.
  • FIG. 9 also illustrates that the communication components may include one or more components that perform filtering operations as taught herein.
  • a filter control component 946 may cooperate with the RX data processor 938 and/or other components of the device 902 to receive information from another device (e.g., device 904).
  • a filter control component 948 may cooperate with the RX data processor 924 and/or other components of the device 904 to receive information from another device (e.g., device 902).
  • a single processing component may provide the functionality of the filter control component 946 and the RX data processor 938 and a single processing component may provide the functionality of the filter control component 948 and the RX data processor 924.
  • a device may include various components that perform functions based on signals (e.g., data) that are transmitted by or received at the device or otherwise obtained or used by the device.
  • a headset e.g., a wireless headset
  • a transducer adapted to provide an audio output based on data (e.g., received data and/or oversampled data).
  • a watch e.g., a wireless watch
  • a user interface adapted to provide an indication based on data (e.g., received data and/or oversampled data).
  • a sensing device may include a sensor adapted to sense or to provide data to be transmitted based on data (e.g., received data and/or oversampled data). For example, the sensing operation may be controlled in some aspects by control information in the data.
  • a wireless device may communicate via one or more wireless communication links that are based on or otherwise support any suitable wireless communication technology.
  • a wireless device may associate with a network.
  • the network may comprise a personal area network (e.g., supporting a wireless coverage area on the order of 30 meters) or a body area network (e.g., supporting a wireless coverage area on the order of 10 meters) implemented using ultra- wideband technology or some other suitable technology.
  • the network may comprise a local area network or a wide area network.
  • a wireless device may support or otherwise use one or more of a variety of wireless communication technologies, protocols, or standards such as, for example, CDMA, TDMA, OFDM, OFDMA, WiMAX, and Wi-Fi.
  • a wireless device may support or otherwise use one or more of a variety of corresponding modulation or multiplexing schemes.
  • a wireless device may thus include appropriate components (e.g., air interfaces) to establish and communicate via one or more wireless communication links using the above or other wireless communication technologies.
  • a device may comprise a wireless transceiver with associated transmitter and receiver components that may include various components (e.g., signal generators and signal processors) that facilitate communication over a wireless medium.
  • a wireless device may communicate via an impulse-based wireless communication link.
  • an impulse-based wireless communication link may utilize ultra-wideband pulses that have a relatively short length (e.g., on the order of a few nanoseconds or less) and a relatively wide bandwidth.
  • the ultra- wideband pulses may have a fractional bandwidth on the order of approximately 20% or more and/or have a bandwidth on the order of approximately 500 MHz or more.
  • teachings herein may be incorporated into (e.g., implemented within or performed by) a variety of apparatuses (e.g., devices).
  • a phone e.g., a cellular phone
  • PDA personal data assistant
  • an entertainment device e.g., a music or video device
  • a headset e.g., headphones, an earpiece, etc.
  • a microphone e.g., a medical sensing device (e.g., a biometric sensor, a heart rate monitor, a pedometer, an EKG device, a smart bandage, etc.), a user I/O device (e.g., a watch, a remote control, a light switch, a keyboard, a mouse, etc.), an environment sensing device (e.g., a tire pressure monitor), a computer, a point-of-sale device, an entertainment device, a hearing aid, a set-top box, or any other suitable device
  • a medical sensing device e.g
  • teachings herein may be adapted for use in low power applications (e.g., through the use of an impulse-based signaling scheme and low duty cycle modes) and may support a variety of data rates including relatively high data rates (e.g., through the use of high-bandwidth pulses).
  • a wireless device may comprise an access device (e.g., an access point) for a communication system.
  • an access device may provide, for example, connectivity to another network (e.g., a wide area network such as the Internet or a cellular network) via a wired or wireless communication link.
  • the access device may enable another device (e.g., a wireless station) to access the other network or some other functionality.
  • another device e.g., a wireless station
  • one or both of the devices may be portable or, in some cases, relatively non-portable.
  • a wireless device also may be capable of transmitting and/or receiving information in a non-wireless manner (e.g., via a wired connection) via an appropriate communication interface.
  • apparatuses 1000 and 1100 are represented as a series of interrelated functional blocks that may represent functions implemented by, for example, one or more integrated circuits (e.g., an ASIC) or may be implemented in some other manner as taught herein.
  • an integrated circuit may include a processor, software, other components, or some combination thereof.
  • the apparatuses 1000 and 1100 may include one or more modules that may perform one or more of the functions described above with regard to various figures.
  • an ASIC for receiving encoded data 1002 may correspond to, for example, a receiver as discussed herein.
  • An ASIC for determining at least one error 1004 may correspond to, for example, an error detector as discussed herein.
  • An ASIC for identifying data 1102 may correspond to, for example, a data identifier as discussed herein.
  • An ASIC for acquiring subsets 1104 may correspond to, for example, a data acquirer as discussed herein.
  • An ASIC for generating substitute data 1106 may correspond to, for example, a data generator as discussed herein.
  • An ASIC for replacing identified data 1108 may correspond to, for example, a data replacer as discussed herein.
  • An ASIC for SDM encoding 1110 may correspond to, for example, a sigma- delta modulation encoder as discussed herein.
  • An ASIC for upsampling 1112 may correspond to, for example, an upsampler as discussed herein.
  • these components may be implemented via appropriate processor components. These processor components may in some aspects be implemented, at least in part, using structure as taught herein. In some aspects a processor may be adapted to implement a portion or all of the functionality of one or more of these components. In some aspects one or more of the components represented by dashed boxes are optional.
  • the apparatuses 1000 and 1100 may comprise one or more integrated circuits.
  • a single integrated circuit may implement the functionality of one or more of the illustrated components, while in other aspects more than one integrated circuit may implement the functionality of one or more of the illustrated components.
  • FIGS. 10 and 11 may be implemented using any suitable means. Such means also may be implemented, at least in part, using corresponding structure as taught herein.
  • the components described above in conjunction with the "ASIC for" components of FIGS. 10 and 11 also may correspond to similarly designated “means for” functionality.
  • one or more of such means may be implemented using one or more of processor components, integrated circuits, or other suitable structure as taught herein.
  • any reference to an element herein using a designation such as “first,” “second,” and so forth does not generally limit the quantity or order of those elements.
  • any of the various illustrative logical blocks, modules, processors, means, circuits, and algorithm steps described in connection with the aspects disclosed herein may be implemented as electronic hardware (e.g., a digital implementation, an analog implementation, or a combination of the two, which may be designed using source coding or some other technique), various forms of program or design code incorporating instructions (which may be referred to herein, for convenience, as "software” or a "software module”), or combinations of both.
  • software or a “software module”
  • the various illustrative logical blocks, modules, and circuits described in connection with the aspects disclosed herein may be implemented within or performed by an integrated circuit ("IC"), an access terminal, or an access point.
  • the IC may comprise a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, electrical components, optical components, mechanical components, or any combination thereof designed to perform the functions described herein, and may execute codes or instructions that reside within the IC, outside of the IC, or both.
  • a general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine.
  • a processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
  • any specific order or hierarchy of steps in any disclosed process is an example of a sample approach. Based upon design preferences, it is understood that the specific order or hierarchy of steps in the processes may be rearranged while remaining within the scope of the present disclosure.
  • the accompanying method claims present elements of the various steps in a sample order, and are not meant to be limited to the specific order or hierarchy presented.
  • a software module e.g., including executable instructions and related data
  • other data may reside in a data memory such as RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, a removable disk, a CD-ROM, or any other form of computer-readable storage medium known in the art.
  • a sample storage medium may be coupled to a machine such as, for example, a computer/processor (which may be referred to herein, for convenience, as a "processor") such the processor can read information (e.g., code) from and write information to the storage medium.
  • a sample storage medium may be integral to the processor.
  • the processor and the storage medium may reside in an ASIC.
  • the ASIC may reside in user equipment.
  • the processor and the storage medium may reside as discrete components in user equipment.
  • any suitable computer-program product may comprise a computer-readable medium comprising codes (e.g., executable by at least one computer) relating to one or more of the aspects of the disclosure.
  • a computer program product may comprise packaging materials.

Abstract

Selon la présente invention, des techniques à faible latence et efficaces d'un point de vue du calcul peuvent être utilisées pour rendre compte d'erreurs dans des données telles que des données suréchantillonnées à faible largeur de bit. Selon certains aspects, ces techniques peuvent être utilisées pour atténuer des artéfacts audio associés à des données audio à modulation sigma-delta. Selon certains aspects, une erreur peut être détectée dans un ensemble de données codées sur la base d'un résultat d'un processus de décodage de voie.
PCT/US2008/069056 2008-04-15 2008-07-02 Détection d'erreur basée sur un décodage de voie WO2009128851A1 (fr)

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EP08781295A EP2269337A1 (fr) 2008-04-15 2008-07-02 Détection d'erreur basée sur un décodage de voie
CN200880128626.3A CN102007721B (zh) 2008-04-15 2008-07-02 基于信道解码的错误检测
JP2011504991A JP2011517255A (ja) 2008-04-15 2008-07-02 チャネルデコーディングに基づいたエラー検出
KR1020107025574A KR101254606B1 (ko) 2008-04-15 2008-07-02 채널 디코딩 기반 에러 검출

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US4517208P 2008-04-15 2008-04-15
US61/045,172 2008-04-15
US12/146,301 US8423852B2 (en) 2008-04-15 2008-06-25 Channel decoding-based error detection
US12/146,301 2008-06-25

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Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8423852B2 (en) * 2008-04-15 2013-04-16 Qualcomm Incorporated Channel decoding-based error detection
CN101931414B (zh) * 2009-06-19 2013-04-24 华为技术有限公司 脉冲编码方法及装置、脉冲解码方法及装置
JP5844266B2 (ja) 2009-10-21 2016-01-13 ドルビー・インターナショナル・アクチボラゲットＤｏｌｂｙ Ｉｎｔｅｒｎａｔｉｏｎａｌ Ａｂ 適応オーバーサンプリングを用いる高周波数オーディオ信号を発生させるための装置および方法
JP2011237753A (ja) * 2010-04-14 2011-11-24 Sony Corp 信号処理装置および方法、並びにプログラム
TWI563498B (en) 2011-02-14 2016-12-21 Fraunhofer Ges Forschung Apparatus and method for encoding an audio signal using an aligned look-ahead portion, and related computer program
TWI480857B (zh) 2011-02-14 2015-04-11 Fraunhofer Ges Forschung 在不活動階段期間利用雜訊合成之音訊編解碼器
AR085218A1 (es) * 2011-02-14 2013-09-18 Fraunhofer Ges Forschung Aparato y metodo para ocultamiento de error en voz unificada con bajo retardo y codificacion de audio
MY166394A (en) 2011-02-14 2018-06-25 Fraunhofer Ges Forschung Information signal representation using lapped transform
MY159444A (en) 2011-02-14 2017-01-13 Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung E V Encoding and decoding of pulse positions of tracks of an audio signal
PT2676270T (pt) 2011-02-14 2017-05-02 Fraunhofer Ges Forschung Codificação de uma parte de um sinal de áudio utilizando uma deteção de transiente e um resultado de qualidade
KR101699898B1 (ko) 2011-02-14 2017-01-25 프라운호퍼 게젤샤프트 쭈르 푀르데룽 데어 안겐반텐 포르슝 에. 베. 스펙트럼 영역에서 디코딩된 오디오 신호를 처리하기 위한 방법 및 장치
EP2676267B1 (fr) 2011-02-14 2017-07-19 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Codage et décodage des positions des impulsions des voies d'un signal audio
US8943120B2 (en) * 2011-12-22 2015-01-27 International Business Machines Corporation Enhanced barrier operator within a streaming environment
JP5737357B2 (ja) * 2013-10-18 2015-06-17 オンキヨー株式会社 音楽再生装置及び音楽再生プログラム
US9769550B2 (en) 2013-11-06 2017-09-19 Nvidia Corporation Efficient digital microphone receiver process and system
US9454975B2 (en) * 2013-11-07 2016-09-27 Nvidia Corporation Voice trigger
US9768912B2 (en) * 2014-09-23 2017-09-19 Cavium, Inc. Method and apparatus for quantizing soft information using linear quantization
GB2531532B (en) * 2014-10-20 2020-12-30 Cambridge Consultants Radio frequency amplifier
US10262259B2 (en) * 2015-05-08 2019-04-16 Qualcomm Incorporated Bit width selection for fixed point neural networks
US10019223B2 (en) * 2015-09-03 2018-07-10 Shure Acquisition Holdings, Inc. Soft decision audio decoding system
CN107068157B (zh) * 2017-02-21 2020-04-10 中国科学院信息工程研究所 一种基于音频载体的信息隐藏方法及系统
US10387253B2 (en) * 2017-08-25 2019-08-20 Datera, Inc. System and method to utilize larger block sizes for logical disk and further decompose into smaller physical block sizes for redundant encoding by utilizing erasure coding
US11314584B1 (en) * 2020-11-25 2022-04-26 International Business Machines Corporation Data quality-based confidence computations for KPIs derived from time-series data

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996026583A1 (fr) * 1995-02-23 1996-08-29 Nokia Telecommunications Oy Procede pour determiner la qualite d'une communication ainsi qu'un recepteur
WO2003055195A2 (fr) * 2001-12-18 2003-07-03 Globespan Virata Incorporated Procede et systeme de shdsl a vitesse amelioree
EP1416660A1 (fr) * 2002-10-31 2004-05-06 Alcatel Décodeur et procédé de décodage FEC amélioré
WO2006062607A1 (fr) * 2004-12-12 2006-06-15 Hewlett-Packard Development Company, L.P. Detection et correction d'erreurs

Family Cites Families (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4542222A (en) * 1980-12-29 1985-09-17 Ciba-Ceigy Corporation Benzimidazoles
DE3133873A1 (de) * 1981-08-27 1983-03-17 Siemens AG, 1000 Berlin und 8000 München Gradientenspulen-system fuer eine einrichtung der kernspinresonanz-technik
JP2597987B2 (ja) 1986-02-08 1997-04-09 ソニー株式会社 ブロツク化伝送信号のデコード装置
US5067141A (en) * 1986-08-07 1991-11-19 International Mobile Machine Corporation Interpolator for varying a signal sampling rate
JP2606239B2 (ja) 1987-10-30 1997-04-30 株式会社富士通ゼネラル １１９番回線の転送装置
JP2748935B2 (ja) 1987-12-25 1998-05-13 旭化成工業株式会社 シンジオタクチックポリスチレン系フイルム
US4843390A (en) * 1988-02-24 1989-06-27 Motorola, Inc. Oversampled A/D converter having digital error correction
JP2624867B2 (ja) * 1990-03-27 1997-06-25 シャープ株式会社 ディジタル情報記録再生装置の記録位置補正回路
JPH0458628A (ja) * 1990-06-28 1992-02-25 Matsushita Electric Ind Co Ltd 波形補償方法
JPH0738608B2 (ja) 1990-11-14 1995-04-26 松下電器産業株式会社 衛星受信機ｃ／ｎ表示装置
JP3328704B2 (ja) 1991-06-28 2002-09-30 オムロン株式会社 サスペンション制御装置におけるしきい値変更装置および方法
US5255339A (en) * 1991-07-19 1993-10-19 Motorola, Inc. Low bit rate vocoder means and method
JPH05300102A (ja) 1992-04-20 1993-11-12 Mitsubishi Electric Corp オーディオ信号シリアル伝送装置
JPH07110278B2 (ja) 1993-03-29 1995-11-29 住友ベークライト株式会社 超音波手術装置
WO1995001008A1 (fr) 1993-06-21 1995-01-05 Oki Electric Industry Co., Ltd. Methode de comptage des erreurs sur les bits et compteur
FI94810C (fi) * 1993-10-11 1995-10-25 Nokia Mobile Phones Ltd Menetelmä huonon GSM-puhekehyksen tunnistamiseksi
JPH08172359A (ja) 1994-12-20 1996-07-02 Sony Corp シグマデルタ信号の処理装置
US5973601A (en) * 1995-12-06 1999-10-26 Campana, Jr.; Thomas J. Method of radio transmission between a radio transmitter and radio receiver
ES1030459Y (es) 1995-03-22 1996-06-01 Tremoya S L Selector de monedas perfeccionado.
JPH08329626A (ja) 1995-03-24 1996-12-13 Sony Corp ディジタルデータの補間装置、再生装置、記録装置及び補間方法
EP0734022B1 (fr) 1995-03-24 2001-05-16 Sony Corporation Procédé et appareil pour l'interpolation de données numériques
GB2306866B (en) * 1995-10-26 1998-08-05 Bosch Gmbh Robert Method of obtaining information about the residual errors in a transmitted channel-decoded digital signal
JP4150084B2 (ja) 1995-11-24 2008-09-17 ソニー株式会社 ディスク記録媒体
US5748126A (en) * 1996-03-08 1998-05-05 S3 Incorporated Sigma-delta digital-to-analog conversion system and process through reconstruction and resampling
US5943347A (en) * 1996-06-07 1999-08-24 Silicon Graphics, Inc. Apparatus and method for error concealment in an audio stream
US5787247A (en) * 1996-07-12 1998-07-28 Microsoft Corporation Replica administration without data loss in a store and forward replication enterprise
US6049766A (en) * 1996-11-07 2000-04-11 Creative Technology Ltd. Time-domain time/pitch scaling of speech or audio signals with transient handling
JP3441040B2 (ja) 1997-02-18 2003-08-25 シャープ株式会社 １ビット信号のエラー検知方法および補完方法ならびに装置
JPH1117557A (ja) * 1997-05-01 1999-01-22 Mitsubishi Electric Corp 誤り訂正方法及び誤り訂正装置
JPH1168709A (ja) * 1997-08-13 1999-03-09 Mitsubishi Electric Corp 受信ディジタルデータの誤り検出装置
US6192500B1 (en) * 1998-02-11 2001-02-20 Conexant Systems, Inc. Method and apparatus for enhanced performance in a system employing convolutional decoding
US6310909B1 (en) * 1998-12-23 2001-10-30 Broadcom Corporation DSL rate adaptation
US7302396B1 (en) * 1999-04-27 2007-11-27 Realnetworks, Inc. System and method for cross-fading between audio streams
JP2004507019A (ja) * 2000-08-11 2004-03-04 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ エラーをコンシールする方法および構成
WO2002045420A1 (fr) * 2000-11-29 2002-06-06 Sony Corporation Processeur de trains de donnees
US7197098B2 (en) * 2000-12-29 2007-03-27 Intel Corporation High-speed serial data recovery
JP2002208913A (ja) 2001-01-04 2002-07-26 Hitachi Kokusai Electric Inc 誤り訂正復号化情報の信頼度設定方式
SG115481A1 (en) * 2001-06-13 2005-10-28 Ntt Docomo Inc Mobile communication systems, mobile communication methods, base stations, mobile stations, and signal transmission methods in the mobile communication systems
JP4271903B2 (ja) 2001-06-13 2009-06-03 株式会社エヌ・ティ・ティ・ドコモ 移動体通信システム及び移動体通信方法
US7003704B2 (en) * 2002-11-12 2006-02-21 International Business Machines Corporation Two-dimensional redundancy calculation
ITMI20022535A1 (it) * 2002-11-29 2004-05-30 Synteco Spa Procedimento per la purificazione della diacereina.
US7813322B2 (en) * 2003-02-19 2010-10-12 Qualcomm Incorporated Efficient automatic repeat request methods and apparatus
JP2004361731A (ja) * 2003-06-05 2004-12-24 Nec Corp オーディオ復号装置及びオーディオ復号方法
US6980026B1 (en) * 2003-12-16 2005-12-27 Xilinx, Inc. Structures and methods for reducing power consumption in programmable logic devices
JP5020807B2 (ja) 2004-03-23 2012-09-05 ザ リージェンツ オブ ザ ユニバーシティ オブ カリフォルニア ネットワーク上で収集されるセンサデータの信頼性を高める装置と方法
US20050289433A1 (en) * 2004-06-25 2005-12-29 Itschak Weissman Discrete universal denoising with error correction coding
TWI242929B (en) 2004-12-01 2005-11-01 Ind Tech Res Inst Clock and data recovery apparatus and method thereof
US7398454B2 (en) 2004-12-21 2008-07-08 Tyco Telecommunications (Us) Inc. System and method for forward error correction decoding using soft information
US7386771B2 (en) * 2006-01-06 2008-06-10 International Business Machines Corporation Repair of memory hard failures during normal operation, using ECC and a hard fail identifier circuit
KR100858241B1 (ko) * 2006-10-25 2008-09-12 삼성전자주식회사 하이브리드 플래시 메모리 장치 및 그것의 가용 블록 할당방법
US8069051B2 (en) * 2007-09-25 2011-11-29 Apple Inc. Zero-gap playback using predictive mixing
US8130886B2 (en) * 2008-01-09 2012-03-06 Analog Devices, Inc. Samples of bandlimited signals recovery system and method
US8423852B2 (en) * 2008-04-15 2013-04-16 Qualcomm Incorporated Channel decoding-based error detection

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996026583A1 (fr) * 1995-02-23 1996-08-29 Nokia Telecommunications Oy Procede pour determiner la qualite d'une communication ainsi qu'un recepteur
WO2003055195A2 (fr) * 2001-12-18 2003-07-03 Globespan Virata Incorporated Procede et systeme de shdsl a vitesse amelioree
EP1416660A1 (fr) * 2002-10-31 2004-05-06 Alcatel Décodeur et procédé de décodage FEC amélioré
WO2006062607A1 (fr) * 2004-12-12 2006-06-15 Hewlett-Packard Development Company, L.P. Detection et correction d'erreurs

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