WO2008152548A1

WO2008152548A1 - Switched-mode dc-dc converter and an integrated system comprising such a converter

Info

Publication number: WO2008152548A1
Application number: PCT/IB2008/052235
Authority: WO
Inventors: Katarzyna Nowak; Derk Reefman
Original assignee: Nxp B.V.
Priority date: 2007-06-14
Filing date: 2008-06-06
Publication date: 2008-12-18

Abstract

The invention relates to a switched-mode DC-DC converter (140) that is at least partially integrated on a chip. It comprises an input (INP) for receiving an input voltage (Vin) from a voltage source (60), and an output (OUTP) for supplying the supply voltage (Vout). An energy transfer path extends from the input (INP) to the output (OUTP), the energy transfer path comprising an energy-storage element (L, Cl) for storing energy retrieved from the input (INP) in a first time period (STl) and for releasing energy towards the output (OUTP) in a second time period (ST2). The energy transfer path further comprises a switching element (Sl, Tl) for activating the storing of the energy in the energy- storage element (L, Cl) when closed during the first time period (STl), and a controller (162, 166). The controller (162, 166) is for supplying a control signal to the switching element (Sl, Tl) to define a duration of the first time period (STl), for receiving a disabling signal (STB) defining the inactive time period of the electronic circuit (30), and for disabling the control signal in response to the disabling signal (STB) for disabling the storing of energy in the energy storage element during the inactive time period. The invention further relates to an integrated system (5) comprising such a DC-DC converter (140), which then benefits from either a reduction of the overall power dissipation during an inactive period. Alternatively this system (5) may benefit from an area reduction, because of the fact that conventional power switches (70) may be dispensed with. Reverse back-biasing may be applied to the switching elements (Tl, T2) in order to reduce their off- state leakage current.

Description

SWITCHED-MODE DC-DC CONVERTER AND AN INTEGRATED SYSTEM COMPRISING SUCH A CONVERTER

FIELD OF THE INVENTION

The invention relates to a switched-mode DC-DC converter for use in an integrated system with an electronic circuit having an inactive time period and for generating a supply voltage for the electronic circuit and to an integrated system comprising such a converter.

BACKGROUND OF THE INVENTION

Various types of DC-DC converters are known. In general DC-DC converters receive an input voltage on their input and produce a supply voltage for an electronic circuit on their output. One class of DC-DC converters comprises a conversion circuit comprising an inductive element connected between an intermediate node and an output of the DC-DC converter for storing and releasing magnetic energy. The conversion circuit further comprises an output capacitor connected between the output and ground. The inductive element is driven by a switching inverter comprising two transistors (typically NMOS and PMOS): an NMOS transistor connected between ground and the intermediate node, and a PMOS transistor connected between the input and the intermediate node. The alternating switching off and on of both transistors is determined by the signal produced by a pulse-width modulator. The pulse-width modulator is a part of a controller of a DC-DC converter which task is to regulate the output voltage of the DC-DC converter. This is done by sensing the output current or voltage of the DC-DC converter and via a feedback loop to adjust the switching scheme of the NMOS and PMOS transistor of the switching inverter. The DC-DC converter supplies power to an output load impedance connected between the output and ground. The output load is for example an electronic circuit receiving the supply voltage from the DC-DC converter. The control signals generated by the pulse-width modulator form repetitive signals (pulses), at least one of the control signals has a duty cycle which is controlled in response to the sensed supply voltage to stabilize the supply voltage on the output. The converter here described constitutes a switched-mode step-down converter. Similarly, switched-mode step-up converters, and switched-mode converters capable of both up-and-down conversion exist. Such switched-mode DC-DC converters generally make use of an inductive element in which magnetic energy retrieved from the input is stored in a first period and released towards the output in a second period.

A disadvantage of this type of switched-mode DC-DC converters is that it is not adapted for use in integrated system with an electronic circuit having an inactive time period. During this inactive time period the DC-DC converter continues to dissipate power.

SUMMARY OF THE INVENTION

It is an object of the invention to provide a switched-mode DC-DC converter of the kind set forth in the opening paragraph which is adapted for use in integrated systems with an electronic circuit having an inactive time period such that its power dissipation is reduced during the inactive time period. The invention is defined by the independent claims. The dependent claims define advantageous embodiments.

In a first aspect, the invention relates to a switched-mode DC-DC converter of the kind set forth in the opening paragraph, which comprises: an input for receiving an input voltage from a voltage source; - an output for supplying the supply voltage; an energy transfer path extending from the input to the output, the energy transfer path comprising an energy-storage element for storing energy retrieved from the input in a first time period and for releasing energy towards the output in a second time period, the energy transfer path further comprising a switching element for activating the storing of the energy in the energy- storage element when closed during the first time period, and a controller

(i) for supplying a control signal to the switching element to define a duration of the first time period; (ii) for receiving a disabling signal defining the inactive time period of the electronic circuit, and

(iii) for disabling the control signal in response to the disabling signal for disabling the storing of energy in the energy storage element during the inactive time period. The effect of the measures according to the invention is that during an inactive time period of the electronic circuit the control signal controlling the switching element is deactivated by a disabling signal. The disabling signal may for example comprise a pulse having a duration which corresponds to the inactive time period of the electronic circuit. The switching element in a switched-mode DC-DC converter is generally designed for having a low resistance and needs to be large. Switching off this large switching element during the inactive time period significantly reduces the power dissipation of the DC-DC converter. Moreover, it is the insight of the inventors that during an inactive time period of the electronic circuit having a duration smaller than lms, the supply current may be provided by a discharge current of the total capacitance of the supply network of the electronic circuit even when a very small supply current is requested by an electronic circuit connected to the output. Expressed differently, even when the DC-DC converter is "switched off, the output voltage will not drop to zero instantaneously, because of the capacitance of the supply network. In a first group of embodiments the energy- storage element is an inductive element, and in a second main group of embodiments the energy- storage element is a capacitive element. Both types of energy-storage elements may be conveniently used for storing and releasing energy in a DC-DC converter.

In an embodiment of the switched-mode DC-DC converter according to the invention an output capacitance coupled to the output for smoothing the supply voltage. The presence of the capacitor has the advantage that the DC-DC converter may provide a larger supply current during the inactive time period of the electronic circuit. When the DC-DC converter is switched off during the inactive time period, the supply current on the output will show an exponential decrease with a certain time constant. This means that, alternatively, the output capacitance may be used to create a larger time constant (it adds to the total parasitic capacitance of the supply network) of the decreasing supply current during the inactive time period. Consequently, the same requested amount of supply current by the electronic circuit may be provided for a longer time period, than is the case when the output capacitance is not provided. In an embodiment of the switched-mode DC-DC converter according to the invention the energy transfer path further comprises a further switching element for activating the releasing of the energy in the energy- storage element when closed in the second time period. The further switching element may be advantageously used in combination with the switching element in such a way that the storing and releasing of magnetic energy in the inductive element is properly carried out without creating a short- circuit during a certain time period.

In an embodiment of the switched-mode DC-DC converter according to the invention the input comprises a first and a second input terminal, - the output comprises a first and a second output terminal, the energy transfer path is defined from the input terminals to the output terminals, and wherein the energy transfer path further comprises an intermediate node, the second input terminal and the second output terminal are both connected to a reference voltage, - the switching element is provided between the first input terminal and the intermediate node, the further switching element is provided between the intermediate node and the second input terminal, and the inductive element is provided between the intermediate node and the first output terminal .

This structure constitutes a Buck converter, which is a step-down converter. A Buck converter benefits from the invention, because disabling of the control signal for the switching element effectively prevents the storing of magnetic energy in the inductive element, whereafter the current in the inductive element will reduce. In other words, the Buck converter is switched off in a safe way.

In an embodiment of the switched-mode DC-DC converter according to the invention the further switching element comprises a diode being coupled with its cathode connected to the intermediate node. The use of a diode for the further switching element provides an asynchronous Buck converter which has the advantage that it is less complex. The diode automatically switches on and off, which is also being referred to as "freewheeling".

In an embodiment of the switched-mode DC-DC converter according to the invention the input comprises a first and a second input terminal, the output comprises a first and a second output terminal, - the energy transfer path is defined from the input terminals to the output terminals, the energy transfer path further comprises an intermediate node, the second input terminal and the second output terminal are both connected to a reference voltage, the inductive element is provided between the first input terminal and the intermediate node, the switching element is provided between the intermediate node and the second input terminal, and - the further switching element is provided between the intermediate node and the first output terminal.

This structure constitutes a Boost converter, which is a step-up converter. A Boost converter also benefits from the invention, because disabling of the control signal for the switching element effectively prevents the storing of magnetic energy in the inductive element, whereafter the current in the inductive element will reduce. It must be noted that the output voltage in of a Boost converter is higher than the input voltage, which results in a negative voltage on the inductive element, and hence a decreasing current. In other words, the Boost converter is switched off in a safe way.

In an embodiment of the switched-mode DC-DC converter according to the invention the further switching element comprises a diode being coupled with its cathode to the first output terminal. The use of a diode for the further switching element provides an asynchronous Boost converter which has the advantage that it is less complex. The diode automatically switches on and off, which is also being referred to as "freewheeling".

In an embodiment of the switched-mode DC-DC converter according to the invention the further switching element is an active device controlled by a further control signal, wherein the further control signal defines a duration of the second time period. This feature converts the DC-DC converter into a synchronous converter, which has the advantage that the converter has lower power losses at low duty cycles. However, a synchronous converter is more complex (and thus more costly), as the controller now may need to provide two (complementary) control signals.

In an embodiment of the switched-mode DC-DC converter according to the invention the controller further comprises a pulse-width modulator for sensing the supply voltage via a feedback loop and for generating the control signal in response to the sensed supply voltage, the control signal being a repetitive signal of which at least the first time period is controlled to stabilize the supply voltage on the output. This arrangement provides a DC-DC converter having a stable supply voltage on its output.

In an embodiment of the switched-mode DC-DC converter according to the invention the controller comprises a disable circuit for receiving the disabling signal, the disable circuit is arranged between the pulse-width modulator and the switching element for the disabling of the control signal in response to the disabling signal. Disabling the control signal between the pulse-width modulator and the switching element provides an arrangement which is easy to design. The pulse-width modulator may in that case be a conventional pulse-width modulator and does not need any modification at all. In an embodiment of the switched-mode DC-DC converter according to the invention the disable circuit has an output connected to a control input of the switching element, and an input receiving the control signal from the pulse-width modulator, wherein the disable circuit is constructed for producing a predetermined voltage level on the output in response to the disabling signal defining the inactive time period of the electronic circuit, wherein the predetermined voltage level is selected for keeping the switching element open. This embodiment is advantageous, because if the output voltage of the disable circuit in the active period is not properly defined the switching element may not be switched off properly.

Preferably, the disable circuit comprises a gating circuit having a first input receiving the control signal from the pulse-width modulator and a second input receiving the disabling signal, wherein a change in the disabling signal on the second input causes the output of the gating circuit to switch between the predetermined voltage level and a level equal to a voltage level on the first input. This arrangement conveniently provides the aforementioned functionality.

In an embodiment of the switched-mode DC-DC converter according to the invention the switching element comprises a MOS transistor having a bulk connection, and further comprising a back-bias input for receiving a reverse back-bias voltage that is supplied to the bulk connection. The switching element is generally arranged to have low resistance and therefore designed with a large area. An MOS transistor may advantageously be used for the switching element. However, in state-of-the art MOS technologies MOS transistors may not be switched off completely. Instead a leakage current may still run through it. A convenient way of reducing this leakage current is to increase the threshold voltage of the MOS transistors by applying a reverse back-bias voltage to its bulk connection. The result of this measure is that the overall power dissipation during the inactive time period of the electronic circuit may be further reduced. In an embodiment of the switched-mode DC-DC converter according to the invention the switched-mode DC-DC converter further comprises a back-bias generator for generating the reverse back-bias voltage. By integrating the back-bias generator into the DC- DC converter the external creation of the reverse back-bias voltage may be advantageously dispensed with. In a second aspect the invention relates to an integrated system comprising: the switched-mode DC-DC converter as claimed in any one of claims 1 to 14; a voltage domain comprising at least one electronic circuit having an inactive time period, the voltage domain receiving the supply voltage directly from the DC-DC converter, and a signal generator producing the disabling signal defining the inactive time period of the electronic circuit.

The advantage of the DC-DC converter according to the invention in this integrated system lies in the fact that as a matter of fact the original power switch needed for reducing the power dissipation in the inactive mode of the electronic circuit is no longer necessary. Instead, the inventors have realized that this functionality may be taken over by the switching element in the DC-DC converter, which also needs to be large in terms of chip area. Leaving out the power switches will therefore lead to a significant area reduction in the integrated system. This area reduction will be even more pronounced in integrated systems having a plurality of voltage domains, each having a plurality of electronic circuits.

In a third of aspect the invention relates to an integrated system comprising: the switched-mode DC-DC converter according to the invention; a voltage domain, the voltage domain comprising at least one electronic circuit having an inactive time period, the voltage domain receiving a regulated supply voltage from a power switch; the power switch receiving the supply voltage from the DC-DC converter and producing the regulated supply voltage on its output under control of the disabling signal, and a signal generator producing the disabling signal defining the inactive time period of the electronic circuit. In this system the power switch is used to further reduce the leakage current through the electronic circuit during the inactive time period. This power switch must be capable of carrying the relatively large supply current for the electronic circuit and should therefore be large. When implemented as a wide-channel MOS transistor it may not be switched off completely (especially in state-of-the-art technologies). There is a leakage current in the off-state and the wider the channel of the MOS transistor the larger the leakage current in the off-state. The switched-mode DC-DC converter according to the invention may therefore advantageously be used to further reduce leakage current in the inactive (standby) time period, because the supply current from the output of the DC-DC converter is very low (e.g. a discharge current of a parasitic capacitor). As a consequence, the fact that the power switches are leaky in the inactive time period of the electronic circuit, is less adversely affecting the power dissipation in the inactive time period.

These and other aspects of the invention are apparent from and will be elucidated with reference to the embodiments described hereinafter.

BRIEF DESCRIPTION OF THE DRAWINGS

In the drawings:

Fig. 1 shows a conventional integrated system comprising a power switch and a DC-DC converter; Fig. 2 shows an integrated system in accordance with a first embodiment of the invention;

Fig. 3 shows an integrated system in accordance with a second embodiment of the invention;

Figs. 4a and 4b show different types of switched-mode DC-DC converters. NOTE for Kasia: I did not update the Figures. I included a few extra lines in the description. This saves time (money). Moreover, it is not really that important for the application.

Fig. 5a shows a switched-mode DC-DC converter in accordance with a first embodiment of the invention;

Fig. 5b shows a switched-mode DC-DC converter in accordance with a second embodiment of the invention;

Fig. 6a shows a switched-mode DC-DC converter in accordance with a third embodiment of the invention, and

Fig. 6b shows a timing diagram of the switched-mode DC-DC converter of Fig. 6a.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. Use of the verb "comprise" and its conjugations does not exclude the presence of elements or steps other than those stated in a claim. The article "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the device claim enumerating several means, several of these means may be embodied by one and the same item of hardware. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. Power consumption of today's integrated circuits (ICs) is largely dominated by dynamic and static power consumption. The dynamic power consumption is caused by switching events in an electronic circuit (i.e. charging of on-chip capacitances) and is associated with the active mode of the electronic circuit. The static power consumption is predominantly caused by transistor leakage current that runs from power to ground. There are also other (but much smaller) sources of leakage current, e.g. gate and junction leakage.

Leakage current results in a leakage power dissipation. Further down-scaling the technology will lead to a further increase of the leakage current, which makes the contribution of the leakage power to the total chip power consumption becoming more and more significant. When the circuit is in an idle (standby) mode, this is the only component contributing to the power consumption, and therefore also determines battery lifetime in stand-alone applications. To overcome this effect, various power management techniques are applied to ICs.

Fig. 1 illustrates one of these techniques, called power gating, in a conventional integrated system comprising a power switch and a DC-DC converter. Power gating is one of the power reduction techniques commonly applied to ICs when they are realized as a system-on-a-chip (SoC) or a system-in-a-package (SiP). Power gating is implemented by the insertion of power switches between power supply rails and supply pins of so called SoC voltage domains that combine electronic circuits requiring the same supply voltage (this can be done on the Vdd-side or the Gnd-side or both). When all electronic circuits (there could also be only one) within one voltage domain switch to an inactive (idle) mode, the power switches disconnect the voltage domains from the supply in response to a disabling signal that represents the duration of the inactive time period. In this way, the total leakage power consumption of the system is reduced. As a matter of fact, the power switch could also be seen as a programmable resistor which switches from a very low resistance value in the active period to a very high resistance value in the inactive time period. It does not need to be a perfect switch in order to reduce the leakage current. Fig. 1 shows an integrated system 5 comprising a voltage domain 20 having a plurality of electronic circuits 30 that require the same supply voltage Vdd in active mode. For the sake of simplicity only one voltage domain 20 has been illustrated. However, in real designs there may be any number. This depends on the system requirements which determine the required number of voltage domains. The electronic circuits 30 each comprise electronic circuits and are also being referred to as IP blocks in the prior art. In this example there are three electronic circuits within a single voltage domain 20, but it could be any number. The system 5 is either integrated on a single die in single package 10 or on a plurality of dies within a single package 10 forming a system-on-a-chip (SoC) and a system- in-a-package (SiP) respectively. Typically, the voltage domain 20 receives its supply voltage Vdd from a dedicated DC-DC converter 40. The DC-DC converter 40 may be present on a separate die or on the same die (on-chip) as the electronic circuits of the system 5. An on-chip DC/DC converter 40 may reduce the system cost (silicon area) and improve system efficiency (lower power consumption). The DC-DC converter 40 receives an input voltage Vin from an external supply which may be a battery 50. Optionally there may be an intermediate voltage converter 60 between the battery and the DC-DC converter 40.

The output voltage Vout of the DC-DC converter is gated by a power switch 70 that is controlled by disabling signal STB that defines the duration of the inactive time period of the electronic circuits 30 in the voltage domain 20. The power switch 70 is usually a very large transistor, because, in its application, it has to be able to carry the supply current for a plurality of blocks 30 in active mode while minimizing a voltage drop across this power switch 70. In CMOS technology the power switch 70 may comprise a PMOS transistor or an NMOS transistor or a combination of both. When the power switch is connected at Vdd-side a PMOS transistor is advantageous, because it does not suffer from a voltage drop, and similarly on the Gnd-side an NMOS transistor is advantageous.

Referring to Fig. 2, this Figure shows an integrated system in accordance with a first embodiment of the invention. In this system 10 the DC-DC converter is replaced with an improved DC-DC converter 140. The DC-DC converter 140 is now provided with an extra input that receives the same disabling signal STB as the power switch 70. The improved DC- DC converter 140 may be switched off in response to the disabling signal STB together with the power switch 70. The power switch 70 may be leaky in its "off-state and this problem is increasing with an increasing size of the power switch 70. In the integrated system in Fig. 2 this problem is relieved, because even if the power switch 70 is leaky in its "off-state the current supply to this leaky power switch is reduced and the total leakage current flowing towards the electronic circuit 30 is reduced. The DC-DC converter 140 in accordance with the invention is discussed more elaborately later in this description. Fig. 3 shows an integrated system in accordance with a second embodiment of the invention. In this system the DC-DC converter 140 in accordance with the invention is exploited in a different way. The inventors have realized that switched-mode DC-DC converters generally comprise large switching elements (e.g. switching PMOS transistor having an aspect ratio of 3500/0.065 in a 0.065μm technology node for storing and releasing magnetic energy in an inductive element, and that the DC-DC converter 140 in accordance with the invention renders in certain applications the power switch 70 for the voltage domain 20 superfluous. The output Vout of the DC-DC converter 140 is directly connected to the supply network of the voltage domain 20 comprising the plurality of electronic circuits 30. Leaving out the power switch 70 will therefore lead to a significant area reduction in the integrated system. This area reduction will be even more pronounced in integrated systems having a plurality of voltage domains 20, each having a plurality of electronic circuits 30. Because, switching elements Sl, S2 (Fig. 4) in a DC-DC converter may also be leaky, the integrated system in accordance with the invention optionally comprises back-bias- voltage generators 142, 144 for generating back-bias voltages Vbp, Vbn for the switching transistors respectively. Applying a reverse back-bias voltage to a transistor will increase its threshold voltage which results in a reduction of its leakage current. The back-biasing of the DC-DC converter 140 in accordance with the invention is discussed more elaborately later in this description. For the sake of simplicity only the current supply path (or Vdd-side) is illustrated in Figs. 2 and 3. The skilled person will realize that there is also a current return path (or Gnd-side).

Figs. 4a and 4b show different types of switched-mode DC-DC converters. Fig. 4a illustrates a so-called Buck converter for step-down conversion, and Fig. 4b illustrates a Boost converter (step-up) for step-up conversion. The here described types of switched- mode DC-DC converters is non-exhaustive and merely included to illustrate the invention. The invention may also be applied to other types of switched-mode DC-DC converters, for example a Buck-Boost converter and a Flyback converter using a transformer. The principles of the invention stay the same for those converters.

The Buck converter in Fig. 4a comprises: - an input INP comprising a first and a second input terminal INl, IN2; an output OUTP comprising a first and a second output terminal OUTl, OUT2; an energy transfer path defined from the input terminals INl , IN2 to the output terminals OUTl, 0UT2, wherein the energy transfer path further comprises an intermediate node ND; a switching element Sl provided between the first input terminal INl and the intermediate node ND, a further switching element S2 is provided between the intermediate node ND and the second input terminal IN2, and a inductive element L is provided between the intermediate node ND and the first output terminal OUTl In Fig. 4a, the second input terminal IN2 and the second output terminal

0UT2 are both connected to a reference voltage, but this is not required.

Switched-mode DC-DC converters comprising a transformer are example wherein these terminals are typically not connected to the same reference voltage.

Fig. 4a illustrates a so-called asynchronous DC-DC converter, wherein the switching element Sl in this example is a transistor and the further switching element S2 is a diode. When S2 is replaced with a further transistor a so-called synchronous DC-DC converter is obtained. Synchronous DC-DC converters have a better performance at low duty cycles. The inductive element L in Fig. 4a comprises an inductor but alternatively may be a transformer. It must be noted that, although Figs. 4a and 4b show switching elements implemented as bipolar transistors, other implementation methods of switching elements can be applied too, for example using MOS transistors. What is important is that the device used for the implementation of a switching element can be controlled. The person skilled in the art may easily provide such functionality with other types of transistors or more complex circuitry. The Buck converter in Fig. 4a operates as follows. In this circuit turning ON the transistor Sl will put voltage Vin on one end of the inductor L. This voltage will tend to cause the inductor current I_L to rise. When the transistor Sl is OFF, the current I_L will continue flowing through the inductor L but is now flowing through the diode S2. Assuming that the current I_L through the inductor L does not reach zero, thus the voltage V_x at the intermediate node ND will now be the voltage across the conducting diode S2 during the full OFF time. The average voltage at intermediate node V_x will depend on the average ON time of the transistor Sl provided the inductor current is continuous.

To analyze the voltages of this circuit let us consider the changes in the inductor current over one cycle. From the relation di

the change of current satisfies

i = \ T \ J { ^vv_x ^Λ - v₀ ^u )'dt+_j T \{v_x - v₀)dt

¹^ ON ^ OFF

For steady state operation the current at the start and end of a period T will not change. To get a simple relation between voltages we assume no voltage drop across transistor or diode while ON and a perfect switch change. Thus during the ON time V_x=V_1n and in the OFF V_x=O. Thus o = i = ζ" (v_m - v_o )dt + ^^ff (-v_o )dt

which simplifies to

[Vin - Vo)I_0n - Vo t₀j = 0 or

and defining "duty i cycle" as

D =

T the voltage relationship becomes V₀=D Vin.

Since the circuit is lossless and the input and output powers must match on the average V₀* I₀ = V_1n* I_1n. Thus the average input and output current must satisfy I_1n =D I₀ These relations are based on the assumption that the inductor current does not reach zero, which is called the continuous-mode. In discontinuous mode (where the current reaches zero) the derivation of the formulas is more complex. Such an explanation goes beyond what is required to understand the invention and therefore omitted here.

In this embodiment of the switched-mode DC-DC converter in accordance with the invention, the transistor Sl is effectively switched-off during an inactive time period of an electronic circuit connected to the output. When that happens the potential Vx on the intermediate node ND becomes negative (the diode S2 is conducting), which means that the voltage over the inductor L is also negative (please note that the output voltage is lower than the input voltage but still positive). As a result the negative voltage the current in the inductor L safely returns to zero when the DC-DC converter is switched off in this way. The Boost converter in Fig. 4b comprises: an input INP comprising a first and a second input terminal INl, IN2; an output OUTP comprising a first and a second output terminal OUTl, 0UT2; an energy transfer path defined from the input terminals INl , IN2 to the output terminals OUTl, 0UT2, wherein the energy transfer path further comprises an intermediate node ND; an inductive element L provided between the first input terminal INl and the intermediate node ND, a switching element S 1 provided between the intermediate node ND and the second input terminal IN2, and a further switching element S2 provided between the intermediate node ND and the first output terminal 0UT2. In Fig. 4b, the second input terminal IN2 and the second output terminal 0UT2 are both connected to a reference voltage, but, similarly to Fig. 4a, this is not required. The inductive element L in Fig. 4b comprises an inductor. The Boost converter in Fig. 4b operates as follows. While the transistor Sl is

ON (conducting) the voltage V_x on the intermediate node ND is connected (via de transistor) to ground and thus the input voltage Vin is applied fully over the inductor L which will build up current I_L. In the OFF state of the transistor the inductor current I_L flows through the diode S2 resulting in the voltage V_x on the intermediate node to equal the output voltage V₀ (V_x=V₀) and the voltage over the inductor L will become V_1n - V₀. For this analysis it is assumed that the inductor current always remains flowing (continuous conduction). The average of the voltage across the inductor must be zero for the average current to remain within non- infinite limits:

Vm t_on + {ym - Vo}t_oβ = 0

wherein t_on is the on-time of the transistor Sl, and W is the off-time of the transistor S2. The last-mentioned formula can be rearranged as

Vo _ T _ 1 Vm t_oJf (l - £>) wherein D is the duty cycle of the transistor Sl on-time.

Since the duty cycle "D" is between 0 and 1 the output voltage must always be higher than the input voltage in magnitude. The negative sign indicates a reversal of sense of the output voltage. In this embodiment of the switched-mode DC-DC converter in accordance with the invention, the transistor Sl is effectively switched-off during an inactive time period of an electronic circuit connected to the output. When that happens, the potential Vx on the intermediate node ND will be positive (the diode S2 is conducting). However, the voltage over the inductor L is again negative, because the output voltage is higher than the input voltage. As a result of the negative voltage the current in the inductor L safely returns to zero when the DC-DC converter is switched off in this way.

In both Fig. 4a and Fig. 4b the DC-DC converter may be safely switched off by disabling the control signal on the switching element S 1 such that it is opened. There will be no voltage spikes on internal nodes which might damage the DC-DC converter. Similarly, this advantage exists for other types of switched-mode DC-DC converters, like the Buck- Boost converter or the Flyback converter. In both Fig. 4a and Fig. 4b the output is provided with a capacitance C for smoothing the output voltage. In certain applications, this capacitance C may be left out, e.g. when the load already comprises a large capacitance. Fig. 5a shows a switched-mode DC-DC converter in accordance with a first embodiment of the invention. This DC-DC converter 140 constitutes a Buck-converter, sometimes also being referred to as a step-down-converter. The DC-DC converter 140 comprises converter circuitry 150 connected to the output of the DC-DC converter that provides the output voltage Vout, wherein the converter circuitry may be in one embodiment in accordance with Fig. 4a (i.e. comprising an inductive element). On the output a capacitance 152 is provided for smoothing the output voltage. Furthermore, in this embodiment an output resistance R is shown in parallel with this capacitance. This is to model the load (e.g. an electronic circuit). In a more precise model a load capacitance is put in parallel. The converter circuitry 150 is driven by a switching inverter 160, wherein a PMOS transistor Tl constitutes the switching element Sl in accordance with the invention and the NMOS transistor T2 constitutes the further switching element S2 in accordance with an embodiment of the invention. In other words, Fig. 5a constitutes a synchronous DC-DC converter. The switching inverter 160 is driven by a pulse-width modulator 162, which activates the PMOS transistor Tl and the NMOS transistor in an alternating way. The pulse- width modulator 162 senses the output voltage Vout via a feedback loop 164. Repetitive control signals are produced by the pulse-width modulator 162 such that the PMOS transistor is activated during a first time period and the NMOS transistor is activated during a second time period, the first time period and the second time period are selected such that the supply voltage Vout on the output of the DC-DC converter is stabilized. The pulse-width modulator 162 is provided with an input receiving a disabling signal STB defining a duration of the inactive time period of an electronic circuit connected to the output. When the disabling signal STB changes to indicate the start of the inactive time period, the output of the pulse- width modulator 162 going to the PMOS transistor Tl is set such that the PMOS transistor Tl is switched off, and the output going to the NMOS transistor T2 is set such that the

NMOS transistor T2 is switched on. By doing so, no more magnetic energy can be stored in the inductive element in the converter circuitry (only releasing of magnetic energy is possible), and the supply voltage Vout on the output will eventually reduce to zero.

Fig. 5b shows a switched-mode DC-DC converter in accordance with a second embodiment of the invention which has an advantage over the converter in Fig. 5a. Instead of redesigning the pulse-width modulator 162 a conventional pulse-width modulator 162 may be provided in this embodiment. In the embodiment in Fig. 5b the output of the pulse- width modulator 162 that is connected to the PMOS transistor Tl, is connected to an input a 2-input multiplexer (or any other signal selection circuitry) 166. The other input of the 2-input multiplexer is connected to a constant voltage (here a logic "1"). A select input of the multiplexer 164 receives the disabling signal STB defining the duration of the inactive time period of an electronic circuit connected to the output. In one state of the select input of the multiplexer 164 the multiplexer selects the logic "1" for its output for effectively switching off the PMOS transistor Tl. In case an NMOS transistor would have been used as a switching element Sl, a logic "O" may be applied to the input of the multiplexer for effectively switching off the NMOS transistor. In the other state the multiplexer selects the input connected to the pulse-width modulator 162 and effectively becomes transparent. Once a truth table as described above is known the skilled person will easily come up with many variations leading to the same functionality. Once the output voltage has finally reduced to zero (and the energy in the inductive element is reduced to zero) the further switching element may be switched off as well. And in that case, reverse-back bias may be used to further reduce the leakage current through the second-switching element S2 as well. As a consequence of that the output capacitance will less easily discharge through the further switching element during the inactive period. In the embodiments in Figs. 5a and 5b the switching element, PMOS transistor

Tl, is open during the inactive time period of the electronic circuit. Theoretically, there is no conduction path between the input of the DC-DC converter Vin and ground. However, although the transistor Tl is switched off, it may still conduct a parasitic leakage current. As a consequence of that there may still be a leakage current running from the input of the DC- DC converter through the PMOS transistor and through the NMOS transistor towards ground. The leakage current may have three sources: junction leakage, gate-oxide leakage and subthreshold leakage, and is dependent on the transistor size and the process technology in which the DC-DC converter has been fabricated. The leakage current of the DC/DC converter will be large because of the large size of the switching elements (e.g. in CMOS 0.065μm a typical PMOS switch would have an aspect ratio of about 3500/0.065). In future technology nodes having smaller feature sizes the aspect ratio may even become larger. In order to reduce the leakage power dissipation of the DC/DC converter during the inactive time period of the electronic circuit connected to the output, back-biasing may be applied to the transistors that act as switches for increasing their threshold voltage. In the embodiments of Figs. 5a and 5b a switching stage 160 having both a PMOS transistor Tl and an NMOS transistor T2 is implemented. These transistors need to be biased differently which means that two back-bias voltages Vbp and Vbn have to be generated and applied to the PMOS transistor Tl and the NMOS transistor T2, respectively. The back-bias voltages have such a value and polarization that they cause the reverse back bias of the MOSFET transistors. The reverse back-bias increases threshold voltage of the transistors which reduces their subthreshold leakage current.

The threshold voltage can be changed according to the following formula:

where VBS is a back-bias bulk-source voltage. VBS > 0 for p-type MOSFET transistors and VBS < 0 for n-type MOSFET transistors.

A back-bias voltage generally deviates from the voltages that are by default available on-chip. For an NMOS transistor a voltage lower than ground level is needed and for the PMOS transistor a voltage higher than the supply voltage is needed. These voltage may either be received externally or generated by a dedicated circuitry called the back-bias voltage generator 142, 144 (see Fig. 3). In Fig. 3 it is shown that voltages Vbp and Vbn are generated by two independent circuits, but this can also be a single block with multiple outputs. It is possible to apply reverse back-bias to only the switching element Sl (the PMOS transistor Tl) as this already reduces the leakage of the DC-DC converter. However, also applying the back-bias to the further switching element S2 (NMOS transistor T2) not only further reduces the leakage of the DC/DC converter, but it also takes care that the tank capacitor (and eventually the capacitance of the supply network of the electronic circuit) discharges via the NMOS transistor T2 when the converter is switched off (during the inactive time period of the electronic circuit connected to the output of the converter).

The chip area needed for the implementation of the back-bias voltage generator(s) does not have to be significant. Note that large storage elements (such as capacitors and inductors) required in this block may be implemented in the same way as storage elements of the primary DC/DC converters (e.g. on a dedicated passive die).

The output capacitor (Cl) of a typical integrated DC-DC converter is in the order of 10OnF, with a typical value of 100-15OnF. The load of a DC-DC converter, which is supplying a (SoC) voltage domain or a single electronic circuit (IP block), can be modeled using a parallel resistance (R) and a capacitance (C2). For a typical IP block in a 65nm technology node, the resistance (R) is in the order of 10-lOOkOhm, and the capacitance (C2) in the order of 5-1OnF. Because the output capacitor of the DC-DC converter is much larger than capacitance of the IP block, it will in most applications be dominating.

The output capacitor Cl is charged up to the voltage corresponding to the voltage that is to be used to supply the IP block. When the IP block is to enter an inactive time period, the DC-DC converter according to the invention will also enter an inactive time period by applying the STB signal to it. The output capacitance (Cl) capacitance will discharge with a time constant τ = R*(C1+C2) = R*C1, which is about 0.1ms. Assuming that the time needed to fully discharge the output capacitance Cl is equal to about five time constants; it means that the discharge time is about 0.5ms.

Referring to Fig. 6a, this Figure shows a basic structure of a capacitive step- down switch-mode DC-DC converter. Fig. 6b shows a timing diagram of the control signals for the converter. The capacitive switched-mode DC-DC converter comprises a capacitive element Cl for storing electric energy therein. The output load is modeled as a load capacitance C2 and a load resistance RL in parallel. The DC-DC converter comprises an input Vs, a switching element Sl which is arranged for storing electric energy from the input Vs in the capacitive element Cl in a first time period STl, and a further switching element S2 is arranged to release electric energy (discharge the capacitor) from the capacitive element Cl towards the output Vo in a second time period ST2. When implemented as MOSFET transistors, in one embodiment, the transistors have on-state resistances Rj 1 and Rj2, respectively. The output voltage Vo is a regulated output voltage.

The embodiment illustrated in Figs. 6a and 6b has typically two steady operation states. In a first state STl (time tθ-tl), the switching element Sl is closed and the further switching element S2 is open, which results in charging capacitance Cl from input voltage Vs and discharging capacitance C2 through the load RL. In a second state ST2 (time tl-t2), the switching element Sl is open and the further switching element S2 is closed, and capacitance Cl is discharged through the capacitance C2 and load resistance RL, in order to compensate for the energy in the capacitor C2.

The time periods of the state I and II, that is the time of opening and closing the switching elements Sl and S2, can be controlled by a pulse-width modulation method (PWM). Because these time periods determine to which voltage capacitors Cl and C2 are charged, they also determine the way the input voltage Vs is converted into the output voltage Vo (i.e. they determine the voltage conversion ratio).

Now, similar to as discussed for the embodiment of the switched-mode DC- DC converter having an inductive element in its energy transfer path, the control signal for the switching element Sl may be disabled using a disable circuit in response to a disable signal. By doing so the conversion of the input voltage Vs to the output voltage Vo by transfer of energy from the input to the output is prevented. After some time the initially charged load capacitance C2 will also discharge. If the reverse back-bias is applied to the switching element S 1 (and the further switching element S2) it is possible to lower the static power dissipation of the converter when it is inactive.

The invention thus provides, in a first aspect, an improved switched-mode DC- DC converter which is adapted for use in an integrated system with an electronic circuit having an inactive time period. In response to a disabling signal defining the inactive time period, the control signal for the switching element which is used for storing energy in the energy-storage element of the switched-mode DC-DC converter is disabled. Consequently, the switching element is open and the storing of energy in the energy-storage element is prevented. In advantageous embodiments, reverse back-bias is applied for further reducing leakage current through the switching element (which is generally a large transistor). The switched-mode DC-DC converter in accordance with the invention is at least partially integrated in an integrated circuit. The DC-DC converters may components like inductors and capacitors which may be either integrated in the same integrated circuit as the DC-DC converter or on a separate integrated circuit (die), which may be specially adapted for manufacturing those passive components.

The invention provides, in a second aspect, an integrated system comprising the improved switched-mode DC-DC converter, wherein the switched-mode DC-DC converter directly supplies power to a voltage domain comprising an electronic circuit. In this system conventional power switches may be completely dispensed with because of the improved DC-DC converter that effectively takes over this function. As a result a significant area reduction is achieved.

The invention provides, in a third aspect, an integrated system comprising the improved switched-mode DC-DC converter, wherein the switched-mode DC-DC converter is used in combination with a power switch. As a matter of fact, the power switch that supplies the electronic circuit tends to become more leaky with an increasing size, and the improved DC-DC converter effectively reduces the current through the leaky power switch during the inactive period of the electronic circuit. As a consequence of that, the overall leakage current through the electronic circuits is effectively further reduced by the DC-DC converter in accordance with the invention.

The system in accordance with the invention is either integrated on a single die in single package or on a plurality of dies within a single package forming a system-on-a- chip (SoC) and a system-in-a-package (SiP) respectively. Where in this description "pulse-width modulator" is mentioned, this block is also, where required, supposed to include some controller functionality sensing the output voltage and for controlling the pulse-width modulator in response to the sensed output voltage. In the prior art "power switches" are sometimes also being referred to as sleep switches. Various variations of switched-mode DC-DC converter and integrated system in accordance with the invention are possible and do not depart from the scope of the invention as claimed. For example, the switched-mode DC-DC converter may be asynchronous (using only one actively controlled switching element). In that embodiment the pulse-width modulator only provides one control signal for the switching element. Another variation concerns the integrated system comprising the switched-mode DC-DC converter. Such a system may comprise a plurality of voltage domains, each voltage domain comprising a plurality (but at least one) of electronic circuits, each voltage domain having its own dedicated DC-DC converter and its own disabling signal indicating the inactive time period of the associated voltage domain. The disabling signals may be generated by a signal generator that receives input signals from the integrated system that indicate the required states (active/inactive) of the plurality of voltage domains. Alternatively, a single disabling signal may be used which indicates the inactive periods of all voltage domains simultaneously.

Claims

CLAIMS:

1. Switched-mode DC-DC converter (140) for use in an integrated system (5) with an electronic circuit (30) having an inactive time period and for generating a supply voltage (Vout) for the electronic circuit (30), the DC-DC converter (140) comprising: an input (INP) for receiving an input voltage (Vin) from a voltage source (60); - an output (OUTP) for supplying the supply voltage (Vout); an energy transfer path extending from the input (INP) to the output (OUTP), the energy transfer path comprising an energy-storage element (L, Cl) for storing energy retrieved from the input (INP) in a first time period (STl) and for releasing energy towards the output (OUTP) in a second time period (ST2), the energy transfer path further comprising a switching element (Sl, Tl) for activating the storing of the energy in the energy- storage element (L, Cl) when closed during the first time period (STl), and a controller (162, 166)

(i) for supplying a control signal to the switching element (Sl, Tl) to define a duration of the first time period (STl); (ii) for receiving a disabling signal (STB) defining the inactive time period of the electronic circuit (30), and

(iii) for disabling the control signal in response to the disabling signal (STB) for disabling the storing of energy in the energy-storage element during the inactive time period.

2. Switched-mode DC-DC converter (140) as claimed in claim 1, wherein the energy-storage element is an inductive element (L).

3. Switched-mode DC-DC converter (140) as claimed in claim 1, wherein the energy-storage element is a capacitive element (Cl).

4. Switched-mode DC-DC converter (140) as claimed in any one of claims 1 to 3, further comprising an output capacitance (C, C2, 152) coupled to the output (OUTP) for smoothing the supply voltage (Vout).

5. Switched-mode DC-DC converter (140) as claimed in any one of claims 1 to 4, wherein the energy transfer path further comprises a further switching element (S2, T2) for activating the releasing of the energy in the energy- storage element (L, Cl) when closed in the second time period (ST2).

6. Switched-mode DC-DC converter (140) as claimed in claim 5, as far as dependent on claim 2, wherein the input (INP) comprises a first and a second input terminal (INl, IN2), the output (OUTP) comprises a first and a second output terminal (OUTl, OUT2), the energy transfer path is defined from the input terminals (INl , IN2) to the output terminals (OUTl, OUT2), and wherein the energy transfer path further comprises an intermediate node, the second input terminal (IN2) and the second output terminal (OUT2) are both connected to a reference voltage, the switching element (Sl, Tl) is provided between the first input terminal (INl) and the intermediate node (ND), the further switching element (S2, T2) is provided between the intermediate node (ND) and the second input terminal (IN2), and - the inductive element (L) is provided between the intermediate node (ND) and the first output terminal (OUTl).

7. Switched-mode DC-DC converter (140) as claimed in claim 6, wherein the further switching element (S2) comprises a diode being coupled with its cathode connected to the intermediate node (ND).

8. Switched-mode DC-DC converter (140) as claimed in claim 5, as far as dependent on claim 5, wherein the input (INP) comprises a first and a second input terminal (INl, IN2), - the output (OUTP) comprises a first and a second output terminal (OUTl ,

OUT2), the energy transfer path is defined from the input terminals (INl, IN2) to the output terminals (OUTl, 0UT2), the energy transfer path further comprises an intermediate node (ND), the second input terminal (IN2) and the second output terminal (0UT2) are both connected to a reference voltage, the inductive element (L) is provided between the first input terminal (INl) and the intermediate node (ND), - the switching element (Sl, Tl) is provided between the intermediate node

(ND) and the second input terminal (IN2), and the further switching element (S2, T2) is provided between the intermediate node (ND) and the first output terminal (OUTl).

9. Switched-mode DC-DC converter (140) as claimed in claim 8, wherein the further switching element (S2) comprises a diode being coupled with its cathode to the first output terminal (OUTl).

10. Switched-mode DC-DC converter (140) as claimed in any one of claims 5, 6, and 8, wherein the further switching element (S2, T2) is an active device controlled by a further control signal, wherein the further control signal defines a duration of the second time period (ST2).

11. Switched-mode DC-DC converter (140) as claimed in any one of the preceding claims, wherein the controller (162, 166) further comprises a pulse-width modulator (162) for sensing the supply voltage (Vout) via a feedback loop (164) and for generating the control signal in response to the sensed supply voltage (Vout), the control signal being a repetitive signal of which at least the first time period (STl) is controlled to stabilize the supply voltage (Vout) on the output (OUTP).

12. Switched-mode DC-DC converter (140) as claimed in claim 11, wherein the controller (162, 166) comprises a disable circuit (166) for receiving the disabling signal (STB), the disable circuit (166) is arranged between the pulse-width modulator (162) and the switching element (Sl, Tl) for the disabling of the control signal in response to the disabling signal (STB).

13. Switched-mode DC-DC converter (140) as claimed in claim 12, wherein the disable circuit (166) has an output connected to a control input of the switching element (Sl, Tl), and an input receiving the control signal from the pulse-width modulator (162), wherein the disable circuit (166) is constructed for producing a predetermined voltage level on the output in response to the disabling signal (STB) defining the inactive time period of the electronic circuit (30), wherein the predetermined voltage level is selected for keeping the switching element (Sl, Tl) open.

14. Switched-mode DC-DC converter (140) as claimed in claim 13, wherein the disable circuit (166) comprises a gating circuit having a first input receiving the control signal from the pulse-width modulator (162) and a second input receiving the disabling signal (STB), wherein a change in the disabling signal (STB) on the second input causes the output of the gating circuit to switch between the predetermined voltage level and a level equal to a voltage level on the first input.

15. Switched-mode DC-DC converter (140) as claimed in any one of the preceding claims, wherein the switching element comprises a MOS transistor (Tl) having a bulk connection, and further comprising a back-bias input for receiving a reverse back-bias voltage (Vbp) that is supplied to the bulk connection.

16. Switched-mode DC-DC converter (140) as claimed in claim 15, wherein the switched-mode DC-DC converter (140) further comprises a back-bias generator (142) for generating the reverse back-bias voltage (Vbp).

17. Integrated system (5) comprising : the switched-mode DC-DC converter (140) as claimed in any one of claims 1 to 16; - a voltage domain (20) comprising at least one electronic circuit (30) having an inactive time period, the voltage domain (20) receiving the supply voltage (Vout) directly from the DC-DC converter (140), and a signal generator producing the disabling signal (STB) defining the inactive time period of the electronic circuit (30).

18. Integrated system (5) comprising : the switched-mode DC-DC converter (140) as claimed in any one of claims 1 to 16; a voltage domain (20) comprising at least one electronic circuit (30) having an inactive time period, the voltage domain (20) receiving a regulated supply voltage (Vdd) from a power switch; the power switch receiving the supply voltage (Vout) from the DC-DC converter (140) and producing the regulated supply voltage (Vdd) on its output (OUTP) under control of the disabling signal (STB), and a signal generator producing the disabling signal (STB) defining the inactive time period of the electronic circuit (30).