WO2007041140A3 - Nicam processor - Google Patents
Nicam processor Download PDFInfo
- Publication number
- WO2007041140A3 WO2007041140A3 PCT/US2006/037626 US2006037626W WO2007041140A3 WO 2007041140 A3 WO2007041140 A3 WO 2007041140A3 US 2006037626 W US2006037626 W US 2006037626W WO 2007041140 A3 WO2007041140 A3 WO 2007041140A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- data
- memory
- nicam
- channel
- format
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/06—Systems for the simultaneous transmission of one television signal, i.e. both picture and sound, by more than one carrier
-
- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10L—SPEECH ANALYSIS OR SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING; SPEECH OR AUDIO CODING OR DECODING
- G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
- G10L19/02—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis using spectral analysis, e.g. transform vocoders or subband vocoders
Abstract
A NICAM processor (82) comprises a first memory (100) for temporarily storing a current frame of A-channel and B-channel input data, wherein the current frame data is stored into the first memory at a first clock rate. A second memory (106, 108) temporarily stores companded A-channel and B-channel data of a previous frame in a format other than an interleaved format according to NICAM standard requirements. An interleaving circuit (105) reads the previous frame companded data from the second memory at a second clock rate and in a manner for interleaving the previous frame data into the NICAM standard required interleaved format. A bit stream generator (114) generates a first portion of an output bit stream, multiplexes it with a payload portion, and outputs the output bit stream, wherein the first portion comprises a frame alignment word, control information and additional data, and the payload portion comprises the interleaved data of the previous frame. A companding and storing circuit (104) compands the input data of the current frame and stores the companded data into the second memory at a third clock rate and in the format other than the NICAM interleaved format. The companding and storing circuit is operative during an interval within the current frame, subsequent to the storing into the first memory and the reading from the second memory.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020087007378A KR101299420B1 (en) | 2005-09-30 | 2006-09-25 | Nicam processor |
JP2008533558A JP5140594B2 (en) | 2005-09-30 | 2006-09-25 | NICAM processing method |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/240,314 US7653448B2 (en) | 2005-09-30 | 2005-09-30 | NICAM processing method |
US11/240,315 US20070076121A1 (en) | 2005-09-30 | 2005-09-30 | NICAM processor |
US11/240,315 | 2005-09-30 | ||
US11/240,314 | 2005-09-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2007041140A2 WO2007041140A2 (en) | 2007-04-12 |
WO2007041140A3 true WO2007041140A3 (en) | 2008-10-09 |
Family
ID=37906683
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2006/037626 WO2007041140A2 (en) | 2005-09-30 | 2006-09-25 | Nicam processor |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP5140594B2 (en) |
KR (1) | KR101299420B1 (en) |
WO (1) | WO2007041140A2 (en) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2125255A (en) * | 1982-07-28 | 1984-02-29 | British Broadcasting Corp | Digital data coding |
US4811394A (en) * | 1982-07-28 | 1989-03-07 | Communications Satellite Corporation | Variable starting state scrambling circuit |
US5243650A (en) * | 1990-03-23 | 1993-09-07 | Televerket | Method and apparatus for encryption/decryption of digital multisound in television |
US6150837A (en) * | 1997-02-28 | 2000-11-21 | Actel Corporation | Enhanced field programmable gate array |
US20020184546A1 (en) * | 2001-04-18 | 2002-12-05 | Sherburne, Jr Robert Warren | Method and device for modifying the memory contents of and reprogramming a memory |
US6825690B1 (en) * | 2003-05-28 | 2004-11-30 | Actel Corporation | Clock tree network in a field programmable gate array |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10322623A (en) * | 1997-05-21 | 1998-12-04 | Toshiba Corp | Television receiver |
JP2005039639A (en) * | 2003-07-17 | 2005-02-10 | Sony Corp | Television broadcasting system and method, transmitter and method, and receiver and method |
US7109906B1 (en) * | 2005-04-29 | 2006-09-19 | Freescale Semiconductor, Inc. | NICAM encoder featuring synchronization of a NICAM processor with front-end input and output sections |
-
2006
- 2006-09-25 WO PCT/US2006/037626 patent/WO2007041140A2/en active Application Filing
- 2006-09-25 KR KR1020087007378A patent/KR101299420B1/en not_active IP Right Cessation
- 2006-09-25 JP JP2008533558A patent/JP5140594B2/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2125255A (en) * | 1982-07-28 | 1984-02-29 | British Broadcasting Corp | Digital data coding |
US4811394A (en) * | 1982-07-28 | 1989-03-07 | Communications Satellite Corporation | Variable starting state scrambling circuit |
US5243650A (en) * | 1990-03-23 | 1993-09-07 | Televerket | Method and apparatus for encryption/decryption of digital multisound in television |
US6150837A (en) * | 1997-02-28 | 2000-11-21 | Actel Corporation | Enhanced field programmable gate array |
US20020184546A1 (en) * | 2001-04-18 | 2002-12-05 | Sherburne, Jr Robert Warren | Method and device for modifying the memory contents of and reprogramming a memory |
US6825690B1 (en) * | 2003-05-28 | 2004-11-30 | Actel Corporation | Clock tree network in a field programmable gate array |
Non-Patent Citations (1)
Title |
---|
European Telecommunications Standards Institute, Television Systems; NICAM 728: transmission of two-channel digital sound with terrestrial television systems B, G, H, I, K1 and L, March 3, 1998 V1.2.1, pp.1-24 * |
Also Published As
Publication number | Publication date |
---|---|
JP2009512884A (en) | 2009-03-26 |
KR20080064811A (en) | 2008-07-09 |
JP5140594B2 (en) | 2013-02-06 |
KR101299420B1 (en) | 2013-08-29 |
WO2007041140A2 (en) | 2007-04-12 |
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