WO2007005516A3 - Connector-to-pad pcb translator for a tester and method of fabricatio - Google Patents

Connector-to-pad pcb translator for a tester and method of fabricatio Download PDF

Info

Publication number
WO2007005516A3
WO2007005516A3 PCT/US2006/025354 US2006025354W WO2007005516A3 WO 2007005516 A3 WO2007005516 A3 WO 2007005516A3 US 2006025354 W US2006025354 W US 2006025354W WO 2007005516 A3 WO2007005516 A3 WO 2007005516A3
Authority
WO
WIPO (PCT)
Prior art keywords
board
receiving
translator
controlled depth
fabricatio
Prior art date
Application number
PCT/US2006/025354
Other languages
French (fr)
Other versions
WO2007005516A2 (en
Inventor
Arash Behziz
Roya Yaghmai
Original Assignee
Teradyne Inc
Arash Behziz
Roya Yaghmai
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teradyne Inc, Arash Behziz, Roya Yaghmai filed Critical Teradyne Inc
Priority to JP2008520287A priority Critical patent/JP2008545248A/en
Priority to CN2006800240456A priority patent/CN101213464B/en
Priority to EP06785836A priority patent/EP1896861A2/en
Publication of WO2007005516A2 publication Critical patent/WO2007005516A2/en
Publication of WO2007005516A3 publication Critical patent/WO2007005516A3/en

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2889Interfaces, e.g. between probe and tester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04Assemblies of printed circuits
    • H05K2201/049PCB for one component, e.g. for mounting onto mother PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09472Recessed pad for surface mounting; Recessed electrode of component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09481Via in pad; Pad over filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • H05K2201/09518Deep blind vias, i.e. blind vias connecting the surface circuit to circuit layers deeper than the first buried circuit layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09627Special connections between adjacent vias, not for grounding vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10189Non-printed connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49165Manufacturing circuit on or in base by forming conductive walled aperture in base

Abstract

In one embodiment, a laminated printed circuit board translator (100) is provided. In some embodiments, the translator includes a receiving board (110) adapted to receive a pin (55) , the receiving board includes a plated via (120) extending through the receiving board and has a hole (125) for receiving the pin. An interface board (130) laminated with the receiving board has a controlled depth via (160) extending through it to contact a conductive trace (140) . The conductive trace extends between the receiving board and the interface board to connect the plated via of the receiving board with the controlled depth via of the interface board. The controlled depth via is configured so that it is capable of being plated through a single sided drilled opening in the interface board. Some embodiments have a pad on the interface board connected to the controlled depth via.
PCT/US2006/025354 2005-06-30 2006-06-28 Connector-to-pad pcb translator for a tester and method of fabricatio WO2007005516A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2008520287A JP2008545248A (en) 2005-06-30 2006-06-28 Printed circuit board type translator for connector-pad conversion and manufacturing method
CN2006800240456A CN101213464B (en) 2005-06-30 2006-06-28 Connector-to-pad PCB translator for a tester and method of fabrication
EP06785836A EP1896861A2 (en) 2005-06-30 2006-06-28 Connector-to-pad printed circuit board translator and method of fabrication

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US69551605P 2005-06-30 2005-06-30
US60/695,516 2005-06-30
US11/474,921 US7649375B2 (en) 2005-06-30 2006-06-26 Connector-to-pad printed circuit board translator and method of fabrication
US11/474,921 2006-06-26

Publications (2)

Publication Number Publication Date
WO2007005516A2 WO2007005516A2 (en) 2007-01-11
WO2007005516A3 true WO2007005516A3 (en) 2007-03-29

Family

ID=37401571

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/025354 WO2007005516A2 (en) 2005-06-30 2006-06-28 Connector-to-pad pcb translator for a tester and method of fabricatio

Country Status (6)

Country Link
US (1) US7649375B2 (en)
EP (1) EP1896861A2 (en)
JP (1) JP2008545248A (en)
KR (1) KR101264126B1 (en)
CN (1) CN101213464B (en)
WO (1) WO2007005516A2 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7847570B2 (en) 2007-10-19 2010-12-07 Teradyne, Inc. Laser targeting mechanism
US7733081B2 (en) 2007-10-19 2010-06-08 Teradyne, Inc. Automated test equipment interface
KR101043468B1 (en) * 2009-05-06 2011-06-23 삼성전기주식회사 Probe substrate and probe card having the same
CN102621463B (en) * 2011-02-01 2014-12-10 致茂电子(苏州)有限公司 Support plate with airtight conducting holes used for semiconductor testing device and manufacture method thereof
US10080287B2 (en) 2012-09-27 2018-09-18 Dell Products L.P. Blind via printed circuit board fabrication supporting press fit connectors
US9179546B2 (en) 2012-09-27 2015-11-03 Dell Products L.P. Blind via printed circuit board fabrication supporting press fit connectors
CN104375076B (en) * 2014-11-12 2018-09-04 中国人民解放军第五三一一工厂 A kind of circuit module measurement switching device
US9564697B2 (en) * 2014-11-13 2017-02-07 Lear Corporation Press fit electrical terminal having a solder tab shorter than PCB thickness and method of using same
CN106973488B (en) * 2017-05-18 2019-03-26 台山市精诚达电路有限公司 A kind of FPC wiring board for electric test

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0971570A1 (en) * 1997-02-03 2000-01-12 Ibiden Co., Ltd. Printed wiring board and its manufacturing method
US6292006B1 (en) * 1995-10-10 2001-09-18 Xilinx, Inc. Method for preventing condensation on handler board during semiconductor device testing
US20040257098A1 (en) * 2003-06-19 2004-12-23 Katsuhiko Satou Probe card
US20050036374A1 (en) * 2003-08-12 2005-02-17 Masanari Nakashima Probe card substrate

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4771236A (en) * 1985-12-16 1988-09-13 Banks Sherman M Multilayered printed circuit board type resistor isolated tray for stress testing integrated circuits and method of making same
JPH0362547A (en) * 1989-02-03 1991-03-18 General Electric Co <Ge> Testing structure of integrated circuit and test thereof
US5262719A (en) * 1991-09-19 1993-11-16 International Business Machines Corporation Test structure for multi-layer, thin-film modules
US5600259A (en) * 1993-12-17 1997-02-04 International Business Machines Corporation Method and apparatus for reducing interference in a pin array
US5807767A (en) * 1996-01-02 1998-09-15 Micron Technology, Inc. Technique for attaching die to leads
US6034533A (en) * 1997-06-10 2000-03-07 Tervo; Paul A. Low-current pogo probe card
US6756797B2 (en) * 2001-01-31 2004-06-29 Wentworth Laboratories Inc. Planarizing interposer for thermal compensation of a probe card
US6924654B2 (en) * 2003-03-12 2005-08-02 Celerity Research, Inc. Structures for testing circuits and methods for fabricating the structures
US7388394B1 (en) * 2004-12-01 2008-06-17 Cardiac Pacemakers, Inc. Multiple layer printed circuit board having misregistration testing pattern

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6292006B1 (en) * 1995-10-10 2001-09-18 Xilinx, Inc. Method for preventing condensation on handler board during semiconductor device testing
EP0971570A1 (en) * 1997-02-03 2000-01-12 Ibiden Co., Ltd. Printed wiring board and its manufacturing method
US20040257098A1 (en) * 2003-06-19 2004-12-23 Katsuhiko Satou Probe card
US20050036374A1 (en) * 2003-08-12 2005-02-17 Masanari Nakashima Probe card substrate

Also Published As

Publication number Publication date
EP1896861A2 (en) 2008-03-12
US20070007034A1 (en) 2007-01-11
CN101213464A (en) 2008-07-02
KR101264126B1 (en) 2013-05-14
US7649375B2 (en) 2010-01-19
CN101213464B (en) 2012-08-29
KR20080034849A (en) 2008-04-22
WO2007005516A2 (en) 2007-01-11
JP2008545248A (en) 2008-12-11

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