WO2006049085A1 - 静電チャック装置 - Google Patents
静電チャック装置 Download PDFInfo
- Publication number
- WO2006049085A1 WO2006049085A1 PCT/JP2005/019818 JP2005019818W WO2006049085A1 WO 2006049085 A1 WO2006049085 A1 WO 2006049085A1 JP 2005019818 W JP2005019818 W JP 2005019818W WO 2006049085 A1 WO2006049085 A1 WO 2006049085A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- static elimination
- electrostatic chuck
- support base
- electrode
- potential
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
- H01L21/6833—Details of electrostatic chucks
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02N—ELECTRIC MACHINES NOT OTHERWISE PROVIDED FOR
- H02N13/00—Clutches or holding devices using electrostatic attraction, e.g. using Johnson-Rahbek effect
Definitions
- the present invention relates to an electrostatic chuck device used, for example, in a semiconductor manufacturing process.
- an electrostatic chuck is used to fix the substrate in a vacuum chamber.
- an insulating layer dielectric layer
- a support base that supports a substrate
- a voltage is applied between the support base and the substrate across the insulating layer. It is equipped with a mechanism that attracts the substrate by the electrostatic force generated by this!
- the electrostatic chuck mechanism is mainly classified into a monopolar type and a bipolar type.
- FIG. 10 schematically shows the configuration of a conventional electrostatic chuck apparatus 1 having a bipolar electrostatic chuck mechanism.
- an insulating layer 3 on which the semiconductor substrate W is placed is formed on the upper surface of the support base 2.
- a plurality of chuck electrodes 4A, 4A, 4B, and 4B are arranged inside the support base 2 so as to face the back surface of the semiconductor substrate W placed on the insulating layer 3.
- each chuck electrode 4A, 4B is connected to the ground potential as shown in FIG. , Dissipate the electrostatic force between 4B. Thereafter, the rear surface of the semiconductor substrate W is pushed up by a lifter pin (not shown), and the semiconductor substrate W is transferred to the next stage via a transfer robot (not shown).
- the chuck electrodes 4A and 4B are generally low resistance substances (carbon, aluminum, copper Therefore, if the voltage supply to the chuck electrodes 4A and 4B is cut off and then connected to the ground potential, the neutralization of the chuck electrodes 4A and 4B is completed instantly.
- the charged semiconductor substrate W cannot actively release charges because the high-resistance insulating layer 3 is interposed, and the resistance value of the insulating layer 3 makes it difficult to eliminate static electricity. Karu.
- the lifter pin is made of metal and connected to the ground potential to release the substrate charge remaining when the back surface of the substrate W is pushed up, but the amount of the charge remaining on the substrate W is large. In some cases, an arc is generated when the lifter pin comes into contact, and this may cause discharge traces on the backside of the board or damage elements on the board.
- the charge removal by the reverse voltage is a method of applying a reverse potential to the chuck electrodes 4A and 4B so as to eliminate the charge remaining on the semiconductor substrate W.
- plasma is discharged by connecting the chuck electrodes 4A and 4B to a Dutch potential, generating plasma in the process chamber, and discharging the substrate W via this plasma.
- This is a method (for example, see Patent Document 1 below).
- the charge removal due to the temperature rise of the insulating layer 3 is a technique for promoting the charge removal of the semiconductor substrate W by raising the temperature of the insulating layer 3 and lowering its specific resistance value.
- Patent Document 1 Japanese Patent Application Laid-Open No. 2004-14868
- the neutralization by the reverse voltage has the effect of accelerating the neutralization of the dielectric layer (insulating layer 3), but there is a problem that the charge on the substrate cannot be removed.
- the substrate temperature also rises with the temperature raising operation of the insulating layer 3, so that there is a possibility of causing element deterioration depending on the type of the substrate W.
- Another problem is that it takes time to heat up the insulating layer 3.
- the present invention has been made in view of the above-described problems, and an object of the present invention is to provide an electrostatic chuck device that can appropriately and promptly perform a charge removal process on a substrate to be processed regardless of the type of process.
- the electrostatic chuck device of the present invention is connected to a static elimination electrode facing the surface of a support base, a static elimination potential, and the static elimination electrode and the static elimination potential. And a static elimination circuit including the static elimination resistor.
- the static elimination electrode is always in contact with the back surface of the substrate to be processed placed on the support base.
- the static elimination electrode is connected to the static elimination potential (eg ground potential) via the static elimination resistor.
- the resistance for static elimination is lower than that of the insulating layer on the surface of the support base, holds the potential of the substrate to be processed during electrostatic chuck operation, and eliminates the potential of the substrate to be processed when the electrostatic chuck is released.
- the resistance is set to a value that can be released to the potential. This resistance value can be set as appropriate according to the applied voltage, process conditions, and the like during electrostatic chucking.
- the static elimination electrode is always in contact with the substrate to be processed, and an appropriate static elimination resistor is interposed between the static elimination electrode and the static elimination potential.
- the substrate can be properly discharged without causing an abnormal discharge such as an arc when the substrate is discharged.
- the chuck electrode is connected to the ground potential, a neutralization action of the substrate is obtained, and since the neutralization efficiency is high, the neutralization process can be performed quickly.
- the formation position of the static elimination electrode is not particularly limited, but a configuration in which the electrode is exposed to the surface periphery of the support base or between the chuck electrodes is preferable.
- the form of the static elimination electrode can be selected within a range that does not impair the desired electrostatic chuck function, such as a conductor film formed by a thin film process on the surface of the support base, a metal protrusion, or the like.
- the static elimination potential may be a predetermined power supply potential capable of supplying a charge different in polarity from the charge charged on the substrate to be processed in addition to the ground potential.
- the neutralizing resistor is a resistive component that reaches the neutralizing potential from the neutralizing electrode, and is not limited to the interposition of the resistive element, and the neutralizing resistor is configured by the wiring resistive component of the wiring material. May be. Further, the resistance element is not limited to a fixed resistance, and may be a variable resistance.
- the static elimination resistor When the static elimination resistor is configured with a variable resistance, it is set to the high resistance side during electrostatic chucking in order to suppress the leakage of the potential of the substrate to be processed, and the substrate potential is quickly removed during static elimination. Therefore, set to the low resistance side.
- the static elimination circuit of the present invention includes a switch means for electrically connecting Z between the static elimination electrode and the static elimination potential. The switch is turned off to prevent leakage of the substrate potential, and by turning on the switch, the substrate can be discharged quickly.
- the electrostatic chuck device of the present invention it is possible to appropriately and promptly perform the charge removal process on the substrate to be processed. Accordingly, it is possible to prevent a transport error or breakage at the time of separation due to the residual charge of the substrate to be processed, and to improve throughput and productivity.
- FIG. 1 is a schematic configuration diagram of an electrostatic chuck device 11 according to a first embodiment of the present invention.
- FIG. 2 is an enlarged view of a main part showing a configuration example of the tip 16A of the electrode 16 for static elimination.
- FIG. 3 is a view showing one embodiment of a static elimination electrode 16 disposed between chuck electrodes 14A and 14B.
- FIG. 4 is a view showing another embodiment of the static elimination electrode 16 disposed between the chuck electrodes 14A and 14B.
- FIG. 5 is a schematic configuration diagram of an electrostatic chuck device 21 according to a second embodiment of the present invention.
- FIG. 6 is a schematic configuration diagram of an electrostatic chuck device 31 according to a third embodiment of the present invention.
- FIG. 7 is a schematic configuration diagram of an electrostatic chuck device 41 according to a fourth embodiment of the present invention.
- FIG. 8 is a schematic configuration diagram of an electrostatic chuck device 51 according to a fifth embodiment of the present invention.
- FIG. 9 is a schematic configuration diagram of an electrostatic chuck device 61 according to a sixth embodiment of the present invention.
- FIG. 10 is a schematic configuration diagram of a conventional electrostatic chuck device.
- FIG. 11 is a diagram for explaining a substrate static elimination method in a conventional electrostatic chuck device.
- FIG. 12 is a diagram for explaining another substrate static elimination method in the conventional electrostatic chuck device. Explanation of symbols
- FIG. 1 is a schematic diagram showing the configuration of the electrostatic chuck device 11 according to the first embodiment of the present invention.
- the electrostatic chuck device 11 of the present embodiment mainly includes a support base 12 that supports the semiconductor substrate W, an insulating layer (dielectric layer) 13 formed on the upper surface of the support base 12, and a semiconductor via the insulating layer 13.
- the support base 12 is made of an insulating material such as ceramic, and is not connected to a process such as a vacuum chamber (not shown). It is installed inside the Seth room.
- the insulating layer 13 is made of PBN (pyrolite boron nitride), A1N (aluminum nitride), or the like, but can of course be made of other insulating materials.
- the insulating layer 13 is not limited to a partial region on the upper surface of the support base 13, and may be formed on the entire upper surface of the support base 12.
- the chuck electrodes 14A and 14B are made of a low-resistance material such as carbon, aluminum, or copper.
- One chuck electrode 14A is connected to a positive potential source 15A, and the other chuck electrode 14B is Connected to negative potential source 15B.
- Switches 18A and 18B are provided between the chuck electrodes 14A and 14B and the potential sources 15A and 15B, respectively, so that when the semiconductor substrate W is discharged, the switches 18A and 18B are switched to the ground potential side. It is configured.
- the static elimination electrode 16 is provided on the periphery of the support base 12, and faces the front surface of the support base 12 so that the tip thereof is in contact with the back surface of the semiconductor substrate W.
- the formation site of the static elimination electrode 16 may be the entire peripheral edge of the support base 12, or may be provided at a plurality of equiangular positions or unequal angular positions along the peripheral edge of the support base 12! /.
- the tip 16 A of the static elimination electrode 16 is formed over a predetermined range of the peripheral upper surface portion of the support base 12. Thereby, the contact area with the back surface of the semiconductor substrate W can be increased.
- the electrode tip 16 A is properly placed on the back surface of the substrate W regardless of whether the size (diameter) of the semiconductor substrate W is larger or smaller than the top surface size of the support base 12. Come into contact.
- the formation position of the static elimination electrode 16 is not limited to the peripheral edge of the support base 12.
- the static elimination electrode 16 is positioned between the chuck electrodes 14A and 14B. Also good.
- the static elimination electrode 16 is formed so as to face the surface of the insulating layer 13 through the space between the chuck electrodes 14A and 14B inside the support base 12.
- any form such as a dotted shape shown in FIG. 3 or a linear shape shown in FIG. 4 is applicable.
- the chuck electrodes 14A and 14B have a comb-shaped structure in FIG. 3, and a fan-shaped structure in FIG.
- the constituent material of the static elimination electrode 16 is not particularly limited, but a low resistance material such as metal is preferable. Further, as a form of forming the electrode 16 for static elimination, a conductor film formed by a thin film process on the periphery (and a part of the upper surface thereof) of the support base 12, a Balta part, or the like can be applied. This implementation In the embodiment, the static elimination electrode 16 is formed of a copper thin film.
- the static elimination electrode 16 is connected to a ground potential 19 as a static elimination potential via a static elimination resistor 17.
- the static elimination resistor 17 suppresses the leakage of the electric charge charged to the semiconductor substrate W during electrostatic chucking, and releases the electric charge charged to the semiconductor substrate W to the ground potential when neutralizing the semiconductor substrate W. It is set to a resistance value that can
- the resistance value of the static elimination resistor 17 is the chuck potential (supply potential to the potential sources 15A and 15B), the separation distance between the substrate W and the chuck electrodes 14A and 14B, and the chuck electrodes 14A and 14B.
- the force set appropriately according to the electrode area, the number of arrangement, the process conditions for the semiconductor substrate W, etc. In any case, the resistance needs to be lower than that of the insulating film 13.
- the static elimination resistor 17 is set to a resistance value of lkQ or more, more preferably about 0.5 ⁇ .
- the switches 18A and 18B are connected to the positive potential. Switch to the source 15A and the negative potential source 15B, respectively, and apply predetermined positive and negative potentials to the chuck electrodes 14A and 14B, respectively. As a result, the negative charge and the positive charge are polarized and charged in the respective regions on the back surface of the semiconductor substrate W facing the chuck electrodes 14A and 14B via the insulating layer 13 by electrostatic induction. As a result, an electrostatic attracting force is generated between the semiconductor substrate W and the support base 12, and the semiconductor substrate W is held on the support base 12.
- the static elimination electrode 16 is in contact with the back surface of the semiconductor substrate W, a negative charge is supplied from the ground potential 19 to the semiconductor substrate W via the static elimination resistor 17, and the semiconductor substrate W is adsorbed. Contributes to increased power. Such an effect is particularly remarkable when the chuck electrode is a single electrode and the semiconductor substrate is negatively charged.
- a predetermined process for example, film formation or etching
- the process is completed and the semiconductor substrate W is detached from the support base 12, it is necessary to neutralize the semiconductor substrate W and release the adsorption force with the support base 12.
- the switches 18A and 18B are respectively switched to the ground potential side and the chuck electrodes 14A and 14B are discharged, and then the semiconductor substrate W is discharged mainly through the discharging electrode 16.
- the semiconductor substrate W can be quickly discharged by simply switching the switches 18A and 18B. Thereafter, the semiconductor substrate W is lifted upward via a lifter pin (not shown) and transferred to the next process by a predetermined transfer robot (not shown).
- the semiconductor substrate W can be appropriately neutralized, so that it is possible to prevent a transport error or damage when the semiconductor substrate W is detached. Further, since the static elimination circuit itself can be configured very simply, the electrostatic chuck device 11 can be manufactured at low cost. In addition, since a special processing operation for static elimination is not required, the semiconductor substrate W can be detached without reducing the productivity even if the throughput of the process is high.
- the static elimination electrode 16 is always in contact with the back surface of the semiconductor substrate W, and the static elimination resistor 17 is interposed between the static elimination electrode 16 and the ground potential, the semiconductor substrate Abnormal discharge such as arcing can be suppressed when the plate W is removed. As a result, the semiconductor substrate W can be protected.
- FIG. 5 is a schematic configuration diagram of an electrostatic chuck device 21 according to the second embodiment of the present invention.
- parts corresponding to those of the first embodiment described above are denoted by the same reference numerals, and detailed description thereof is omitted.
- the electrostatic chuck device 21 of the present embodiment is also disposed in the central portion of the upper surface of the support base 12 that extends only at the periphery of the support base 12 on the surface of the support base 12.
- the neutralization electrode 16 disposed in the central portion of the upper surface of the support base 12 is formed between the plurality of chuck electrodes 14A and 14B disposed in the support base 12, and the tip thereof is formed. As shown in FIGS. 3 and 4, the electrodes 14A and 14B are exposed on the upper surface of the insulating film 13 in the form of dots or lines.
- the static elimination resistor 27 constituting the static elimination circuit is configured with a variable resistance.
- This static elimination resistor 27 is set to the high resistance side to suppress potential leakage of the semiconductor substrate W during electrostatic chucking, and set to the low resistance side to quickly remove the substrate potential during static elimination. It comes to be.
- the adsorption force of the semiconductor substrate W can be further increased, the efficiency of static elimination can be increased, and the static elimination time can be greatly shortened.
- the static elimination resistor 27 can be appropriately adjusted in accordance with the process conditions for the semiconductor substrate W, a suitable chuck potential that varies depending on the process can be supplied to the semiconductor substrate W.
- FIG. 6 is a schematic configuration diagram of an electrostatic chuck device 31 according to the third embodiment of the present invention.
- parts corresponding to those of the first embodiment described above are denoted by the same reference numerals, and detailed description thereof is omitted.
- a static elimination circuit for the semiconductor substrate W is configured with a switch 38 interposed between the static elimination resistor 17 and the ground potential 19.
- the switch 38 corresponds to the “switch means” of the present invention, and can be constituted by an electronic circuit such as a mechanical switch member or a transistor.
- the switch 38 for electrically connecting Z between the static elimination electrode 16 and the static elimination potential (ground potential) Z, the switch 38 can be used during electrostatic chucking. Is turned off to prevent leakage of the substrate potential, and by turning on the switch 38, the substrate W can be discharged quickly. As a result, the resistance of the static elimination resistor 17 can be reduced, and the possibility that the charging potential of the semiconductor substrate W is important, such as RF plasma processing, can be eliminated. Further, the installation of the static elimination resistor 17 can suppress the generation of an arc between the static elimination electrode 16 and the semiconductor substrate W.
- FIG. 7 is a schematic configuration diagram of an electrostatic chuck device 41 according to the fourth embodiment of the present invention. .
- parts corresponding to those of the first embodiment described above are denoted by the same reference numerals, and detailed description thereof is omitted.
- the electrostatic chuck device 41 includes a semiconductor substrate W in an example in which a positive potential source 15 is connected to a chuck electrode 14 disposed inside a support base 12 via a switch 18.
- a static elimination circuit is configured by using a positive potential source 49 that supplies a charge having a different sign from that of the electric charge charged in the static electricity is shown.
- the positive potential source 49 for static elimination can be set according to the charged potential of the semiconductor substrate W.
- the positive potential source 49 is configured by a variable potential source, an optimum static elimination potential can be applied according to the type of the semiconductor substrate W.
- the supply potential source for the chuck electrode 14 is a negative power source
- the potential source 49 for static elimination is a negative potential source.
- FIG. 8 is a schematic configuration diagram of an electrostatic chuck device 51 according to the fifth embodiment of the present invention.
- portions corresponding to those in the first and third embodiments described above are denoted by the same reference numerals, and detailed description thereof is omitted.
- the through holes 54 formed at a plurality of locations in the surface of the support base 12 are provided on the back surface of the semiconductor substrate W placed on the surface of the support base 12.
- Each of the static elimination electrodes 52 to be in contact is accommodated.
- Each of these static elimination electrodes 52 is connected to a connection terminal 55 attached to the lower end side of the through hole 54 via a biasing member 53 in the form of a coil panel.
- These neutralizing electrode 52, biasing member 53, and connection terminal 55 also have a conductive material force such as metal.
- a static elimination circuit for the semiconductor substrate W is configured by interposing a switch 38 between the static elimination resistor 17 and the ground potential 19. ing.
- the static elimination resistor 17 is connected to each connection terminal 55 that communicates with the static elimination electrode 52 described above.
- the pole 52 is always in contact with the back surface of the semiconductor substrate W placed on the surface of the support 12 under the biasing force of the biasing member 53.
- the biasing force of the biasing member 53 is set to a biasing force sufficiently lower than the weight of the semiconductor substrate W. Therefore, the chucking force of the semiconductor substrate W by the chuck electrodes 14A and 14B will not be affected! /.
- the switches 18A and 18B are switched to the ground potential side and the chuck electrodes 14A and 14B are neutralized.
- switch 38 for static elimination is closed.
- the charge charged on the semiconductor substrate W is set to the ground potential 19 via the static elimination electrode 52, the biasing member 53, the connection terminal 55, the static elimination resistor 17 and the switch 38.
- the semiconductor substrate W is neutralized.
- the electrostatic chuck device 51 of the present embodiment can also obtain the same effects as those of the above-described embodiments.
- the grounding electrode 52 is always in contact with the back surface of the semiconductor substrate W at a predetermined contact pressure, the contact resistance with the semiconductor substrate W is reduced, and the charge removal of the semiconductor substrate W is performed. Can be performed promptly.
- an appropriate contact state between the static elimination electrode 52 and the semiconductor substrate W can be ensured.
- the installation of the static elimination resistor 17 can suppress the generation of an arc between the static elimination electrode 52 and the semiconductor substrate W.
- FIG. 9 is a schematic configuration diagram of an electrostatic chuck device 61 according to the sixth embodiment of the present invention.
- portions corresponding to those in the first and third embodiments described above are denoted by the same reference numerals, and detailed description thereof is omitted.
- a lift mechanism that raises and lowers the semiconductor substrate W on the support base 12 is installed below the support base 12.
- the lift mechanism includes a lift pin 62 and a lift unit 63 that lifts and lowers the lift pin 62 in a direction perpendicular to the surface of the support 12.
- the lift pin 62 is configured as a static elimination electrode according to the present invention.
- the lift pin 62 is accommodated in a through hole 64 formed in the support 12, and the tip of the lift pin 62 is in contact with the back surface of the semiconductor substrate W during the electrostatic chuck shown in the figure.
- lift lift Of course, only one 62 is shown, but of course it is not limited to this, and a plurality of them are arranged!
- the lift pin 62 is made of a conductive material such as metal and is fixed to the drive member 63a of the elevating unit 63.
- the elevating unit 63 is composed of an electric or compressed air cylinder or the like having high repeatability, and moves the drive member 63a in the vertical direction as indicated by arrows in the figure.
- the lift pin 62 is moved up and down between the position where the tip of the lift pin 62 projects the surface force of the support base 12 and the position where the lift pin 62 is retracted into the through hole 64 by the vertical movement of the drive member 63a.
- the drive member 63a is attached to the support base 12 via an annular insulating member 66 and a bellows 65.
- the drive member 63a of the elevating unit 63 is made of a conductive material such as metal.
- the lift pin 62 is connected to the static elimination resistor 17 through the driving member 63a.
- This static elimination resistor 17 is connected to the ground potential via the switch 38.
- the tip of the lift pin 62 is always moved by the lifting unit 63 to the back surface of the semiconductor substrate W.
- the height position is controlled to a position where it abuts.
- the lifting unit 63 may control the lifting torque to press the lift pin 62 against the back surface of the semiconductor substrate W with a certain pressure within a range without affecting the electrostatic chuck action.
- the electrostatic chuck device 61 of the present embodiment can also obtain the same effect as described above, and the semiconductor substrate W can be discharged quickly when the electrostatic chuck operation is released. Further, an arc is not generated between the back surface of the semiconductor substrate W and the tip of the lift pin 62 due to overcurrent.
- the semiconductor substrate W has been described as an example of the substrate to be processed.
- the present invention is not limited to this, and the present invention can also be applied to, for example, a glass substrate or a conductive substrate.
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006543261A JP5323317B2 (ja) | 2004-11-04 | 2005-10-27 | 静電チャック方法 |
US11/666,950 US7821767B2 (en) | 2004-11-04 | 2005-10-27 | Electrostatic chuck device |
CN2005800376076A CN101278385B (zh) | 2004-11-04 | 2005-10-27 | 静电吸盘装置 |
US12/924,125 US20110013338A1 (en) | 2004-11-04 | 2010-09-21 | Electrostatic chuck device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004320078 | 2004-11-04 | ||
JP2004-320078 | 2004-11-04 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/924,125 Continuation US20110013338A1 (en) | 2004-11-04 | 2010-09-21 | Electrostatic chuck device |
Publications (1)
Publication Number | Publication Date |
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WO2006049085A1 true WO2006049085A1 (ja) | 2006-05-11 |
Family
ID=36319097
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2005/019818 WO2006049085A1 (ja) | 2004-11-04 | 2005-10-27 | 静電チャック装置 |
Country Status (6)
Country | Link |
---|---|
US (2) | US7821767B2 (ja) |
JP (1) | JP5323317B2 (ja) |
KR (2) | KR20070072571A (ja) |
CN (1) | CN101278385B (ja) |
TW (1) | TWI390698B (ja) |
WO (1) | WO2006049085A1 (ja) |
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JP2013539913A (ja) * | 2010-09-17 | 2013-10-28 | ラム リサーチ コーポレーション | リフトピンを用いた静電デチャックのための極性領域 |
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JP7457765B2 (ja) | 2021-10-28 | 2024-03-28 | セメス株式会社 | 基板テスト装置およびそれを用いるデチャック力の測定方法 |
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Also Published As
Publication number | Publication date |
---|---|
CN101278385B (zh) | 2011-10-12 |
US7821767B2 (en) | 2010-10-26 |
JP5323317B2 (ja) | 2013-10-23 |
KR20070072571A (ko) | 2007-07-04 |
US20110013338A1 (en) | 2011-01-20 |
US20070297118A1 (en) | 2007-12-27 |
JPWO2006049085A1 (ja) | 2008-08-07 |
TW200618249A (en) | 2006-06-01 |
KR20080107473A (ko) | 2008-12-10 |
CN101278385A (zh) | 2008-10-01 |
TWI390698B (zh) | 2013-03-21 |
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