WO2005048447A1

WO2005048447A1 - Controllable mixer

Info

Publication number: WO2005048447A1
Application number: PCT/EP2004/010231
Authority: WO
Inventors: Herbert Peusens; Klaus Clemens
Original assignee: Thomson Licensing
Priority date: 2003-11-03
Filing date: 2004-09-13
Publication date: 2005-05-26
Also published as: EP1683265A1; DE10351115A1; CN1871766A; CN1871766B

Abstract

A heterodyne receiver has a mixer with at least one transistor whose operating point can be varied dynamically. The quality of the output signal from the mixer is assessed in order to control the operating point. The operating point is set such that the collector current is increased when the intermodulation interference is high, thus improving the intermodulation resistance. The collector current is reduced when the intermodulation interference is low, thus reducing the transistor noise. Furthermore, the current drawn is reduced in this situation. The circuit and the method are particularly suitable for RF receivers without tunable input filters, and for receivers in which the power consumption must be low.

Description

Controllable mixer

Nowadays, receivers for modulated radio-frequency signals are normally in the form of heterodyne receivers. Heterodyne receivers use a mixing stage to which the input signal to be received and an oscillator signal are supplied. The oscillator signal is tunable as a function of the desired frequency which is intended to be received. The mixing stage produces at its output a signal which, for example, is at a lower frequency than the input signal. This frequency is referred to as the intermediate frequency. The input signal, after having been down-mixed to the intermediate frequency, is passed via a bandpass filter and is demodulated in a downstream demodulator stage, in a typical receiver. The mixer is frequently preceded by a controllable amplifier which matches the level of the input signal to the input of the mixer. This measure prevents interference signals being produced by overdriving as a result of non-linearities in the mixing stage. On the other hand, weak input signals are amplified to such an extent that any noise which is added in the mixer has a negative effect on the signal-to-noise ratio. The so-called^' automatic gain control (AGC) thus ensures that the level of an input signal is matched to a downstream stage.

Furthermore, the signal flowpath upstream of the mixer also frequently contains a tunable bandpass filter, by means of which signals which are adjacent to the useful signal are reduced or suppressed. Suppression or reduction of signals which are adjacent to the useful signal is necessary because intermodulation interference can be caused in the mixer by the proximity of the useful signal and adjacent signals. Furthermore, adjacent signals which are at a higher signal level than the useful signal overdrive the mixer. This is the situation when the controllable amplifier upstream of the mixing stage matches the level of the useful signal to the input of the mixer and at the same time also raises the adjacent signal above the maximum permissible input level of the mixer.

The suppression of signals which are ad cent to a useful signal involves a high degree of circuitry complexity. Bandpass filters upstream of the mixer must be tunable to the tuned frequency. Furthermore, circuits or filters for suppressing adjacent signals must be trimmed at the factory during manufacture of receivers.

It is thus desirable to specify a circuit which has a mixer and in which intermodulation interference is suppressed and the noise behaviour is improved with less complex circuitry and with less need to trim, circuit parts during manufacture of receivers. A further aim is to specify a method for controlling a circuit according to the invention for optimization of the immunity to interference.

A mixer such as this and a method such as this are specified in the independent claims. Advantageous refinements and further developments are specified in the dependent claims .

The mixer according to the invention has at least one transistor whose operating point can be set by means of a control signal. An evaluation circuit which is connected via a bandpass filter downstream from the mixer evaluates the signal quality of the output signal. If the intermodulation interference is strong, as occurs, by way of example, when two strong signals are at closely adjacent frequencies, the operating point of the mixer is set such that a high collector current flows. When that collector current is high, the modulation range of the transistor in the mixer increases. The larger modulation range is required for two adjacent strong signals in order to avoid the creation of intermodulation products as a result of non-linearities in the transistor. One embodiment of the mixer makes use of an effect which occurs particularly in bipolar transistors. In this case, the mixing gain of the transistor at the same time decreases when high collector currents occur, which are required for large input signals. When the collector currents are low, the mixing gain rises. The collector current is reduced for small input signals and when the level of the adjacent signals is only low, because the requirements for the modulation range of the transistor are less. At the same time, a higher mixing gain occurs in mixers designed using bipolar transistors, and this is desirable for low input signals. Furthermore, the noise from the transistor is also reduced when the collector currents are low.

During reception of digitally coded signals, in which error correction is possible, the signal quality can be determined in a simple manner by evaluation of the error rate. However, other possible ways to determine the signal quality are also feasible, depending on the type of modulation used and on the input signal, 'for example analysis of the frequency spectrum of the output signal from the mixing stage.

The invention advantageously allows dynamic matching of the mixer characteristic to the respective reception situation, taking into account signals adjacent to the received signal. This makes it possible to improve the resistance to interference, with less circuitry complexity.

A receiver circuit according to the invention for reception of digital signals does not require a tunable bandpass filter at the input. The digital circuit evaluates the error rate of the received signal, and controls the characteristic of the mixing stage accordingly.

In particular, the circuit and the method are also suitable for mobile appliances or other appliances in which the current drawn should be minimal (intelligent power management) . Dynamic adjustment of the characteristic of the transistor in the mixing stage makes it possible to reduce the collector current, and thus the entire current that is drawn, when the reception situation is good and the signal levels are low. The reduced current drawn advantageously makes it possible to reduce the effort for heat dissipation in the circuitry. This also simplifies integration of the mixer and of further components _r such as a demodulator, in a single integrated circuit.

In a further development, initial values for operation of the mixer in the receiver are stored in a memory. These initial values include, for example, information about the modulation method, the code rate and/or the symbol rate. The modulation method may, inter alia, comprise phase modulation methods such as BPSK (Binary Phase Shift Keying), QPSK (Quadrature Phase Shift Keying), 8PSK (8 Phase Shift Keying) , or combined phase amplitude modulation methods such as QAM (Quadrature Amplitude Modulation) , or else frequency modulation methods such as OFDM (Orthogonal Frequency Division Multiplex) .

The initial values are used as the basis for assessment of the current signal quality, and the operating point of the mixer is set so as to achieve at least a desired minimum signal quality. Values for a desired minimum signal quality are advantageously likewise stored in the memory, and the desired minimum signal quality may differ, depending on the modulation method that is used. In this case, values for the desired minimum signal quality are stored for each modulation method. In the case of digitally coded signals, the signal quality is inversely proportional to the error rate. In a further development, individual optimization routines are stored for each of the different initia-L values mentioned above. The optimization routines are then used to optimize the setting of the mixer. The theoretical principle of the invention can be derived from analysis of the non-linear transmission characteristic of a four-pole network (illustrated here only up to the 3rd order) : y = a-x + b-x² +c-x³ (1)

A two-tone signal x(t) is passed to the four-pole network with the transfer function as in equation (1) : x(t)-u-sm(m_l-t) + v-sin(m₂-t) (2)

Equation (3) is obtained by substitution of (2) and (1):

3 ₃ 3 ₃ + a-u-sm(uj_χ • t) + ^■ • sin(eτ₂ -t) +— c-u -sin _j -t) + — c-v •sin(cr₂ -t)

:2] 3 _{2 2} + — c-u-v • s (m^ ^■ t) + — c ^■ u ^■ v ^■ sin(m ₂ ^■ t) [3] 2 + b-u-v-cos((-ar_l ~m₂)t) — b • u • v ^■ COS((Ή_X +m₂)t) [4] 1 1 — b-u -COS(2G7_J -t) — b-v -COS(2ST₂ -t) [5] ^■ c - u - v² • singe , ± 2Qτ₂)t) [6]

1 ₃ 1 ₃ • ^■ — c - u • sin(3sr_j • t) — c • v ^■ SIII(3G7₂ • t) [7]

In the equation above, the equation parts are as follows :

[1] represents the DC component,

[2] represents the linear component,

[3] represents the cross-modulation component,

[4] represents the intermodulation IM2, [5] represents the square component (twice the frequencies of the signals ωi and ω₂) ;

[6] represents the intermodulation IM3, and [7] represents the cubic component (three times the frequencies of the signals ωi and ω₂) -

The factors b and c in (1) can be controlled by suitable control of the mixer characteristic such that the non-linear components IM2 [4] and IM3 [6] are variable. The characteristic, and hence the factors b and c_r are controlled via the control input in the circuit according to the invention.

The invention will be described in the following text with reference to the drawing, in which:

Figure 1 shows a receiver according to the prior art, Figure 2 shows a receiver with a mixer according to the invention, Figure 3 shows a first schematic illustration of a mixer according to the invention,

Figure 4 shows a second schematic illustration of a mixer according to the invention, Figure 5 shows an illustration of the intermodulation immunity as a function of the collector current for a transistor,

Figure 6 shows a schematic illustration of the input and output signals of a mixer for different transistor operating points.

Identical or similar elements are provided with the same reference symbols in the figures.

Figure 1 shows a schematic block diagram of a receiver according to the prior art. An input signal RFi_n is passed to a tunable bandpass filter 1. The tunable bandpass filter 1 is used for selection of the desired input signal, and for suppression of possible adjacent signals. The signal is passed from the tunable bandpass filter 1 to a variable- gain amplifier 2. The amplifier 2 is connected to a mixer 3. The mixer 3 is also supplied with the signal at a variable frequency from an oscillator 4. An intermediate frequency signal IF is produced at the output of the mixer 3 at a frequency which is lower than the frequency of the input signal RF_ιn. The intermediate frequency signal IF is passed to a bandpass filter 6 at a fixed mid-frequency. The intermediate frequency signal is passed from the bandpass filter 6 to a control circuit 7, and to a demodulator 8. The demodulated signal is produced at an output 9 of the demodulator 8 for further processing. The control circuit 7 uses a control signal AGC to control the variable amplifier 2. This control loop ensures that the input signal RF_ln is applied to the mixer 3 at a suitable signal level. The demodulator 8 demodulates the signal for further processing.

Figure 2 shows a schematic block diagram of a receiver with a mixer according to the invention. An input signal RF_ιn is passed to an amplifier 2. The input signal is passed from the amplifier 2 to a mixer 3. The mixer 3 is supplied with the signal at a variable frequency from an oscillator 4. Furthermore, the mixer 3 is supplied with a signal AGQC. An intermediate frequency signal IF is passed from the output of the mixer 3 to a bandpass filter 6 at a fixed mid-frequency. The signal is passed from the bandpass filter 6 to a demodulator 8. The demodulator 8 demodulates the received signal, and produces it at an output 9. The signal at the output 9 is also passed to an evaluation circuit 7, which assesses the signal quality and produces the monitoring signal AGQC as a function of the quality of the received and demodulated signal, which monitoring signal is applied to the mixer 3. A memory 5 is connected to the evaluation circuit for storage and for reading initial values, as well as data obtained during operation.

Figure 3 shows a first schematic circuit diagram of a mixer according to the invention. A radio-frequency signal RFi_n is passed via a coupling capacitor 11 to the base connection of a transistor 12. The operating point of the transistor 12 is set via a voltage divider comprising the resistors 13 and 14 at the base connection of the transistor 12. A control voltage U_s is applied to the base connection of the transistor 12 via a resistor 16. The control voltage ϋ_s is derived from the signal AGQC, which is not illustrated in the figure. The operating point of the transistor 12 can be varied by means of the control voltage U_s. A capacitor 18 and an inductance 19, connected in parallel, are connected to an operating voltage UB at the collector connection of the transistor 12. The parallel circuit formed by the capacitor 18 and the inductance 19 forms an IF filter 17. The intermediate frequency signal IF is also produced at the collector output of the transistor 12, and is emitted via a coupling capacitor 23. An emitter resistor 22 is connected to earth at the emitter connection of the transistor 12. Furthermore, the emitter connection of the transistor 12 is supplied via a coupling capacitor 21 with the signal LO at a variable frequency from an oscillator which is not illustrated in the figure. Figure 4 shows a second schematic illustration of a mixer according to the invention. The mixer in Figure 4 is suitable for processing balanced signals. The negative mathematical sign in the annotation of the signals indicates that the signals are in antiphase. A signal RFi_n is passed via a coupling capacitor 11 to the base connections of two transistors 26 and 29. The base connections of the transistors 26 and 29 are connected to earth via a resistor 14. An antiphase signal -RFι_n is passed via a coupling capacitor 111 to the base connections of two transistors 27 and 28. The base connections of the transistors 27 and 28 are connected to earth via a resistor 114. The transistor pairs 26 and 27 as well as 28 and 29 are connected as differential amplifiers . The emitters of the transistor pairs 26 and 27 as well as 28 and 29 are respectively connected to one another. The connected emitter connections of the transistors 26 and 27 are connected to earth via a resistor 30 and a capacitor 31. The connected emitter connections of the transistor pair 28 and 29 are likewise connected to the capacitor 31 via a resistor 130, and are connected to earth via this capacitor 31. The signal LO from an oscillator is applied to the connected emitter connections of the transistors 26 and 27 via a coupling capacitor 21. The antiphase signal -LO is applied to the connected emitter connections of the transistor pair 28 and 29 via a coupling capacitor 121. A control voltage U_s, which is derived from the signal AGQC (which is not illustrated in the figure) , is connected between the resistor 30 and the capacitor 31. The operating points of the differential amplifiers formed by the transistor pairs 26 and 27 as well as 28 and 29 can be adjusted by means of the control voltage U_s. The collector connections of the transistors 26 and 28 are connected to one another. The collector connections of the transistors 27 and 29 are likewise connected to one another. The intermediate frequency signal IF and the associated antiphase signal -IF can be tapped off at the connected collector connections of the transistors via output capacitors 23 and 123. A parallel circuit formed by an inductance 19 and a capacitor 18 is coupled between the connected collector connections of the transistor pairs 26 and 28 as well as 27 and 29. The circuit formed by the inductance and the capacitor forms an intermediate frequency filter 17. In Figure 4, the inductance 19 is formed from two series-connected, inductance elements, at whose centre connection the supply voltage for the differential amplifiers is fed. Feeding the supply voltage via the centre connection avoids the direct current having any influence on the inductance.

Figure 5 shows an illustration of the intermodulation resistance IM3 of a transistor, as a function of the collector current. The family of characteristics clearly shows that the intermodulation immunity level is a function of the collector current when the collector/emitter voltage is constant.

By way of example, Figure 6 shows a simplified schematic illustration of the input and output signals of a mixer for ^'different operating points of a transistor. Figure 6a shows two inputs signals RF_use and RF_aj with the same signal levels. The useful signal RF_use is at a frequency of 205 MHz. The adjacent signal RF_adj is at a frequency of 214 MHz. It is assumed that the mixer oscillator is operating at a frequency of 200 MHz. The intermediate frequency signals IF_use and IF_aci_j, on the one hand, and the undesirable intermodulation product IFj_.nt, on the other hand, are produced in the mixer. The useful intermediate frequency signal IF_use is at a frequency of 5 MHz (205 MHz - 200 MHz) , the adjacent intermediate frequency signal is at frequency of 14 MHz (214 MHz - 200 MHz) , and the interference intermediate frequency signal IF_int, which is formed by intermodulation, is at a frequency of 4 MHz (200 MHz - (2 x 205 MHz - 214 MHz)). Figure 6b shows examples of useful, adjacent and interference intermediate frequency signals. The diagram in Figure 6b is based on the assumption that the mixing transistor is set to a high mixing gain. The three intermediate frequency output signals are at relatively high levels, with the interference intermediate frequency signal IFi_nt being at only a slightly lower level than the useful intermediate frequency signal IF_use. The intermodulation separation, which is the separation between the useful signal and the interference signal, is, by way of example, assumed to be X dBc, where dBc represents a weighted measurement. Figure 6c shows the output signals from the mixer when the mixing gain of the mixer transistor is lower. The useful intermediate frequency signal IF_use is at a lower level than in Figure 6b. The interference intermediate frequency signal IF_nt has not been reduced to the same extent as the useful intermediate frequency signal. The intermodulation separation was increased considerably in comparison to the example in Figure 6b, and is Y dBc. In this case, Y dBc is greater than X dBc.

Claims

Patent Claims

1. Controllable mixer (3) having at least one transistor (12) , to which an oscillator signal (LO) and an input signal (RF_ra) are supplied, with the input signal (RF_IN) comprising a useful signal (RF_use) and further signals (RF_adj), and with an output signal (IF) being produced as an output of the mixer (3), characterized in that a controller is provided, which applies a control signal (U_s) to the mixer as a function of the signal quality of the output signal (IF) , in that the operating point of the at least one transistor (12) can be set by means of the control signal (U_s) , in which case the intermodulation immunity and/or the noise in the output signal (IF) can be varied as a function of the operating point off the at least one transistor (12) .

2. Controllable mixer according to Claim 1, characterized in that a demodulator (8) which is connected downstream from the mixer (3) , and an evaluation circuit (7) are provided for assessment of the signal quality of the output signal (IF) .

3. Controllable mixer according to Claim 2, characterized in that the evaluation circuit (7) assesses the error rate of a digitally coded signal.

4. Controllable mixer according to one of the preceding claims, characterized in that a memory (5) is provided for recording initial values, on the basis of which the signal quality can be assessed and optimized.

5. Controllable mixer according to Claim 4, characterized in that the initial values comprise information about a desired minimum signal quality, the symbol rate, the code rate, and/or the modulation method, and optimization routines for reception optimization can be selected as a function of the initial values.

6. Method for controlling a mixer (3) in a receiver having at least one transistor (12) to which an oscillator signal (LO) and an input signal (RF_XN) are supplied, with the input signal (RF_IN) comprising a useful signal (RF_use) and further signals (RF_adj) , and with an output signal (IF) being produced as an output of the mixer (3), characterized in that the method comprises the following steps : - assessing the signal quality of the output signal (IF); - setting the operating point of the at least one transistor (12) as a function of the quality of the output signal (IF); and in that the intermodulation immunity and/or the noise of the at least one transistor (12) are set by means of the operating point of the at least one transistor (12) .

7. Method according to Claim 6, characterized in that the error rate of a digitally coded signal is evaluated in order to assess the signal quality.

8. Method according to Claim 6 or 7, characterized in that initial values which are stored at the start are selected in order to assess the signal quality and in order to set the operating point of the transistor (12) .

9. Method according to Claim 8, characterized in that different initial values and/or optimization routines are selected for different modulation methods, code rates and/or symbol rates.