WO2004073014A3 - Metal reduction in wafer scribe area - Google Patents
Metal reduction in wafer scribe area Download PDFInfo
- Publication number
- WO2004073014A3 WO2004073014A3 PCT/US2004/001925 US2004001925W WO2004073014A3 WO 2004073014 A3 WO2004073014 A3 WO 2004073014A3 US 2004001925 W US2004001925 W US 2004001925W WO 2004073014 A3 WO2004073014 A3 WO 2004073014A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- metal
- scribe area
- wafer
- metal reduction
- wafer scribe
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
- H01L21/3043—Making grooves, e.g. cutting
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Dicing (AREA)
Abstract
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006502974A JP2006516824A (en) | 2003-01-27 | 2004-01-23 | Metal reduction in wafer scribe area |
CN2004800029150A CN1777978B (en) | 2003-01-27 | 2004-01-23 | Metal reduction in wafer scribe area |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/351,798 | 2003-01-27 | ||
US10/351,798 US6951801B2 (en) | 2003-01-27 | 2003-01-27 | Metal reduction in wafer scribe area |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2004073014A2 WO2004073014A2 (en) | 2004-08-26 |
WO2004073014A3 true WO2004073014A3 (en) | 2005-04-21 |
Family
ID=32735850
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2004/001925 WO2004073014A2 (en) | 2003-01-27 | 2004-01-23 | Metal reduction in wafer scribe area |
Country Status (6)
Country | Link |
---|---|
US (1) | US6951801B2 (en) |
JP (1) | JP2006516824A (en) |
KR (1) | KR101001530B1 (en) |
CN (1) | CN1777978B (en) |
TW (1) | TWI325155B (en) |
WO (1) | WO2004073014A2 (en) |
Families Citing this family (46)
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US20040232448A1 (en) * | 2003-05-23 | 2004-11-25 | Taiwan Semiconductor Manufacturing Co. | Layout style in the interface between input/output (I/O) cell and bond pad |
CN100370580C (en) * | 2004-03-29 | 2008-02-20 | 雅马哈株式会社 | Semiconductor wafer and its producing method |
US7553700B2 (en) * | 2004-05-11 | 2009-06-30 | Gem Services, Inc. | Chemical-enhanced package singulation process |
US7223673B2 (en) * | 2004-07-15 | 2007-05-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of manufacturing semiconductor device with crack prevention ring |
JP4288229B2 (en) * | 2004-12-24 | 2009-07-01 | パナソニック株式会社 | Manufacturing method of semiconductor chip |
JP4471852B2 (en) * | 2005-01-21 | 2010-06-02 | パナソニック株式会社 | Semiconductor wafer, manufacturing method using the same, and semiconductor device |
US7572738B2 (en) * | 2005-05-23 | 2009-08-11 | Sony Corporation | Crack stop trenches in multi-layered low-k semiconductor devices |
US7582556B2 (en) * | 2005-06-24 | 2009-09-01 | Megica Corporation | Circuitry component and method for forming the same |
KR100672728B1 (en) * | 2005-07-12 | 2007-01-22 | 동부일렉트로닉스 주식회사 | Method for manufacturing of semiconductor device |
US7250670B2 (en) * | 2005-09-27 | 2007-07-31 | United Microelectronics Corp. | Semiconductor structure and fabricating method thereof |
CN100481455C (en) * | 2005-12-22 | 2009-04-22 | 中芯国际集成电路制造(上海)有限公司 | Seal ring structure with incomplete contact through hole stack |
US7511379B1 (en) | 2006-03-23 | 2009-03-31 | National Semiconductor Corporation | Surface mountable direct chip attach device and method including integral integrated circuit |
US7732897B2 (en) * | 2006-06-15 | 2010-06-08 | Taiwan Semiconductor Manufacturing Co., Ltd | Methods of die sawing and structures formed thereby |
US7679195B2 (en) * | 2006-06-20 | 2010-03-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | PAD structure and method of testing |
JP2008066716A (en) * | 2006-08-10 | 2008-03-21 | Matsushita Electric Ind Co Ltd | Semiconductor device |
US7622364B2 (en) * | 2006-08-18 | 2009-11-24 | International Business Machines Corporation | Bond pad for wafer and package for CMOS imager |
US7566915B2 (en) * | 2006-12-29 | 2009-07-28 | Intel Corporation | Guard ring extension to prevent reliability failures |
US9601443B2 (en) * | 2007-02-13 | 2017-03-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Test structure for seal ring quality monitor |
US7829998B2 (en) * | 2007-05-04 | 2010-11-09 | Stats Chippac, Ltd. | Semiconductor wafer having through-hole vias on saw streets with backside redistribution layer |
US7674689B2 (en) * | 2007-09-20 | 2010-03-09 | Infineon Technologies Ag | Method of making an integrated circuit including singulating a semiconductor wafer |
KR20090046993A (en) * | 2007-11-07 | 2009-05-12 | 주식회사 동부하이텍 | Semiconductor device and method for fabricating the same |
JP5583320B2 (en) * | 2007-12-05 | 2014-09-03 | ピーエスフォー ルクスコ エスエイアールエル | Semiconductor wafer and manufacturing method thereof |
US8013425B2 (en) | 2008-05-13 | 2011-09-06 | United Microelectronics Corp. | Scribe line structure for wafer dicing and method of making the same |
US7821104B2 (en) * | 2008-08-29 | 2010-10-26 | Freescale Semiconductor, Inc. | Package device having crack arrest feature and method of forming |
US8022509B2 (en) * | 2008-11-28 | 2011-09-20 | United Microelectronics Corp. | Crack stopping structure and method for fabricating the same |
CN102272903A (en) * | 2009-01-30 | 2011-12-07 | 松下电器产业株式会社 | Semiconductor device and method for manufacturing same |
US8237246B2 (en) * | 2009-02-12 | 2012-08-07 | International Business Machines Corporation | Deep trench crackstops under contacts |
US8748295B2 (en) | 2009-06-15 | 2014-06-10 | Infineon Technologies Ag | Pads with different width in a scribe line region and method for manufacturing these pads |
JP5175803B2 (en) * | 2009-07-01 | 2013-04-03 | 新光電気工業株式会社 | Manufacturing method of semiconductor device |
US8357996B2 (en) | 2009-11-17 | 2013-01-22 | Cree, Inc. | Devices with crack stops |
JP4649531B1 (en) * | 2009-12-08 | 2011-03-09 | 新光電気工業株式会社 | Electronic device cutting method |
JP2011134824A (en) * | 2009-12-24 | 2011-07-07 | Elpida Memory Inc | Semiconductor wafer, method of manufacturing semiconductor wafer, and semiconductor device |
JP2011199123A (en) * | 2010-03-23 | 2011-10-06 | Elpida Memory Inc | Semiconductor device and method for manufacturing the same |
US8531008B2 (en) * | 2010-11-23 | 2013-09-10 | Infineon Technologies Ag | Material structure in scribe line and method of separating chips |
US9331019B2 (en) | 2012-11-29 | 2016-05-03 | Infineon Technologies Ag | Device comprising a ductile layer and method of making the same |
US8659173B1 (en) | 2013-01-04 | 2014-02-25 | International Business Machines Corporation | Isolated wire structures with reduced stress, methods of manufacturing and design structures |
US8937009B2 (en) | 2013-04-25 | 2015-01-20 | International Business Machines Corporation | Far back end of the line metallization method and structures |
US9490173B2 (en) * | 2013-10-30 | 2016-11-08 | Infineon Technologies Ag | Method for processing wafer |
CN104701271A (en) * | 2013-12-05 | 2015-06-10 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure and forming method thereof |
US10553508B2 (en) | 2014-01-13 | 2020-02-04 | Nxp Usa, Inc. | Semiconductor manufacturing using disposable test circuitry within scribe lanes |
CN105025480B (en) * | 2014-04-29 | 2019-04-05 | 中国电信股份有限公司 | The method and system of subscriber card digital signature authentication |
US9601354B2 (en) | 2014-08-27 | 2017-03-21 | Nxp Usa, Inc. | Semiconductor manufacturing for forming bond pads and seal rings |
JP6571344B2 (en) * | 2015-02-19 | 2019-09-04 | 株式会社Screenホールディングス | Substrate processing equipment |
DE102017123846B4 (en) * | 2017-10-13 | 2020-03-12 | Infineon Technologies Austria Ag | Power semiconductor die and semiconductor wafers comprising an oxide peeling stopper and method for processing a semiconductor wafer |
US10734304B2 (en) * | 2018-11-16 | 2020-08-04 | Texas Instruments Incorporated | Plating for thermal management |
CN111785686B (en) * | 2019-04-03 | 2023-08-15 | 华邦电子股份有限公司 | Method for cutting wafer and crystal grain |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6271578B1 (en) * | 1997-03-24 | 2001-08-07 | Siemens Aktiengesellschaft | Crack stops |
US20030197289A1 (en) * | 2002-04-19 | 2003-10-23 | Kulicke & Soffa Investments, Inc. | Design of interconnection pads with separated probing and wire bonding regions |
US20040219776A1 (en) * | 2002-12-30 | 2004-11-04 | Cheolsoo Park | Method for forming metal lines in a semiconductor device |
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JPS60246647A (en) * | 1984-05-22 | 1985-12-06 | Nec Corp | Semiconductor device |
US5136354A (en) * | 1989-04-13 | 1992-08-04 | Seiko Epson Corporation | Semiconductor device wafer with interlayer insulating film covering the scribe lines |
JPH05326697A (en) * | 1992-05-23 | 1993-12-10 | Sony Corp | Manufacture of semiconductor device |
JP2776457B2 (en) * | 1992-12-29 | 1998-07-16 | インターナショナル・ビジネス・マシーンズ・コーポレイション | Crack stop forming method for semiconductor device and semiconductor device |
US5596226A (en) * | 1994-09-06 | 1997-01-21 | International Business Machines Corporation | Semiconductor chip having a chip metal layer and a transfer metal and corresponding electronic module |
JPH08162456A (en) * | 1994-12-07 | 1996-06-21 | Kawasaki Steel Corp | Method of manufacturing bump |
JP3493531B2 (en) * | 1995-02-03 | 2004-02-03 | カシオ計算機株式会社 | Method for manufacturing semiconductor device |
JPH09306913A (en) * | 1996-05-15 | 1997-11-28 | Citizen Watch Co Ltd | Semiconductor device and its manufacture |
JPH10154670A (en) * | 1996-11-26 | 1998-06-09 | Toshiba Corp | Manufacture of semiconductor device |
US6075280A (en) * | 1997-12-31 | 2000-06-13 | Winbond Electronics Corporation | Precision breaking of semiconductor wafer into chips by applying an etch process |
JPH11204525A (en) * | 1998-01-14 | 1999-07-30 | Seiko Epson Corp | Manufacture of semiconductor device |
JP2000252236A (en) * | 1999-03-03 | 2000-09-14 | Toshiba Corp | Semiconductor device and fabrication thereof |
CN1138305C (en) * | 1999-05-27 | 2004-02-11 | 国际商业机器公司 | Semiconductor structure having conductive fuel and making method thereof |
US6362524B1 (en) * | 2000-07-26 | 2002-03-26 | Advanced Micro Devices, Inc. | Edge seal ring for copper damascene process and method for fabrication thereof |
JP2002217196A (en) * | 2001-01-17 | 2002-08-02 | Mitsubishi Electric Corp | Semiconductor device and its manufacturing method |
US6881610B2 (en) * | 2003-01-02 | 2005-04-19 | Intel Corporation | Method and apparatus for preparing a plurality of dice in wafers |
-
2003
- 2003-01-27 US US10/351,798 patent/US6951801B2/en not_active Expired - Lifetime
-
2004
- 2004-01-14 TW TW093100911A patent/TWI325155B/en not_active IP Right Cessation
- 2004-01-23 CN CN2004800029150A patent/CN1777978B/en not_active Expired - Fee Related
- 2004-01-23 KR KR1020057013873A patent/KR101001530B1/en not_active IP Right Cessation
- 2004-01-23 WO PCT/US2004/001925 patent/WO2004073014A2/en active Application Filing
- 2004-01-23 JP JP2006502974A patent/JP2006516824A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6271578B1 (en) * | 1997-03-24 | 2001-08-07 | Siemens Aktiengesellschaft | Crack stops |
US20030197289A1 (en) * | 2002-04-19 | 2003-10-23 | Kulicke & Soffa Investments, Inc. | Design of interconnection pads with separated probing and wire bonding regions |
US20040219776A1 (en) * | 2002-12-30 | 2004-11-04 | Cheolsoo Park | Method for forming metal lines in a semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
CN1777978A (en) | 2006-05-24 |
WO2004073014A2 (en) | 2004-08-26 |
TW200416857A (en) | 2004-09-01 |
US20040147097A1 (en) | 2004-07-29 |
JP2006516824A (en) | 2006-07-06 |
TWI325155B (en) | 2010-05-21 |
KR101001530B1 (en) | 2010-12-16 |
US6951801B2 (en) | 2005-10-04 |
KR20050095630A (en) | 2005-09-29 |
CN1777978B (en) | 2010-07-21 |
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