WO2004068562A1 - Packaging integrated circuits - Google Patents

Packaging integrated circuits Download PDF

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Publication number
WO2004068562A1
WO2004068562A1 PCT/SG2003/000018 SG0300018W WO2004068562A1 WO 2004068562 A1 WO2004068562 A1 WO 2004068562A1 SG 0300018 W SG0300018 W SG 0300018W WO 2004068562 A1 WO2004068562 A1 WO 2004068562A1
Authority
WO
WIPO (PCT)
Prior art keywords
conveyor
lead frame
integrated circuits
die
frame elements
Prior art date
Application number
PCT/SG2003/000018
Other languages
French (fr)
Inventor
Seng Gee Tan
Roslie Saini Bin Bakar
Sze Chee Tan
Ham Chu Chua
Original Assignee
Infineon Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Priority to DE10394171T priority Critical patent/DE10394171T5/en
Priority to AU2003214769A priority patent/AU2003214769A1/en
Priority to PCT/SG2003/000018 priority patent/WO2004068562A1/en
Publication of WO2004068562A1 publication Critical patent/WO2004068562A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67121—Apparatus for making assemblies not otherwise provided for, e.g. package constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67138—Apparatus for wiring semiconductor or solid state device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4842—Mechanical treatment, e.g. punching, cutting, deforming, cold welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7565—Means for transporting the components to be connected
    • H01L2224/75651—Belt conveyor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7865—Means for transporting the components to be connected
    • H01L2224/78651—Belt conveyor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92—Specific sequence of method steps

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

An integrated circuit packaging system having a conveyor 60 for carrying the integrated circuits between some of the processing devices which package the integrated circuits. Leadframe elements 51 comprising die pads 53 and leads 55 are attached to the leadframe element 51 by an attachment apparatus 81. The integrated circuits are attached to the conveyor 60 by a die attachment apparatus 83. Wire bonding is performed by a wire bonding apparatus 85. Moulding is performed by a moulding apparatus 87 to form resin bodies around the integrated circuits. The moulded resin bodies constitute packages. The packages are then removed from the conveyor 60.

Description

Packaging Integrated Circuits
Field of the invention
The present invention relates to methods for packaging integrated circuits, to an integrated circuit packaging system, and to an apparatus which is part of the system.
Background of Invention
It is conventional to "package" integrated circuits by embedding them in a resin material with electrical connections between electrical contacts of the integrated circuit and leads extending outside the resin material. This is usually performed using lead frames 1 having the general form shown in Fig. 1. The leadframe 1 consists of multiple die pads 3, electrical leads 5 support structures 7 and indexing portions 9. The indexing portions 9 include indexing holes 15. The leadframes are supplied as a reel in which the leadframe 1 is wound around an axis of the reel. As shown in Fig. 1 , the electrical leads in sets of three leads per die pad, with a first lead connected to the corresponding die pad, and two lead to either side of that first lead, However, many other forms of lead frame are known having different numbers of leads per die pad and different configurations.
The integrated circuits are packaged using the following steps, which are given in the flow diagram of Fig. 2 and performed by a system as shown in Fig. 3.
Firstly, the leadframe 1 is unwound from the reel 13, passed through the die bonder 31 and then wound onto another reel 17. In the die bonder 31 respective integrated circuits are placed onto the areas 11 shown dashed in Fig. 1 and bonded in that position to the three electrical leads 5 associated with the die pad 3 (step 21). Note that in other forms of the leadframe the integrated circuit can be bonded in different positions depending on the packaging/application requirement.
Then, the reel 17 is transferred to the inlet of a wire bonder 33, and the indexing portions 9 are unwound from the reel 17, and passed through the wire bonder 33. There the contacts on the integrated circuit are electrically connected to respective die pads 3 by a wire bonding process (step 23).
Then the lead frame 1 passes on to a moulding system 35 where a resin body is moulded around the integrated circuit (step 25) leaving the electrical leads 5 projecting out of the body. The moulding can be performed by a "multi- plunger" operation, i.e. by a machine having many plungers ("multi-plungers") to transfer or inject melted resin into mold cavities and to cover and encapsulate the die and wires, so as to protect them. The indexing portions 9 (which are still connected to the rest of leadframe 1 ) are then wound onto a third reel 18.
The reel 18 is transferred to the inlet of a galvanic apparatus 37, and the leadframe 1 passes into the galvanic apparatus 37 where a galvanic process (step 27) is carried out to clean resin flashes, all contamination on the leadframe 1 and then plate a layer of solder on the leadframe 1. The leadframe 1 is then wound onto a fourth reel 20.
Finally, the reel 20 is transferred to the inlet of a trimming, forming and testing machine 39, and the leadframe 1 passes into the trimming, forming and testing apparatus machine 39. There an operation (step 29) is carried out in which the leads 5 are cut in an intermediate location indicated by the dashed lines 19 in Fig. 1. This leaves each die portion 3 connected to one or more lead portions 14 extending outside of the resin body as shown in Fig. 4. Testing operations are then carried out. Thus, it is clear that only a small proportion of the lead frame material shown in Fig. 1 is actually used in the packaged circuit. The remaining material of the leadframe 1 is scapped. Furthermore, many winding and unwinding operations are needed. Operators also have to transfer the heavy reels 13, 17, 18, 20 between the various machines. Racks have been created to hold the reels as they are transferred between the machines, but these consume production space, which further contributes to the production cost.
Summary of the Invention
The present invention aims to provide new and useful packaging methods, and systems and apparatus for performing the methods.
In general terms, the present invention proposes that a conveyor is provided for carrying the integrated circuits between at least some of the processing steps, at least up to the end of the moulding process. The integrated circuits and leadframe elements comprising die pads and leads are attached to the conveyor at an initial position. When the processed integrated circuits are removed from the conveyor, the conveyor is returned to the start of the process, to be attached to other integrated circuits and leadframe elements.
Since the conveyor returns to the start of the process, rather than being discarded, material may be saved. In particular, in comparison to the known method described above, the wastage of much of the lead frame material of the lead frame may be avoided.
Preferably the conveyor is an endless conveyor passing through a plurality of the processing stages. Thus, no winding of the conveyor onto a reel is required.
The conveyor may be formed with pockets for receiving the leadframe elements. It preferably includes indexing holes. The invention may be expressed as a method for packaging integrated circuits, or in terms of a packaging system including the conveyor. Furthermore, in alternative expression, the invention provides an apparatus for locating the integrated circuits and leadframe elements on the conveyor.
Brief Description of The Figures
Preferred features of the invention will now be described, for the sake of illustration only, with reference to the following figures in which:
Fig. 1 shows a conventional lead frame;
Fig. 2 shows the steps of a known packaging method using the lead frame of Fig. 1 ;
Fig. 3 shows a known packaging system for performing the method of Fig. 2;
Fig. 4 shows a die pad and lead portions after they are cut from the remainder of the lead frame by the process of Fig. 2; Fig. 5, which is composed of Figs. 5(a) to 5(c), shows various lead frame elements suitable for use in a method which is an embodiment according to the invention;
Fig. 6 shows a conveyor for use in the method of Fig. 6;
Fig. 7 shows the steps of the packaging method of Fig. 5; and Fig. 8 shows a packaging system which is an embodiment of the invention.
Detailed Description of the embodiments
A packaging method which is an embodiment of the invention will now be described. Referring to Fig. 5, the embodiment of the invention employs lead frame elements 51 made up of die pads 53 and leads 55. The lead frame element 51 is in fact similar to what is shown in Fig. 4: the remains of the lead frame 1 of Fig. 1 when the portions outside the dashed lines 9 are removed. There is one lead frame element for each die pad of the integrated circuit. The lead frame element 51 shown in Fig. 5(a) includes a region 56 which is used for accurate placing purposes. This is removed subsequently during a trimming/singulation step (see below), or in a forming and testing step (see below).
Note that this is not the only form of lead frame element to which the present invention is applicable. Fig. 5(b) shows a second suitable leadframe element 57. Elements of the lead frame element 57 of Fig. 5(b) corresponding to those of Fig. 5(a) are given the same reference numerals. In use two dies are located on the two respective die pads 53. Removal of the central portion 56 of the leadframe element removes the electrical connection between these integrated circuits.
Fig. 5(c) shows a third suitable form of leadframe element, again using the same reference numerals as in Fig. 5(a) to label corresponding items. In this case the region 56 is rectangular and connects four die pads 53 and corresponding sets of leads 55.
Which design of lead frame element is used depends upon the application, and factors such as cost. For example, the leadframe of Fig. 5(b) results in less wasted material than the leadframe of Fig. 5(c).
Turning to Fig. 6, the conveyor 60 of the embodiment is shown. It includes indexing holes 61 and pockets 63 for receiving lead frame elements 51 as shown in Fig. 5. The pockets 63 are arranged in a pattern such that the die elements 53 are correctly positioned in relation to each other for sets of die elements to be connected later (as described below) to respective integrated circuits. The conveyor 60 is made of high toughness, and high temperature and wear resistant material. The pockets preferably have a shape and depth such that they can hold the leadframe elements firmly until the singulation. For example, the pockets 63 shown in Fig. 6 are intended for receiving a leadframe element such as the leadframe element 51 of Fig. 5(a). However, in the case that the carrier was intended to receive leadframe elements as shown in Fig. 5(b), some or all of the pockets might be formed with the shape shown as 671 in Fig. 6, and a different shape still could be chosen for the leadframe elements of Fig. 5(c). A skilled person has no difficulty constructing suitable pockets for a given lead frame.
The steps of the packaging method are shown in Fig. 7, and the corresponding arrangement of the packaging system is shown in Fig. 8. The conveyor 60 runs between a plurality of processing apparatuses (explained below). Adjustable buffers 82 may be included to take up slack in the conveyor 60 as required. These may have a similar design to buffers which are known for handling conventional leadframes.
In a first step (step 71) lead frame elements 51 are placed into the pockets 63 of the conveyor by a lead frame element attachment apparatus 81. Once the attachment apparatus has placed a lead frame element on the conveyor is may optionally activate a respective clip mounted on the conveyor to hold the lead frame element firmly during the subsequent processing steps until the clip is deactivated, for example at the singulation stage (see below). . the
The conveyor 60 then brings the lead frame elements 51 to a die bonder apparatus 83, which can be of the same form as the die bonder apparatus 31 of Fig. 3. At this point the integrated circuit is attached (step 72) to the die pad 53 at a location suitable for the contacts on the integrated circuit to be connected to corresponding leads 55 on the lead frame elements 51. The conveyor 60 then carries the integrated circuits and lead frame elements 51 to a wire bonder apparatus 85, which may be of the same form as the wire bonder apparatus 33 of Fig. 3, and where the die pads 53 are wire bonded to the corresponding pads of the integrated circuits (step 73).
The conveyor 60 then carries the integrated circuits and lead frame elements 61 to a moulding apparatus 87, which may be of the same form as the moulding apparatus 35 of Fig. 3, and where a resin body is formed around the integrated circuits and lead frame elements 61 , leaving a portion of the leads 55 projecting out of the resin body (step 74).
The conveyor 60 then carries the resin bodies to a singulation apparatus 89 where the resin bodies are singulated (step 75) to form packages, and the packages are removed from the conveyor 60. After this step, the resin bodies no longer require the conveyor 60 because the integrated circuits and wire bonds are protected by the resin, and the conveyor 60 passes back to the start of the process.
The singulated resin bodies (packages) are then collected and placed (e.g. dropped) into a cheaper and lighter container 90 (step 76), and the container 90 is dipped into a galvanic apparatus 88, which may have a structure similar to that of the galvanic apparatus 37 of Fig. 3.
Finally, the container 90 which transfers the resin bodies to a forming and testing apparatus 89, which may have much the same structure as a known forming and testing apparatus (which in some conventional systems replaces the apparatus 39 of Fig. 3) adapted to receive resin bodies tipped into a vibrator bowl. The apparatus 89 performs a forming and testing step (step 78) but with no requirement for a trimming step, since the leads 65 are already of the correct length, and the packaging operation is complete.

Claims

Claims
1. A process for packaging integrated circuits comprising:
(i) attaching a plurality of lead frame elements to a conveyor, the lead frame elements each including at least one die pad and at least one electrically conductive lead for each die pad;
(ii) attaching integrated circuits to the lead frame elements;
(iii) electrically connecting contacts of the integrated circuit to corresponding die pads;
(iv) moulding a resin body around each integrated circuit and the corresponding die pads leaving at least a portion of the corresponding leads exposed; and
(v) removing the resin bodies from the conveyor and returning the conveyor to be used at least once more in steps (i) to (iv).
2. A method according to claim 1 further including, before step (v), a step of singulating a plurality of the resin bodies.
3. A method according to claim 1 or claim 2 including further processing steps performed after the resin bodies are removed from the conveyor.
4. A method according to claim 3 in which the further processing steps include one or more of a galvanic process, a trimming process, and a testing process.
5. A method according to any preceding claim in which the conveyor is an endless loop extending through locations in which steps (i) to (v) are repeated for successive integrated circuits.
6. A method according to any preceding claim in which the conveyor includes pockets for receiving the respective lead frame elements.
7. A system for packaging integrated circuits, the system comprising:
a conveyor;
a lead frame element attachment device for attaching a plurality of lead frame elements to a conveyor, the lead frame elements each including at least one die pad and at least one electrically conductive lead for each die pad;
a die bonding device for attaching integrated circuits to the conveyor;
a wire bonding device for electrically connecting contacts of the integrated circuit to corresponding die pads;
a moulding device for moulding a resin body around each integrated circuit and the corresponding die pads leaving at least a portion of the corresponding leads exposed; and
drive means for driving the conveyor repeatedly between the lead frame attachment device, the die bonding device, the wire bonding device and the molding device.
8. A packaging system according to claim 7 in which the conveyor device is an endless loop extending between the lead frame element attachment device, the die bonding device, the wire bonding device and the moulding device.
9. A packaging system according to claim 7 or claim 8 in which the conveyor includes pockets for receiving the lead frame elements.
10. A packaging system further including means for separating the resin bodies from the conveyor and transporting them to further processing steps.
11. A lead frame element attachment device suitable for use in a system according to any of claims 7 to 10.
PCT/SG2003/000018 2003-01-28 2003-01-28 Packaging integrated circuits WO2004068562A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE10394171T DE10394171T5 (en) 2003-01-28 2003-01-28 Capping integrated circuits
AU2003214769A AU2003214769A1 (en) 2003-01-28 2003-01-28 Packaging integrated circuits
PCT/SG2003/000018 WO2004068562A1 (en) 2003-01-28 2003-01-28 Packaging integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/SG2003/000018 WO2004068562A1 (en) 2003-01-28 2003-01-28 Packaging integrated circuits

Publications (1)

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WO2004068562A1 true WO2004068562A1 (en) 2004-08-12

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PCT/SG2003/000018 WO2004068562A1 (en) 2003-01-28 2003-01-28 Packaging integrated circuits

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DE (1) DE10394171T5 (en)
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5549716A (en) * 1991-09-02 1996-08-27 Tdk Corporation Process for manufacturing integrated circuits using an automated multi-station apparatus including an adhesive dispenser and apparatus therefor
US20010013536A1 (en) * 1999-12-16 2001-08-16 Johann Breu Process system and process method for mounting leadframes

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5549716A (en) * 1991-09-02 1996-08-27 Tdk Corporation Process for manufacturing integrated circuits using an automated multi-station apparatus including an adhesive dispenser and apparatus therefor
US20010013536A1 (en) * 1999-12-16 2001-08-16 Johann Breu Process system and process method for mounting leadframes

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Publication number Publication date
DE10394171T5 (en) 2006-03-30
AU2003214769A1 (en) 2004-08-23

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