WO2002048861A3 - Method of initiating a digital component - Google Patents

Method of initiating a digital component Download PDF

Info

Publication number
WO2002048861A3
WO2002048861A3 PCT/GB2001/005568 GB0105568W WO0248861A3 WO 2002048861 A3 WO2002048861 A3 WO 2002048861A3 GB 0105568 W GB0105568 W GB 0105568W WO 0248861 A3 WO0248861 A3 WO 0248861A3
Authority
WO
WIPO (PCT)
Prior art keywords
digital component
initiating
memory device
synchronous memory
configuration
Prior art date
Application number
PCT/GB2001/005568
Other languages
French (fr)
Other versions
WO2002048861A2 (en
Inventor
Philip Eade
Original Assignee
Psion Digital Ltd
Philip Eade
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB0030520A external-priority patent/GB0030520D0/en
Application filed by Psion Digital Ltd, Philip Eade filed Critical Psion Digital Ltd
Publication of WO2002048861A2 publication Critical patent/WO2002048861A2/en
Publication of WO2002048861A3 publication Critical patent/WO2002048861A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/4401Bootstrapping
    • G06F9/4403Processor initialisation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Stored Programmes (AREA)
  • Emergency Protection Circuit Devices (AREA)

Abstract

A method of initiating a digital component comprises (i) powering up the digital component and a synchronous memory device attached to the digital component; and also (ii) preventing the digital component from reading an initial instruction set from the synchronous memory device until the configuration of the synchronous memory device matches, or is likely to match, the configuration of the digital component.
PCT/GB2001/005568 2000-12-14 2001-12-14 Method of initiating a digital component WO2002048861A2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
GB0030520.1 2000-12-14
GB0030520A GB0030520D0 (en) 2000-12-14 2000-12-14 Microprocessors,microcontrollers,system on chip (SoC) synchronous memory device boot,synchronous flash memory
GB0103408.1 2001-02-10
GB0103408A GB0103408D0 (en) 2000-12-14 2001-02-10 Method of initiating a digital component

Publications (2)

Publication Number Publication Date
WO2002048861A2 WO2002048861A2 (en) 2002-06-20
WO2002048861A3 true WO2002048861A3 (en) 2002-10-31

Family

ID=26245430

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB2001/005568 WO2002048861A2 (en) 2000-12-14 2001-12-14 Method of initiating a digital component

Country Status (2)

Country Link
GB (1) GB2372603A (en)
WO (1) WO2002048861A2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5410707A (en) * 1991-04-29 1995-04-25 Intel Corporation Bootstrap loading from external memory including disabling a reset from a keyboard controller while an operating system load signal is active
GB2304209A (en) * 1995-08-04 1997-03-12 Motorola Ltd Starting up a processor system
US6058474A (en) * 1997-01-24 2000-05-02 Texas Instruments Incorporated Method and apparatus for DMA boot loading a microprocessor without an internal ROM

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5386385A (en) * 1994-01-31 1995-01-31 Texas Instruments Inc. Method and apparatus for preventing invalid operating modes and an application to synchronous memory devices
US5566325A (en) * 1994-06-30 1996-10-15 Digital Equipment Corporation Method and apparatus for adaptive memory access
US6134638A (en) * 1997-08-13 2000-10-17 Compaq Computer Corporation Memory controller supporting DRAM circuits with different operating speeds

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5410707A (en) * 1991-04-29 1995-04-25 Intel Corporation Bootstrap loading from external memory including disabling a reset from a keyboard controller while an operating system load signal is active
GB2304209A (en) * 1995-08-04 1997-03-12 Motorola Ltd Starting up a processor system
US6058474A (en) * 1997-01-24 2000-05-02 Texas Instruments Incorporated Method and apparatus for DMA boot loading a microprocessor without an internal ROM

Also Published As

Publication number Publication date
WO2002048861A2 (en) 2002-06-20
GB0129970D0 (en) 2002-02-06
GB2372603A (en) 2002-08-28

Similar Documents

Publication Publication Date Title
AU2001226312A1 (en) Method and system for generating a set of search terms
WO2000064129A3 (en) Portable telephone set
LU91076I2 (en) Tulathromycin and its pharmaceutically acceptable salts (draxxin).
HK1050255A1 (en) Platform and method for remote attestation of a platform.
GB2370667B (en) Semiconductor memory device having altered clock frequency for address and/or command signals, and memory module and system having the same
AU2001274734A1 (en) Fin-stabilized guidable missile
AU2001227841A1 (en) A memory device search system and method
IL151293A0 (en) A method for fast wake-up of a flash memory system
AU2001263172A1 (en) The method of emulating different protocol of flash memory
AU2001286707A1 (en) Photoacid generators and photoresists comprising same
IS5471A (en) A method for producing derivatives of the taxoid class
AU4066300A (en) Electronic music and program storage, recognition, management and playback system
AU2001237993A1 (en) Clock generator circuitry
BR9706700B1 (en) combined electronic clock.
WO2002093330A3 (en) System and method for controlling access to personal information
WO2001016784A3 (en) Communication method and device
WO2004025706A3 (en) Automatic insertion of clocked elements into an electronic design to improve system performance
FR2788812B1 (en) PROPULSION DEVICE, PARTICULARLY FOR A ROCKET
KR20050042828A (en) Modem using capacitive insulating barrier insulating coupler and integrated circuit used in the modem
WO2002023790A3 (en) Methods and apparatuses for synchronizing data conversion of sonet framed data
DE19983695T1 (en) Circuit synthesis and verification taking into account the relative time behavior
WO2001075815A3 (en) Card terminal and method for operating a card terminal
EP1220462A4 (en) Correlator
WO2002048861A3 (en) Method of initiating a digital component
AU2001238706A1 (en) Photoacid generators and photoresists comprising same

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): JP US

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
AK Designated states

Kind code of ref document: A3

Designated state(s): JP US

AL Designated countries for regional patents

Kind code of ref document: A3

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR

121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP

DPE1 Request for preliminary examination filed after expiration of 19th month from priority date (pct application filed from 20040101)