WO1998020609A1

WO1998020609A1 - Low power wake-up system and method

Info

Publication number: WO1998020609A1
Application number: PCT/US1997/020259
Authority: WO
Inventors: Jacqueline Mullins
Original assignee: Advanced Micro Devices, Inc.
Priority date: 1996-11-04
Filing date: 1997-11-04
Publication date: 1998-05-14

Abstract

An apparatus and method for providing a low power, flexible, completely digital wake-up timer. The wake-up timer is connected to a resistor and a capacitor network, thereby creating a time constant. The timer is comprised of two Schmitt-like trigger inverters, a flip-flop, and a pad driver. A wake-up pin of an associated device, for example, the handset unit of a cordless telephone, is connected to the inverters. The result from the inverters passes to a flip-flop which provides a delay. The pad driver drives a wake-up signal at the wake-up pin. A counter is included in the device to create an interrupt signal at a specific time.

Description

LOW POWER WAKE-UP SYSTEM AND METHOD

Cross Reference This application claims the benefit of U.S. Provisional Application No.

60/009,444, filed Dec. 29, 1995.

Background of the Invention

The present invention relates to a low power wake-up timer circuit and, more particularly, to a low power circuit which wakes other circuits or devices from a steep or standby mode in response to particular events.

As integrated circuit design technology advances, more and more components are being grouped together on a single integrated circuit (chip). These chips are being designed for application in various electronic devices, such as, cordless telephones. There are important considerations in design of chips, including power consumption, circuitry layout, and design flexibility.

Power consumption is important in most electronic devices, but is especially important in battery-powered electronic devices. In order to reduce power consumption in these battery powered electronic devices, chips or circuits in these devices are often designed to maintain a low power standby mode when not in use.

As a result, substantial operating power may be conserved. However, it is often difficult to quickly bring the chips or circuits out of standby mode to a fully operational state in response to occurrence of certain events or conditions, such as interrupts or flags. To maintain quick operational responsiveness to those events or conditions, a wake-up timer may be employed to bring the chip or circuit from the low power standby mode to fully operational mode. Such a wake-up timer must remain active while the rest of the chip is in standby mode. Then, when the event or condition occurs, the wake-up timer must " wake," or bring out of standby mode, the chip or circuit. It is, therefore, often desirable that electronic devices be designed to operate in a standby mode with quick wake-up characteristics.

Circuitry layout becomes very important when a single chip has many different types of circuitry. For example, conventional wake-up timers include both a digital counter and an analog multivibrator. Because those wake-up timers have had both digital and analog aspects, they require both digital and analog circuitry and power supplies. In electronic design, digital and analog circuits are typically segregated into distinct regions of digital circuitry and analog circuitry, respectively. By such segregation, a digital power supply, which is generally noisy in comparison to analog power supplies, can provide power in the digital circuitry region, and an analog power supply can provide power in the analog circuitry region. It has therefore been a problem that the conventional wake-up timers require both analog and digital power supplies and circuitry in close proximity. As a result, these electronic device suffer from noise disadvantages, or otherwise require significant routing of circuitry between separate locations of the devices in order to avoid that close proximity. It would, therefore, be desirable to design a wake-up timer that avoids noise and like problems resulting from proximal relationships of digital and analog power supplies and related matters. Design flexibility has become increasingly important to allow a single electronic device support multiple configurations or upgrades. Circuit designs that are flexible can be used in a variety of applications and can possibly be optimized to meet different user requirements in each application. Because conventional wake-up timers employ analog multivibrators, the wake-up timer have been relatively slow to react. This is due to the use of operational amplifiers ("op amps") within the timers.

This results in limited flexibility of application for the wake-up timers. In particular, conventional wake-up timers in devices with external resister and capacitor ( -C) components may be useable only in devices having particular R-C components and configurations for which the timers are specifically designed. This is the case because op amps serving as level detectors in the timers require a relatively long period of time in order to settle. Quicker reaction times are desirable in many instances to enable use of specific timers with a wider range of R-C components. It would, therefore, be an improvement in the art to provide a wake-up timer with a quicker reaction time. The present invention addresses these design considerations and resolves many problems and disadvantages of the conventional practices. The invention is, thus, a significant improvement and advance in the art and technology. Summary of the Invention

The present invention, accordingly, provides a low power wake-up system and method that supports low power consumption, improved circuitry layout in separation of digital and analog circuits, and design flexibility due to high speed operation. One embodiment of the invention is a circuit for generating a wake-up signal. The circuit comprises an oscillating circuit including two Schmitt-like trigger inverters for generating an oscillating signal, counting means for counting a number of periods of the oscillating signal, and means for generating an interrupt after the number is counted.

In another aspect, the oscillating circuit further comprises an R-C component connected with the oscillating signal, a flip flop connected with said inverters, and a driver for driving the oscillating signal, connected to the flip flop.

Another embodiment of the invention is a method waking up a chip from standby mode. The method comprises the steps of generating an oscillating signal via two Schmitt-like trigger inverters, counting a number of oscillations of the oscillating signal, and generating an interrupt after the number is counted.

In another aspect, the method further comprises the steps of driving the oscillating signal with an R-C component, reading the oscillating signal via the two inverters, driving a flip flop with the two inverters, and outputting from the flip flop a second driver.

Yet another embodiment of the invention is a timer. The timer comprises a counter, an R-C component, and a multivibrator, the multivibrator comprising two inverters, one flip flop and one driver circuit. In another aspect, the multivibrator comprises only digital circuits.

Another embodiment of the invention is a multivibrator. The multivibrator comprises two inverters, one flip flop and one driver circuit.

In a further aspect, the multivibrator further comprises only digital circuits. In yet another aspect, the first inverter has a trip point of about 0.4V and the second inverter has a trip point of about 1.8V.

In even another aspect, the oscillating signal is a sawtooth signal. Brief Description of the Drawings

Fig. 1 is a simplified schematic diagram of a conventional wake-up timer including a conventional monostable multivibrator;

Fig. 2 is a block diagram of an embodiment of a wake-up timer according to the present invention;

Fig. 3 is a detailed schematic diagram of an embodiment of a monostable multivibrator according to the present invention, for example, such a multivibrator as may be found in the embodiment of the wake-up timer in Fig. 2; and Fig. 4 is a timing diagram of the embodiment of the monostable multivibrator of Fig . 3.

Description of the Preferred Embodiments

Generally, certain embodiments of the present invention provide an improved wake-up timer. Particularly, these embodiments include circuitry that lessens power consumption in comparison to that of a conventional wake-up timer comprising a multivibrator. Furthermore, the embodiments allow location of wake- up timer elements in proximity to digital circuits and power, without the problems previously encountered with such location. Moreover, the embodiments of the invention include a wake-up timer with level detectors that are quick to settle. Also, the embodiments are flexible in that they are designed for and have varied application.

Referring to Fig. 1, a simplified block schematic of a conventional monostable multivibrator (vibrator) 10 is shown. This conventional vibrator 10 is an analog device. The vibrator 10 includes, among other elements, an operational amplifier ("op amp") 12 and an AND gate 14. The vibrator 10 also includes a delay

18 and a transistor 11.

An external R-C component 16, including a resistor 16a and a capacitor 16b, is connected to an oscillating terminal of the op amp 12. The connecting circuitry serves as a wake-up signal 17. The resistor 16a is connected with a voltage (Vcc) and the capacitor 16b is tied to ground. The resistor 16a is shown as a 100 k ohm pull-up resistor and the capacitor 16b is shown as a 1 nF capacitor, although other similar configurations and different RC values are also conventional. Connected to another terminal 13 of the op amp 12 is a reference voltage (VREF). The output 15 of the op amp 12 serves as one input to the AND gate 14. The other input to the AND gate 14 is an output 9 of the delay 18, which is simply a delayed version of the output 15. A signal 19 is the feedback output of the AND gate 14. The feedback signal

19 connects with the gate of an n-channel transistor 11. The drain of the transistor 11 is connected to the oscillating terminal of the op amp 12 through the wake-up signal 17, thereby providing a feedback loop for the op amp 12.

In operation, the op amp 12 receives and compares the reference voltage VREF and the wake-up signal 17. When the wake-up signal 17 is at a higher voltage than the reference voltage VREF, the output 15 of the op amp 12 goes towards Vcc, or "high". After a period of time determined by the delay 18, the output 9 also goes high. In response, the feedback output 19 from the AND gate 14 also goes high. The feedback output 19 then causes the n-channel transistor 11 turns "on", or begins to conduct, thereby pulling the wake-up signal 17 towards ground, or

"low". Once the wake-up signal 17 drops below the reference voltage VREF, the feedback output 19 goes low, and the transistor 11 turns "off, or stops conducting. At this point, the R-C component 16 begins to pull the wake-up signal 17 high, thereby repeating the process. This conventional analog vibrator 10 is often used in a conventional wake-up timer circuit, which is used in many different power-saving circuit applications. The vibrator 10 itself, however, consumes significant power that, if conserved, would be beneficial. Also, the vibrator 10 can present other problems when employed in conventional wake-up timers, such as location of digital and analog circuitry and limited flexibility in application with varied R-C components, as discussed above.

The present invention overcomes these problems and others.

Referring now to Fig. 2, an embodiment of a wake-up timer 20 of the present invention is illustrated. The wake-up timer 20 generally includes a threshold detector block 22, a counter 24, and an AND gate 26, all of which are digital components. The wake-up timer 20 also includes an external R-C component 27, comprised of a resistor 27a and a capacitor 27b, similar to the conventional R-C component 16 of Fig. 1. The counter 24 and AND gate 26 may be any of various conventional or ^"hereafter developed circuits or devices that may serve to accomplish the functions of counting and ANDing, respectively. Likewise, the R-C component 27 may be any resistor and capacitor arrangements and values, or any other circuits, devices, or combinations that function to provide a time constant. The voltage Vcc is applied to the resistor 27a, and the capacitor 27b is tied to ground.

The block 22 has several interfaces, including a WAKEUP signal 25 connecting the block 22 with the R-C component 27; an input WEN signal 5 from a source (not shown) external to the timer 20, the signal 5 being input to the block 22 and the AND gate 26; and a WAKEOUT signal 21 input to the block 22, and connecting with the output of the AND gate 26. The output of the AND gate 26 is commonly connected to the WAKEOUT signal 21 and a clock input for the counter 24. The counter 24 provides a WAKEINT signal 7 which passes externally from the timer 20 for use by external circuitry (not shown).

The WEN signal 5 is an enable signal to enable/disable the wake-up timer 20. The output WAKEDRV signal 6 and the WEN signal 5 are each employed to clock the counter 24 and drive the WAKEOUT signal 21 input to the counter 24. The counter 24 serves to count oscillations of the signal, for example, to 8191. After reaching a desired count, the counter 24 then asserts the WAKEINT signal 7.

Referring now to Fig. 3, a more detailed illustration of an embodiment of the threshold detector block 22 is shown. In the embodiment, the block 22 includes first and second Schmitt-like trigger inverters 28 and 30, respectively. Each Schmitt-like trigger inverter 28, 30 is a solid state element that produces an inverted output when the input exceeds a specified turn-on level, and whose output continues until the input falls below a specified turn-off level. In addition to the Schmitt-like trigger inverters 28, 30, the block 22 may include, for example, a flip-flop 32 and a pad driver 34. It is of note that, although certain components of the block 22, the flip- flop 32, and the pad driver 34 may be analog in nature, the components are not combined in circuits that require any separate, analog power supply. Instead, all of the components and circuits of the block 22 are operated digitally in nature and the block 22 utilizes only a single, digital power supply.

The Schmitt-like trigger inverters 28, 30 each have a common input of a WAKELN signal 35. The WAKELN signal 35 is connected to the WAKEUP signal 25 through a resistor 37. The Schmitt-like trigger inverter 28 may have a turn-on level of a lower voltage in relation to Schmitt-like trigger inverter 30, and the Schmitt-like trigger inverter 30 may have a turnoff level of a higher voltage. By employing the dual Schmitt-like trigger inverters 28, 30 having these characteristics, voltage level detection capability of the block 22 can be very fast and sufficiently accurate. Such characteristics and capability provide flexibility of application in that they allow for choice among R-C component 27 variations, such as variously sized resistors 27a and capacitors 27b (FIG. 2).

In operation, the WEN signal 5, when active, enables the wake-tip timer 20. For the remainder of the discussion, the WEN signal 5 will remain active. The

WAKEUP signal 25 may be provided, for example, at a pin of an external circuit (not shown). The WAKEUP signal 25 may serve to transition such external circuit between modes, for example, from standby mode to fully operational mode.

The Schmitt-like trigger inverters 28, 30 may be employed to detect the voltage level of the pin of the external circuit via the WAKEUP signal 25. In such employment, one of the inverters 28, 30, for example, inverter 28, operates to detect a "low" voltage WAKEUP signal 25 and the other of the inverters 30, 28, for example, inverter 30, detects a "high" voltage WAKEUP signal 25. When the "low" voltage WAKEUP signal 25 is detected, the logic of the wake-up timer 20 stops driving the WAKEUP signal 25 and an external R-C component 27 may build up a charge.

The outputs 28a, 30a from the Schmitt-like trigger inverters 28, 30 are each input to respective AND gates 28b, 30b. The WEN signal 25 is also input to the AND gates 28b, 30b. When the WEN signal 5 is active, the outputs 28a, 30a of the Schmitt-like trigger inverters 28, 30 drive the flip-flop 32. The flip-flop 32 serves as a delay for a predetermined period of time. Because the delay may be for a short period of time, application of the timer 20 can be widely varied over a broad range of time constant values of the R-C component 27. The flip-flop 32 then drives the output WAKEDRV signal 6. The output WAKEDRV signal 6 drives the input WAKEOUT signal 21, as discussed earlier with regards to Fig. 2. The input

WAKEOUT signal 21 drives the pad driver 34, and the pad driver 34 drives the oscillating WAKEUP signal 25. The pad driver 34 turns on the n-channel transistor 36b that is configured to pull the oscillating WAKEUP signal 25 low whenever the input WAKEOUT signal 25 is "on".

Referring to Figs. 3 and 4, the threshold detector block 22, in combination with the R-C component 27, produces a sawtooth waveform 40. For convenience, the wave form 40 will be described with reference to "high" and "low" voltage levels of 1.9V and OV, respectively, and the range therebetween. It is to be understood, however, that other levels and another range between levels are possible, the specific levels and range stated herein being given only as an example. Each period of the sawtooth waveform 40 has a first wave portion 42r that rises slowly from OV to 1.9V, and a second wave portion 42f that falls quickly from 1.9V to OV. The first wave portion 42r is created by the R-C component 27. The slope of the wave portion 42r is determined by the values of the resistor 27a and the capacitor 27b (shown in Fig. 2), as in the conventional multivibrator 10 of Fig. 1. The second wave portion 42f is created by the block 22. During the time of the first wave portion 42r, the WAKELN signal 35 follows the waveform, rising towards 1.9V. When the voltage level of the WAKELN signal 35 exceeds 1.8V, the output 30a of the Schmitt-like trigger inverter 30 goes "low", thereby flipping the flip-flop 32 and inverting the output WAKEDRV signal 6. As a result, the input WAKEOUT signal 6 is also turned "on," and the pad driver 34 pulls the oscillating WAKEUP signal 25 low. This occurs at approximately the time that the WAKEUP signal 25 has reached the 1.9V level.

When the pad driver 34 begins to pull the WAKEUP signal 25 low, the second wave portion 42f begins. As the WAKEUP signal 25 is being pulled low, the WAKELN signal 35 is also being pulled low. When the voltage level of the WAKELN signal 35 falls below 0.4V, the inverter 28 activates, thereby flipping the flip-flop 32 again and turning "off the output WAKEDRV signal 6. As a result, the input WAKEOUT signal 6 is also turned "off," and the pad driver 34 stops pulling the WAKEUP signal 25 low. When this occurs, the second wave portion 42f ends, and a new period of the waveform 40 begins. In this manner, oscillation is achieved in the wake-up timer 2.

One particularly desirable application for the embodiments of the wake-up timer 20 of the present invention is a cordless telephone. Cordless telephone units, such as a telephone handset unit, are often powered by a battery when removed from the cradles of the associated base set units. It is, therefore, important in such instances to minimize power consumption in order to preserve battery power. The wake-up timer 20, when incorporated in a cordless telephone unit, allows the unit to maintain a standby mode when not in use and yet to easily "wake up" when necessary, for example, in response to incoming signals.

The wake-up timer 20 may be implemented, for example, through conventional complimentary metal oxide semiconductor (CMOS) technology. It should be understood, however, that the present invention is not limited to that implementation, and may be otherwise implemented.

Although an illustrative embodiment of the invention has been shown and described, a wide range of modification, change, and substitution is contemplated iA the foregoing disclosure and, in some instances, some features of the present invention may be employed without a corresponding use of the other features. For example, the wake-up timer 20 is illustrated using a single voltage Vcc, although different voltages can be used for different circuits. Accordingly, it is appropriate that the appended claims be construed broadly and in a manner consistent with the scope of the invention.

Claims

Claims What is claimed is:

1. A circuit for creating a wake-up signal, comprising: an oscillating circuit including two Schmitt-like trigger inverters for generating an oscillating signal; and counting means for counting a number of periods of the oscillating signal; and means for generating an interrupt after the number is counted.

2. The oscillating circuit of claim 1, further comprising: an R-C component connected with the oscillating signal; a flip flop connected with said inverters; and a driver for driving the oscillating signal, connected to the flip flop.

3. A method waking up a chip from standby mode, comprising the steps of: generating an oscillating signal via two Schmitt-like trigger inverters; counting a number of oscillations of the oscillating signal; and generating an interrupt after the number is counted.

4. The method of claim 3, further comprising the steps of: driving the oscillating signal with an R-C component; reading the oscillating signal via the two inverters; driving a flip flop with the two inverters; and outputting from the flip flop a second driver.

5. A timer, comprising: a counter; an R-C component; and a multivibrator, the multivibrator comprising two inverters, one flip flop and one driver circuit.

6. The multivibrator of claim 5, further comprising only digital circuits.

7. A multivibrator, comprising two inverters, one flip flop and one driver circuit.

8. The multivibrator of claim 7 further comprising only digital circuits.

9. The multivibrator of claim 7, wherein the first inverter has a trip point of about 0.4V and the second inverter has a trip point of about 1.8V.

10. The oscillating circuit of claim 2, wherein the oscillating signal is a sawtooth signal.