WO1996041249A3 - Intelligent disk-cache memory - Google Patents

Intelligent disk-cache memory Download PDF

Info

Publication number
WO1996041249A3
WO1996041249A3 PCT/US1996/006520 US9606520W WO9641249A3 WO 1996041249 A3 WO1996041249 A3 WO 1996041249A3 US 9606520 W US9606520 W US 9606520W WO 9641249 A3 WO9641249 A3 WO 9641249A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory
data
cache memory
disk
copy
Prior art date
Application number
PCT/US1996/006520
Other languages
French (fr)
Other versions
WO1996041249A2 (en
Inventor
Lawrence E Aszmann
John P Guider
Original Assignee
Tricord Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tricord Systems Inc filed Critical Tricord Systems Inc
Priority to AU57905/96A priority Critical patent/AU5790596A/en
Publication of WO1996041249A2 publication Critical patent/WO1996041249A2/en
Publication of WO1996041249A3 publication Critical patent/WO1996041249A3/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/74—Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2015—Redundant power supplies
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2211/00—Indexing scheme relating to details of data-processing equipment not covered by groups G06F3/00 - G06F13/00
    • G06F2211/10—Indexing scheme relating to G06F11/10
    • G06F2211/1002—Indexing scheme relating to G06F11/1076
    • G06F2211/1009—Cache, i.e. caches used in RAID system with parity
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2211/00—Indexing scheme relating to details of data-processing equipment not covered by groups G06F3/00 - G06F13/00
    • G06F2211/10—Indexing scheme relating to G06F11/10
    • G06F2211/1002—Indexing scheme relating to G06F11/1076
    • G06F2211/109—Sector level checksum or ECC, i.e. sector or stripe level checksum or ECC in addition to the RAID parity calculation

Abstract

Method and apparatus for intelligently caching data in an intelligent disk subsystem connected to a main computer having a main memory. The disk subsystem includes a disk-cache memory having a first and a second memory bank. A first copy and a second copy of data are held in the first and second memory banks, respectively, wherein the first memory bank is coupled to a first battery and the second memory bank is coupled to a second battery. A detected failure occurring in either memory bank or either battery causes either the first copy or the second copy of data to be read, based on where a detected failure occurred. In one embodiment, successive read operations are routed to alternating memory banks. In one embodiment, read operations going to disk devices and returning data to the disk-cache memory are given a higher priority than write operations. In one embodiment, only write operation data are cached in the cache memory, but either read or write operations are completed using the data held in the cache memory.
PCT/US1996/006520 1995-06-07 1996-05-20 Intelligent disk-cache memory WO1996041249A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU57905/96A AU5790596A (en) 1995-06-07 1996-05-20 Intelligent disk-cache memory

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US47953495A 1995-06-07 1995-06-07
US08/479,534 1995-06-07

Publications (2)

Publication Number Publication Date
WO1996041249A2 WO1996041249A2 (en) 1996-12-19
WO1996041249A3 true WO1996041249A3 (en) 1997-08-21

Family

ID=23904417

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1996/006520 WO1996041249A2 (en) 1995-06-07 1996-05-20 Intelligent disk-cache memory

Country Status (2)

Country Link
AU (1) AU5790596A (en)
WO (1) WO1996041249A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115114200B (en) * 2022-06-29 2023-11-17 海光信息技术股份有限公司 Multi-chip system and starting method based on same

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2220091A (en) * 1988-06-27 1989-12-28 Applic Specific Computers Limi A memory error protection system
EP0353435A2 (en) * 1988-06-17 1990-02-07 Modular Computer Systems Inc. Error correction device for parity protected memory systems
EP0543582A1 (en) * 1991-11-20 1993-05-26 International Business Machines Corporation Data processing system including a memory system
WO1993018461A1 (en) * 1992-03-09 1993-09-16 Auspex Systems, Inc. High-performance non-volatile ram protected write cache accelerator system
EP0573307A2 (en) * 1992-06-05 1993-12-08 Compaq Computer Corporation Method and apparatus for maintaining and retrieving live data in a posted write cache in case of power failure
EP0573308A2 (en) * 1992-06-05 1993-12-08 Compaq Computer Corporation Posted write disk array system
JPH06222988A (en) * 1992-12-17 1994-08-12 Internatl Business Mach Corp <Ibm> Storage-device controller and data preservation method

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0353435A2 (en) * 1988-06-17 1990-02-07 Modular Computer Systems Inc. Error correction device for parity protected memory systems
GB2220091A (en) * 1988-06-27 1989-12-28 Applic Specific Computers Limi A memory error protection system
EP0543582A1 (en) * 1991-11-20 1993-05-26 International Business Machines Corporation Data processing system including a memory system
WO1993018461A1 (en) * 1992-03-09 1993-09-16 Auspex Systems, Inc. High-performance non-volatile ram protected write cache accelerator system
EP0573307A2 (en) * 1992-06-05 1993-12-08 Compaq Computer Corporation Method and apparatus for maintaining and retrieving live data in a posted write cache in case of power failure
EP0573308A2 (en) * 1992-06-05 1993-12-08 Compaq Computer Corporation Posted write disk array system
JPH06222988A (en) * 1992-12-17 1994-08-12 Internatl Business Mach Corp <Ibm> Storage-device controller and data preservation method
US5437022A (en) * 1992-12-17 1995-07-25 International Business Machines Corporation Storage controller having additional cache memory and a means for recovering from failure and reconfiguring a control unit thereof in response thereto

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
P.R. TURGEON ET AL.: "Two approaches to fault tolerance in the IBM Enterprise System/9000 Type 9121 processor", IBM JOURNAL OR RESEARCH AND DEVELOPMENT, vol. 35, no. 3, May 1991 (1991-05-01), ARMONK, NY, USA, pages 382 - 388, XP002017227 *

Also Published As

Publication number Publication date
WO1996041249A2 (en) 1996-12-19
AU5790596A (en) 1996-12-30

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