WO1996039715A1 - Integrated circuit package leadframe - Google Patents
Integrated circuit package leadframeInfo
- Publication number
- WO1996039715A1 WO1996039715A1 PCT/US1996/007227 US9607227W WO9639715A1 WO 1996039715 A1 WO1996039715 A1 WO 1996039715A1 US 9607227 W US9607227 W US 9607227W WO 9639715 A1 WO9639715 A1 WO 9639715A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- leadframe
- integrated circuit
- circuit package
- electrical components
- crystal resonator
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49596—Oscillators in combination with lead-frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Definitions
- the present invention is directed to a leadframe that automatically aligns and supports an oblong component, such as a cylindrical crystal resonator, in a plastic package that meets the dimensional standards of traditional integrate circuit packages, reducing the number of components and less reliable connections associated with printed circuit board assembly.
- the invention also reduces the manufacturing costs of encapsulation by allowing preexisting standard package dimension tooling to be used for assembly and test.
- a cylindrical crystal resonator is combined with one or more PLL circuits in a standard package with multiple input and output pins, which gives the user simultaneous access to a plurality of output clock signals a frequencies that are non-integer fractions and multiples of the base crystal resonator frequency.
- Fig. 2B is a cross-sectional view of the leadframe of Fig. 2A.
- Fig. 4A is a top view of an integrated circuit package containing the leadframe of the present invention securely accommodating an oblong component.
- Figs. 3A through 3D show cross-sectional views of alternate embodiments of the present invention.
- the bends 208 need not necessarily be formed in a downward angle. The key requirement is that a gap of sufficient size must be created to house resonator 202 and that the leadframe structure be in contact with resonator 202 to provide sufficient lateral support to hold it securely in place. Accordingly, the structure of leadframe 200 may include bends 208 that point upward, as shown in Fig. 3A, which create a gap 210 for and provide sufficient lateral support to resonator 202. Also, as shown in Figs.
- Fig. 4B shows a cross-sectional view of IC package
Abstract
The present invention is directed to an integrated circuit package leadframe (200) that automatically aligns and supports an oblong component (202), such as a cylindrical crystal resonator, in a plastic package that meets the dimensional standards of traditional integrated circuit packages, reducing the number of components and less reliable connections associated with printed circuit board assembly. The invention also reduces the manufacturing costs of encapsulation by allowing preexisting standard package dimension tooling to be used for assembly and test. In a preferred embodiment, a crystal oscillator chip includes a cylindrical crystal resonator combined with an oscillator and a phase-locked loop circuit (204), providing access to a plurality of clock signals at frequencies that are non-integer fractions and multiples of the base crystal resonator frequency.
Description
INTEGRATED CIRCUIT PACKAGE LEADFRAME
BACKGROUND OF THE INVENTION The present invention relates generally to the packaging of integrated circuits. More particularly, the invention is directed to a leadframe that can accommodate a oblong component, such as a resonator, in a standard integrated circuit package footprint.
The size of products containing electrical components continues to shrink. For example, the computer industry has seen a progression of personal computers from desktop to laptop. Thus, as space for the components is at more of a premium than ever before, it is desirable to minimize the number of electrical components on a printed circuit board in order to reduce product size, but without sacrificing product functionality and reliability. Minimizi the number of components reduces production costs associated with inventory and assembly, while at the same time increasi reliability by reducing the number of connections to be soldered on the printed circuit board. One technique is to assemble as many components as possible into one integrated circuit package that will be soldered onto a printed circuit board. A common IC package used in the electronics industry is the plastic package. The plastic package begins with the leadframe, which is the base to which components are attache The leadframe and attached components are then encapsulated a protective coating, which is, of course, plastic, in the case of plastic packaging.
Package leadframes are manufactured in standard configurations to simplify the manufacturing process. These leadframes typically include multiple elevations to accommodate different sizes of components. By placing talle components on lower elevations and shorter components on higher elevations of the leadframe, the components will not extend beyond the upper and lower package encapsulation
limits. These different elevations are created during a process step called a "down-set." It is preferred to minimi down-sets and the number of levels on a leadframe to simplif manufacturing and thereby reduce costs. Packaging oblong components in a standard IC packa presents special problems because they may have a length greater than the height of the package, often requiring the component to be placed on its side. If the component is cylindrical, it is difficult to place it on its side on the leadframe because of its rounded surface, which makes the component prone to shifting before and during encapsulation. A very commonly-used cylindrical component is the crystal resonator, which is used to generate a clock signal for operation of an associated electric circuit. Cylindrical crystals may be packaged with a phase-locked loop (PLL) circuit and a crystal oscillator to generate frequencies othe than those achievable with a crystal and an oscillator alone. As is well-known in the art, a PLL circuit combined with a crystal resonator can generate a plurality of clock signals a frequencies that may be non-integer fractions and multiples o the resonator's base frequency. Thus, one resonator with a PLL can support an electric circuit with different clock signal requirements.
One possibility of packaging an oblong component is to place it in a non-standard plastic package. This approach allows placement of a crystal resonator on the leadframe, but increases the cost and complexity of the manufacturing process. The use of a non-standard package makes printed circuit board manufacture more costly, since standard tooling already in place cannot be used to place the oscillator chip on the board. Existing crystal oscillator chips that use a non-standard package also suffer the drawback of not securing the resonator on the leadframe by any support structure, making the component susceptible to moving or shifting during encapsulation, which can have a highly unfavorable impact on reliability. For example, encapsulation thickness limits may be violated, which leads to cracking of the leadframe or an ineffective moisture barrier. Shorting between electrical
nodes may occur, and the electrical connections could be stressed resulting in open circuits. Furthermore, existing oscillator chips that include a PLL circuit in the non-standard package only provide one output pin, which does not permit the user to take advantage of the full capability of a phase-locked loop circuit, since the user has access to only one output signal frequency.
It is possible for an oscillator chip to be housed in a standard plastic package. However, existing oscillator chips in standard packages, such as the Epson SPG-86 series parts, do not include a PLL circuit in combination with the resonator, making it impossible to generate clock signals at frequencies that are non-integer fractions of the base frequency of the resonator. Also, since existing chips only include divider circuits, it is not at all possible to generate an output frequency that is higher than the oscillator base frequency, which can be done with a PLL circuit.
Accordingly, it would be desirable to place in a standard IC package an oblong component that is automatically aligned and supported during encapsulation. In the case wher the oblong component is a cylindrical crystal resonator, it would be desirable to include a PLL circuit in the oscillator chip that gives a user access to a plurality of output clock signals at frequencies that are non-integer fractions and multiples of the base resonator frequency.
SUMMARY OF THE INVENTION The present invention is directed to a leadframe that automatically aligns and supports an oblong component, such as a cylindrical crystal resonator, in a plastic package that meets the dimensional standards of traditional integrate circuit packages, reducing the number of components and less reliable connections associated with printed circuit board assembly. The invention also reduces the manufacturing costs of encapsulation by allowing preexisting standard package dimension tooling to be used for assembly and test. In a preferred embodiment, a cylindrical crystal resonator is
combined with one or more PLL circuits in a standard package with multiple input and output pins, which gives the user simultaneous access to a plurality of output clock signals a frequencies that are non-integer fractions and multiples of the base crystal resonator frequency.
BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1A is a top view of a known oscillator chip in a non-standard package including a cylindrical resonator and PLL circuit.
Fig. IB is a cross-sectional view of the known oscillator chip of Fig. 1A.
Fig. 2A is a top view of a preferred embodiment of the leadframe of the present invention securely accommodating an oblong component.
Fig. 2B is a cross-sectional view of the leadframe of Fig. 2A.
Figs. 3A-3D are cross-sectional views of alternate embodiments of the leadframe of the present invention securel accommodating an oblong component.
Fig. 4A is a top view of an integrated circuit package containing the leadframe of the present invention securely accommodating an oblong component.
Fig. 4B is a cross-sectional view of the integrated circuit package of Fig. 4A.
DESCRIPTION OF THE PREFERRED EMBODIMENT Fig. 1A shows a known crystal oscillator 100 comprised of a plastic package 101 encasing leadframe 102. The package is a four-pin dual in-line package (DIP) , not a standard 14 or 16-pin DIP more commonly used in integrated circuit packaging. The use of a non-standard package makes printed circuit board manufacture more costly and complex, since more board area than is used than is truly necessary because the available space between package pins is not used for other pins. Also, standard manufacturing tooling already in place could not be used to place the oscillator chip on th circuit board, and non-standard custom tooling had to be
developed for board manufacture. The chip includes a crystal resonator 104 and a PLL circuit 106, coupled to the leadframe by bonding wires 107, to generate one output clock at the output pin 108. The output is enabled by applying a signal t output enable pin 110. However, the resonator 104 is not secured on the leadframe by any support structure. Instead, as shown in the cross-sectional view of Fig. IB, an open spac 112 is created in leadframe 102 in which resonator 104 is placed prior to encapsulation. Although this allows the cylindrical component to fall within the upper encapsulation limit of the package 101, there is no automatic alignment and support for the component 104 by the leadframe 102. Consequently the component is susceptible to moving or shifting during encapsulation, which can have a highly unfavorable impact on reliability, as discussed above.
Furthermore, although PLL circuit 106 is housed in the chip, the use of a non-standard four-pin package having only one output does not permit the user to take advantage of the full capability of a phase-locked loop circuit, since the user has access to only one output signal frequency. Also, since there are no input control pins other than the output enable pin 110, controlling the PLL to change the output frequency is not an option, and the user is stuck with the output frequency specified by the chip manufacturer. Fig. 2A shows a top view of package leadframe 200 o the present invention for use in a crystal oscillator chip. The leadframe accommodates secure placement of an oblong component 202 whose length is greater than the height of a package that will encapsulate the leadframe. These dimension require the oblong component 202 to be placed on its side on the leadframe so that it may fit in a plastic package. In a preferred embodiment, oblong component 202 is a cylindrical crystal resonator that generates a stable frequency reference when excited by an associated electrical circuit. Also included on leadframe 200 is integrated circuit die 204 that contains a PLL circuit for use in conjunction with the crysta resonator 202. Electrical connections between PLL circuit 20 and leadframe pins are made by wires 206.
Fig. 2B is a cross-sectional view of leadframe 200 showing in detail how the leadframe of the present invention automatically aligns and supports cylindrical resonator 202. The leadframe structure includes "bends" or supports 208 tha are angled downward, creating a gap 210 in which resonator 20 can be placed securely on the leadframe 200. Bends 208 provide sufficient lateral support to keep resonator 202 steady and in place, both before and during the encapsulation process. The leadframe structure of the present invention ensures that a cylindrical component 202 is automatically aligned and supported by bends 208 when it is placed on leadframe 200. By contrast, the known oscillator chip 100 shown in Fig. 1 provides a gap for a resonator to be placed o the leadframe, but no lateral support to secure the resonator, making the component prone to shifting before and during encapsulation. Chip and circuit reliability are improved by ensuring that cylindrical component 202 remains stationary during encapsulation. By securing resonator 202 with bends 208, the component is no longer susceptible to moving or shifting during encapsulation, which greatly improves chip reliability. Encapsulation thickness limits will not be violated, which avoids cracking of the leadframe or an ineffective moisture barrier. Shorting between electrical nodes is also avoided, and the electrical connections are not stressed, eliminating the possibility of open circuits.
Figs. 3A through 3D show cross-sectional views of alternate embodiments of the present invention. The bends 208 need not necessarily be formed in a downward angle. The key requirement is that a gap of sufficient size must be created to house resonator 202 and that the leadframe structure be in contact with resonator 202 to provide sufficient lateral support to hold it securely in place. Accordingly, the structure of leadframe 200 may include bends 208 that point upward, as shown in Fig. 3A, which create a gap 210 for and provide sufficient lateral support to resonator 202. Also, as shown in Figs. 3B and 3C, the structure of leadframe 200 may include only one bend 208 that creates a gap 210 for holding resonator 202 and, combined with the portion of the leadframe
structure on the opposite side of the gap 210, provides sufficient lateral support to secure the component. In another embodiment shown in Fig. 3D, leadframe 200 may be formed without any bends, but the structure includes a gap 2 that will hold resonator 202 and will also remain in contact with the sides of the resonator to provide enough lateral support to secure resonator 202 in place. In all cases, chip and circuit reliability are improved by holding resonator 202 securely in place during encapsulation, as described above. Fig. 4 shows a top view of an integrated circuit package 400 that can securely house an oblong component. As explained above, the leadframe 200 undergoes an encapsulation process in a plastic package that is eventually placed on a printed circuit board. Placed on leadframe 200 are crystal resonator 202 and PLL circuit 204, bonded to the leadframe by wires 206, similar to the configuration shown in Fig. 2A. Package 400 is a standard 16-pin DIP commonly used in integrated circuit packaging. The use of a standard IC package makes it more straightforward to place the chip on a printed circuit board, compared with the oscillator chip show in Fig. 1A, since standard board manufacturing tooling can be used. The ability to use existing tooling to encapsulate the leadframe of the present invention reduces manufacturing cost associated with using a non-standard package. The use of a standard package makes available additional output pins, compared to the prior art oscillator chip in Fig. 1A, allowing the user to take advantage of the full capability of PLL circuit 204. Crystal oscillator circuit chip 400 can generate a plurality of output clock signals at frequencies that may be non-integer fractions and multiples of the resonator's base frequency. Thus, only one resonator with a PLL may be needed to support an electric circuit with different clock signal requirements, instead of multiple oscillator chips. Also, since there are additional input control pins in the standard package 400, the user has the option of controlling the PLL 204 to vary the output frequencies, and the user is not stuck with the output frequency specified by the chip manufacturer. By providing
the appropriate signals to the input control pins of package 400, the user can take advantage of PLL circuit 204 by havin simultaneous access to different output frequencies derived from the oscillator circuit on oscillator chip 400. Fig. 4B shows a cross-sectional view of IC package
400. In the embodiment shown, leadframe 200 holds resonator 202 and PLL circuit 204 and is formed with bends 208 at a downward angle that creates a gap 210 to receive resonator 202, similar to the embodiment shown in Fig. 2A. Clearly, an of the embodiments of leadframe 200 shown in Figs. 3A-3D may also be encapsulated in plastic package 400.
The invention has now been explained with reference to specific embodiments. Other embodiments will be apparent to those of ordinary skill in the art upon reference to the present description. It is therefore not intended that this invention be limited, except as indicated by the appended claims.
Claims
WHAT IS CLAIMED IS: 1. An integrated circuit package leadframe supporting a plurality of electrical components suitable for encapsulation in a protective compound comprising: a body comprising a plurality of conductive pin elements adapted for electrical connection to the plurality o electrical components; and a gap means for automatically aligning at least one of the plurality of electrical components in a stable positio relative to the body.
2. The leadframe assembly of claim 1 wherein the gap means further comprises at least one support in the body positioned at a non-orthogonal angle relative to the body.
3. An integrated circuit package leadframe assembly comprising: a plurality of electrical components; a body comprising a plurality of conductive pin elements adapted for electrical connection to the plurality o electrical components; a gap means for automatically aligning at least one of the plurality of electrical components in a stable positio relative to the body.
4. The leadframe assembly of claim 3 wherein the gap means further comprises at least one support in the body positioned at a non-orthogonal angle relative to the body.
5. The leadframe of claim 3 wherein said at least one of the plurality of electrical components further comprises an oblong component.
6. The leadframe assembly of claim 5 wherein the oblong component comprises a cylindrical crystal resonator.
7. The leadframe of claim 3 wherein the plurality of electrical components includes a phase-locked loop circuit.
8. The leadframe of claim 3 wherein the plurality of conductive pin elements comprises at least eight pins.
9. An integrated circuit package adapted for installation on a printed circuit board by standard manufacturing tooling comprising: a plurality of electrical components; a plurality of conductive pin elements adapted for electrical connection to the electrical components; a leadframe body including a gap means for automatically aligning at least one of the plurality of electrical components in a stable position relative to the leadframe body.
10. The integrated circuit package of claim 9 wherein the gap means further comprises at least one support in the leadframe body positioned at a non-orthogonal angle relative to the leadframe body.
11. The integrated circuit package of claim 9 wherein said at least one of the electrical components furthe comprises an oblong component having a longest dimension greater than a shortest dimension of the integrated circuit package.
12. The integrated circuit package of claim 11 wherein the oblong component comprises a cylindrical crystal resonator.
13. The integrated circuit package of claim 12 wherein the plurality of electrical components includes a phase-locked loop circuit.
14. The integrated circuit package of claim 10 wherein the plurality of conductive pin elements comprises at least eight pins.
15. An oscillator chip comprising: an integrated circuit package adapted for installation on a printed circuit board by standard manufacturing tooling; a plurality of electrical components including: a cylindrical crystal resonator for providing a reference clock signal at a base frequency; a crystal oscillator circuit for exciting the cylindrical crystal resonator; and a phase-locked loop circuit coupled to the cylindrical crystal resonator for providing a plurality of clock signals at frequencies derived from the reference clock signal at the base frequency; a plurality of conductive pin elements adapted for electrical connection to the electrical components; and a leadframe body including a gap means for automatically aligning the cylindrical crystal resonator in a stable position relative to the leadframe body.
16. The integrated circuit package of claim 15 wherein the gap means further comprises at least one support in the leadframe body positioned at a non-orthogonal angle relative to the leadframe body.
17. The integrated circuit package of claim 15 wherein the plurality of conductive pin elements comprises at least eight pins.
18. The integrated circuit package of claim 15 wherein the plurality of clock signals at frequencies derived from the reference clock signal at the base frequency further comprise clock signals at frequencies that are non-integer fractions and multiples of the reference clock signal at the base frequency.
19. An integrated circuit package adapted for installation on a printed circuit board by standard manufacturing tooling comprising: a crystal resonator for providing a reference cloc signal at a base frequency; a crystal oscillator circuit for exciting the crystal resonator; and a plurality of phase-locked loop circuits coupled t the crystal resonator for providing a plurality of output clock signals at frequencies derived from the reference clock signal at the base frequency.
20. The integrated circuit package of claim 19 wherein the plurality of output clock signals at frequencies derived from the reference clock signal at the base frequency further comprise clock signals at frequencies that are non-integer fractions and multiples of the reference clock signal at the base frequency.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US46655595A | 1995-06-06 | 1995-06-06 | |
US08/466,555 | 1995-06-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1996039715A1 true WO1996039715A1 (en) | 1996-12-12 |
Family
ID=23852211
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1996/007227 WO1996039715A1 (en) | 1995-06-06 | 1996-05-17 | Integrated circuit package leadframe |
Country Status (2)
Country | Link |
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TW (1) | TW345731B (en) |
WO (1) | WO1996039715A1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016187059A (en) * | 2016-08-03 | 2016-10-27 | ラピスセミコンダクタ株式会社 | Semiconductor device and measurement instrument |
JP2018129553A (en) * | 2018-05-23 | 2018-08-16 | ラピスセミコンダクタ株式会社 | Semiconductor device |
US10243515B2 (en) | 2012-04-27 | 2019-03-26 | Lapis Semiconductor Co., Ltd. | Semiconductor device and measurement device |
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US4916413A (en) * | 1987-11-20 | 1990-04-10 | Matsushima Kogyo Kabushiki Kaisha | Package for piezo-oscillator |
US5229640A (en) * | 1992-09-01 | 1993-07-20 | Avx Corporation | Surface mountable clock oscillator module |
US5302921A (en) * | 1991-05-31 | 1994-04-12 | Seiko Epson Corporation | Piezoelectric oscillator having reduced radiation of higher harmonics |
US5327104A (en) * | 1991-10-21 | 1994-07-05 | Seiko Epson Corporation | Piezoelectric oscillator formed in resin package containing, IC chip and piezoelectric oscillator element |
US5392006A (en) * | 1987-02-27 | 1995-02-21 | Seiko Epson Corporation | Pressure seal type piezoelectric resonator |
US5420758A (en) * | 1992-09-10 | 1995-05-30 | Vlsi Technology, Inc. | Integrated circuit package using a multi-layer PCB in a plastic package |
-
1996
- 1996-05-17 WO PCT/US1996/007227 patent/WO1996039715A1/en active Application Filing
- 1996-08-26 TW TW085110356A patent/TW345731B/en active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5392006A (en) * | 1987-02-27 | 1995-02-21 | Seiko Epson Corporation | Pressure seal type piezoelectric resonator |
US4916413A (en) * | 1987-11-20 | 1990-04-10 | Matsushima Kogyo Kabushiki Kaisha | Package for piezo-oscillator |
US5302921A (en) * | 1991-05-31 | 1994-04-12 | Seiko Epson Corporation | Piezoelectric oscillator having reduced radiation of higher harmonics |
US5327104A (en) * | 1991-10-21 | 1994-07-05 | Seiko Epson Corporation | Piezoelectric oscillator formed in resin package containing, IC chip and piezoelectric oscillator element |
US5229640A (en) * | 1992-09-01 | 1993-07-20 | Avx Corporation | Surface mountable clock oscillator module |
US5420758A (en) * | 1992-09-10 | 1995-05-30 | Vlsi Technology, Inc. | Integrated circuit package using a multi-layer PCB in a plastic package |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10243515B2 (en) | 2012-04-27 | 2019-03-26 | Lapis Semiconductor Co., Ltd. | Semiconductor device and measurement device |
US10622944B2 (en) | 2012-04-27 | 2020-04-14 | Lapis Semiconductor Co., Ltd. | Semiconductor device and measurement device |
JP2016187059A (en) * | 2016-08-03 | 2016-10-27 | ラピスセミコンダクタ株式会社 | Semiconductor device and measurement instrument |
JP2018129553A (en) * | 2018-05-23 | 2018-08-16 | ラピスセミコンダクタ株式会社 | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
TW345731B (en) | 1998-11-21 |
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