WO1996010886A1 - Dispositif de prise de vues - Google Patents
Dispositif de prise de vues Download PDFInfo
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- WO1996010886A1 WO1996010886A1 PCT/JP1995/001990 JP9501990W WO9610886A1 WO 1996010886 A1 WO1996010886 A1 WO 1996010886A1 JP 9501990 W JP9501990 W JP 9501990W WO 9610886 A1 WO9610886 A1 WO 9610886A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/20—Circuitry for controlling amplitude response
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/70—Circuitry for compensating brightness variation in the scene
- H04N23/76—Circuitry for compensating brightness variation in the scene by influencing the image signals
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/70—Circuitry for compensating brightness variation in the scene
- H04N23/71—Circuitry for evaluating the brightness variation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/70—Circuitry for compensating brightness variation in the scene
- H04N23/72—Combination of two or more compensation controls
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/20—Circuitry for controlling amplitude response
- H04N5/202—Gamma control
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/20—Circuitry for controlling amplitude response
- H04N5/205—Circuitry for controlling amplitude response for correcting amplitude versus frequency characteristic
- H04N5/208—Circuitry for controlling amplitude response for correcting amplitude versus frequency characteristic for compensating for attenuation of high frequency components, e.g. crispening, aperture distortion correction
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/21—Circuitry for suppressing or minimising disturbance, e.g. moiré or halo
Definitions
- an image forming apparatus capable of obtaining a rich image of a floor network expression in which noise is not conspicuous by performing a fall correction on a blurred image of a main subject having a floor reticulation in backlight photography or the like. It is about.
- FIG. 23 is a block diagram of a conventional imaging device B shown in the patent.
- 1 is a lens
- 2 is an aperture mechanism
- 3 is an image sensor
- 4 is a briamb that widens the output of the image sensor 3 to an appropriate size
- 5 is a sort circuit
- 6 is an aperture control circuit
- 7 is gamma.
- Process circuit composed of a correction circuit, white balance circuit, etc., 8 is an automatic gain control circuit (hereinafter referred to as AGC circuit), 9 is an integration circuit, and 10 is an AGC control circuit that generates a signal that controls the gain of the AGC circuit 8.
- AGC circuit automatic gain control circuit
- 9 is an integration circuit
- 10 is an AGC control circuit that generates a signal that controls the gain of the AGC circuit 8.
- 11 is an AZD converter that performs AZD conversion of the video signal output of the AGC circuit 8
- 12 is an area dividing circuit that divides the AZD-converted signal into a plurality of areas
- 13 is an area dividing circuit that divides the AZD-converted signal into multiple areas.
- An integrating circuit that calculates an evaluation value corresponding to the brightness of each area 14 is a frequency distribution lonely circuit that counts the signals divided into each area for each brightness to obtain a frequency distribution, and 15 is an integration
- An interface circuit for input, 16 is a microcomputer
- 17 is a DZA converter that converts the digital signal output of the microcomputer 16 into an analog signal
- 18 is a control signal according to the output of the DZA converter 17
- a control signal generator circuit for generating the signal 19 is output from the control signal generator circuit 18.
- a gain control circuit for controlling the gain of the video signal by a control signal to be supplied 20 is a signal processing circuit of the camera, and 21 is a signal output terminal.
- the operation of the conventional imaging device configured as described above will be described below.
- the light passing through the lens 1 is limited in light quantity by the aperture mechanism 2, converted into an electric signal by the image probe 3, and then amplified by the preamplifier 4.
- the output of the bridge 4 is integrated by the integration circuit 5, becomes a DC signal corresponding to the output signal level of the preamplifier 4, and is input to the aperture control circuit 6.
- the aperture control circuit 6 compares the input DC signal level with the reference voltage, and outputs a control signal for operating the aperture mechanism 2 so that the output signal level of the brim 4 becomes constant.
- the output of the preamplifier 4 passes through a process circuit 7 for performing gamma correction and white balance, and is input to an AGC circuit 8.
- the AGC circuit 8 integrates the output of the AGC circuit 8 with an integration circuit 9 to obtain a DC signal corresponding to the output level of the AGC circuit 8, and then compares the DC signal with a reference voltage by an AGC control circuit 10 to generate an AGC circuit.
- the output signal level of the AGC circuit 8 is made constant by a control signal.
- the output of the AGC circuit 8 is converted into a digital signal by the AZD converter 11 and divided on the screen into a plurality of areas by the area dividing circuit 12, and the integrating circuit 13 outputs the average luminance of the video signal in each area.
- the distribution is detected as the exposure evaluation value of each area, and the frequency distribution calculation circuit 14 finds the luminance distribution in each area, and the microcomputer 16 correlates the center of the screen with the other areas to obtain the center of the screen.
- the area that is correlated with the part is the main subject area, and the other areas are the non-main subject areas. Then, backlight or over-directed light is determined based on the ratio between the main subject area and the non-main subject area, and the gain of the video signal is controlled according to the degree.
- the gain is corrected so that the gain is lower in the part where the luminance level is low than in the part where the luminance level of the video signal is high.
- the control circuit 19 corrects the transition characteristics of the dark part and outputs a signal with contrast.
- the signal processing circuit 20 performs various processes, and then outputs a video signal from the signal output terminal 21.
- the degree of backlight or over-direct light is determined, and the gain of the video signal is controlled according to the degree.
- the gain is corrected so that the gain is lower in the lower luminance levels than in the higher luminance levels. Therefore, there is a problem that the S / N ratio of a low luminance part of a video signal is greatly deteriorated, although a dark part can be corrected.
- the present invention solves the above-mentioned conventional problems by preventing deterioration of S in a low-brightness part of a video signal, preventing underexposure and underexposure, and providing a floor network over a whole screen from a normally-lit subject to a strongly backlighted subject. It is an object of the present invention to provide an imaging device capable of obtaining an output image with rich expression.
- an imaging device comprises: an imaging device that outputs a video signal; an AGC circuit that controls the gain of the video signal output from the imaging device; and an output signal level of the AGC circuit that is constant.
- AGC control means for controlling the AGC circuit, and a gain correction means for varying the gain for each luminance level of the video signal output of the AGC circuit by means of the squeezing correction coefficient.
- a feature value extraction unit that extracts the feature value of an image from the video signal output of the camera, and a backlight and overlight level are determined from the feature value extracted by the feature value extraction unit, and a correction level of gradation correction is output.
- image discriminating means for inputting the image data, and means for suppressing the degree of correction of the image discriminating means by the control signal of the AGC control means and determining the IS correction coefficient.
- the image capturing apparatus of the present invention includes a capturing element that outputs a video signal, and a tone correction element that performs tone correction by changing a gain for each luminance level of a video signal output from the image element using a conversion correction coefficient.
- S9 correction means a signal processing circuit for performing signal processing such as contour enhancement of a video signal output of the floor weakness correction means, a feature quantity extraction means for extracting a feature quantity of an image from the video signal output of the image element, Image discrimination means for discriminating the degree of back light and over-order light from the feature quantity extracted by the quantity extraction means and outputting a brightness correction coefficient; and a gain of a contour enhancement signal of the signal processing circuit based on the gradation correction coefficient determined by the image discrimination means.
- a contour signal gain control means for controlling the imaging device fi of the present invention performs image correction by changing the gain for each image signal output luminance level of the image signal output from the image sensor by using an image sensor that outputs a video signal and a silk correction coefficient.
- Image discrimination means for discriminating the degree of backlight and over-order light from the feature quantity extracted by the feature quantity extraction means and outputting a gradation correction coefficient; and noise of the signal processing circuit based on the gradation correction coefficient determined by the image discrimination means.
- the imaging device B of the present invention makes the gradation correction coefficient determined by the gradation correction suppression means variable according to the AGC control signal of the AGC control means, and suppresses the gain in the gradation correction means. Since a video signal subjected to gradation correction is output, a gradation-corrected image in which noise is less noticeable than an input image can be obtained.
- the above-described configuration makes it possible to correct
- the coefficient ss correction means is controlled by the coefficient to perform the ss correction
- the contour signal gain control means is controlled by the descending correction coefficient of the image discriminating means so as to reduce the gain of the contour intensity signal in the low luminance portion.
- the image forming apparatus of the present invention controls the floor correcting means in accordance with the conversion correction coefficient of the image discriminating means to perform floor S3 correction, and performs noise correction in accordance with the floor correcting coefficient of the image discriminating means.
- the characteristics of the suppression control means it is possible to obtain a tone-corrected image in which noise is less noticeable in the input image.
- FIG. 1 is a block diagram of an imaging device according to the first embodiment of the present invention.
- FIG. 2 is a block diagram of an image pickup device according to the second embodiment of the present invention.
- FIG. 3 is a diagram showing an image of one field of an input video signal according to the embodiment of the present invention.
- FIG. 4 is a diagram illustrating an example of a luminance histogram extracted by the feature amount extraction circuit 107 according to the embodiment of the present invention.
- FIG. 5A is a block diagram of the feature amount extraction circuit 107 in FIG.
- FIG. 5B is a block diagram of the image discriminating means 108 in FIG.
- FIG. 6A is a block diagram of the edge division circuit and the AGC control circuit in FIG.
- FIG. 6B is a graph showing the AGC control signal.
- FIG. 7 is a block diagram of the K translation correction suppression means 109 in the embodiment of the present invention.
- FIG. 8 is a diagram of a floor network correction suppression characteristic by the AGC control signal in the embodiment of the present invention.
- FIG. 9A is a block diagram of the joint correction circuit in FIG.
- FIG. 9B is a block diagram of a transition correction circuit according to the third and fourth embodiments of the present invention.
- FIG. 10 is a graph showing floor W correction characteristics in the example of the present invention.
- FIG. 11 is a graph showing the correction characteristic and the input / output characteristic in the embodiment of the present invention.
- FIG. 12 is a block diagram of an imaging apparatus according to a third embodiment of the present invention.
- FIG. 13 is a block diagram of the signal processing circuit in FIG.
- FIG. 14 is a characteristic diagram of the detail control in the third embodiment of the present invention.
- FIG. 15 is a block diagram of the imaging apparatus according to the fourth embodiment of the present invention.
- FIG. 16 is a block diagram of an imaging device according to a fifth embodiment of the present invention.
- FIG. 17 is a block diagram of the signal processing circuit and the noise reduction control circuit in FIG.
- FIG. 18A and FIG. 18B are input / output characteristic diagrams of the noise reduction control means according to the fifth embodiment of the present invention.
- FIG. 18C is a waveform diagram of a signal according to the fifth embodiment of the present invention.
- FIG. 19 is a block diagram showing a modified example of the signal processing circuit and the noise reduction control means according to the fifth embodiment of the present invention.
- FIG. 20 is a block diagram showing another modified example of the signal processing circuit and the noise reduction control unit according to the fifth embodiment of the present invention.
- FIG. 21 is a block diagram showing still another modified example of the signal processing circuit and the noise reduction control means according to the fifth embodiment of the present invention.
- FIG. 22 is a block diagram showing still another modified example of the signal processing circuit and the noise reduction control means according to the fifth embodiment of the present invention.
- FIG. 23 is a block diagram showing a configuration of an imaging device in a conventional example.
- FIG. 1 is a block diagram showing a configuration of the image apparatus according to the first embodiment of the present invention.
- 1001 is an image sensor
- 1002 is a process circuit including a gamma correction circuit and a white balance circuit
- 1003 is an AGC unit
- 1004 is an AZD converter that converts the video signal output of the AGC unit 1003 into an AZD
- Reference numeral 1005 denotes an adaptive gradation correction means for performing gradation correction according to the input image
- 1006 denotes a video signal subjected to the net correction by the adaptive transition correction means 1005 to perform different signal processing according to the gain in the adaptive gradation correction.
- a signal processing means 1007 is a D / A converter for D / A converting the video signal output of the signal processing means 6.
- a video signal captured by an image sensor 1001 is processed by a process circuit 1002 such as gamma correction and white balance, and then input to an AGC unit 1003.
- the video signal output of the AGC means 1003 is converted to a digital signal by the A / D converter 1004.
- the AGC means 1003 calculates the average value of the entire screen and the average value of the central part of the screen from the output signal of the AZD converter 1004, and adds the respective average values to obtain an integrated value.
- the obtained integrated value is used as a signal normalized to the output level range of the AGC means 1003, and the output signal level of the AGC means 1003 is controlled to be constant by an AGC control signal generated by comparison with a reference value.
- the video signal digitally converted to a level of 0 to 255 by the AZD converter 1004 is input to the adaptive gradation correction means 5.
- the adaptive gradation correction means 1005 determines the correction level of the floor 3 correction characteristic to be corrected according to the input image.
- the degree of correction is suppressed by the AGC control signal of the AGC unit 1003.
- the timing of the video signal is adjusted with the correction gain by the delay circuit, multiplied by the correction gain by the multiplier, and the corrected video signal is output.
- the adaptive gradation correction means 1005 performs different signal processing on the video signal subjected to the floor mesh correction, and the signal processing means 1006 performs different signal processing according to the correction gain of the adaptive gradation correction means 1005.
- the detail gain of the detail correction circuit is controlled in inverse proportion to the correction gain, or the signal processing for enhancing the noise reduction of the noise reduction circuit is performed in accordance with the correction gain.
- the analog-converted video signal is output from the D / A converter 1007.
- the imaging device fi of the present invention includes an imaging device 1001, a process circuit 1002 including a gamma correction circuit and a white balance circuit, an AGC unit 1003, an AG A / D converter 1004 for A / D converting the video signal output of C means 1003, adaptive gradation correction means 1005 for performing gradation correction according to the input video signal, and gradation by adaptive gradation correction means 5
- a signal processing unit 1006 that performs signal processing of the corrected video signal
- a DZA converter 1007 that performs DZA conversion of the video signal output of the signal processing unit 1006.
- the adaptive gradation correction unit 1005 and the signal processing unit 1006 can be linked by a correction gain.
- FIG. 2 is a block diagram illustrating a configuration of an imaging device according to a second embodiment of the present invention.
- reference numeral 101 denotes an imaging member
- 102 denotes a gamma correction circuit (e).
- a process circuit composed of a white balance circuit, etc. 103 is an AGC circuit
- 104 is an AZD converter that performs AZD conversion of the video signal output of the AGC circuit 103
- 105 is an integration circuit
- 106 is an integration circuit.
- 107 is a feature amount extraction circuit for extracting the feature amount of the video signal
- 108 is a backlight or over-order light intensity of the input image.
- the image discriminating means for discriminating, 109 is a gradation correction suppressing means for determining a gradation correction coefficient based on the output of the AGC control means 106 and the output of the image discriminating means 108, and 110 is a gradation correction coefficient.
- a tone correction circuit that performs a tone correction in accordance with the signal 1 1 1 is a signal processing circuit that performs signal processing on the video signal that has been subjected to the tone correction by the tone correction circuit 110, and 1 1 2 is a signal processing circuit 1 11 This is a D / A converter that performs DZA conversion of the video signal output of 1.
- FIG. 3 is a diagram showing an image of one field of an input video signal according to the embodiment of the present invention.
- reference numeral 201 denotes an effective screen, 320 pixels in the horizontal scanning direction, and 240 pixels in the vertical scanning direction.
- FIG. 4 is a diagram showing an example of a luminance histogram extracted by the extra-trace extraction circuit 107 according to the embodiment of the present invention.
- a is the luminance histogram
- b is the number of low-luminance pixels with an M value of 1 or less
- c is the number of medium-luminance pixels between !! value 1 and M value 2
- d is the high-luminance pixel with an M value of 2 or more. The number of finds.
- FIG. 5A is a block diagram of the feature amount extraction circuit 107 shown in FIG.
- reference numeral 401 denotes a comparator
- 402 denotes a low-luminance pixel counter circuit
- 403 denotes a medium-luminance pixel counter circuit
- 404 denotes a high-luminance image purple counter circuit. is there.
- FIG. 5B is a block diagram of the image discriminating means 108 shown in FIG.
- 501 is a quantization table
- 502 is an output table
- 503 is a filter circuit.
- FIG. 6A shows the block diagram of the integrating circuit 105 and the AGC control circuit 106 shown in Figure 2.
- 105a is a full screen averaging circuit
- 105b is a screen center weighted averaging circuit
- 105c is an adder
- 105d is a normalization circuit, and these constitute an integration circuit.
- 106a is a comparison circuit
- 106b is an AGC control signal output circuit, and these constitute an AGC control circuit.
- the comparison circuit 106b outputs a difference ⁇ between the normalization circuit 105d and the reference value.
- FIG. 6B is an output characteristic diagram of the AGC control signal.
- FIG. 7 is a block diagram of the floor correction suppression unit 109 shown in FIG.
- reference numeral 601 denotes a gradation correction suppression characteristic conversion unit
- 602 denotes an adder.
- FIG. 8 is a graph showing gray scale correction suppression characteristics by an AGC control signal according to the embodiment of the present invention.
- a is the suppression start gain
- b is the maximum suppression gain.
- FIG. 9A is a block diagram of the gradation correction circuit shown in FIG.
- 801 is a Y matrix circuit
- 802 is an L1 gain generation circuit
- 803 is a 2 gain generation circuit
- 804 is a luminance average circuit (LPF)
- 805 is an adder
- 806 is a weighted average circuit
- 807 is a delay circuit 808 is a multiplier.
- FIG. 10 shows the SS correction characteristic in the embodiment of the present invention.
- FIG. 11 shows the stage correction characteristic and the input / output characteristic in the embodiment of the present invention.
- a video signal captured by the image sensor 101 is divided into R, G, and B signals, and after processing such as gamma correction and white balance is performed by a process circuit 102, the signal is input to an AGC circuit 103. .
- the R, G, and B video signal outputs of the AGC circuit 103 are converted to digital signals by an AZD converter 104.
- the output signal of the A / D converter 104 is a silk correction circuit
- the luminance signal ⁇ ⁇ is input to 110 and is calculated by the Y matrix circuit 801 shown in FIG. 9A.
- the whole screen averaging circuit 105a calculates the average value of the entire screen from the luminance signal Y, and at the same time, the screen center weighted averaging circuit 105b calculates the average of the screen center part. Calculate the value and multiply by the weight (for example, twice) to calculate the weighted average.
- the respective average values are added by an adder 105c, and a normalization circuit 105d outputs the added average value as an integrated value which is a signal normalized to the output level range of the AGC circuit 103.
- the ratio reduction circuit 106a compares the integrated value with the reference value and outputs a difference signal ⁇ , and the AGC control signal output circuit 106b responds to the difference signal 6 Outputs the AGC control signal shown in B.
- the AGC control signal controls the output signal level of the AGC circuit 103 to be constant. That is, as shown in the output characteristic of the AGC control signal in FIG.
- the gain is increased because the integrated value is equal to the reference value.
- the output signal level of the AGC circuit 103 is controlled to be constant.
- the AGC circuit is described in, for example, JP-A-4-186074 and JP-A-4-194272, the contents of which are part of the present application.
- the video signal digitally converted to 0 to 255 by the A / D converter 104 is input to the silk correction circuit 110.
- the calculated luminance signal Y is input to the edge division circuit 105 and the special feature: ft extraction circuit 107.
- Fig. 3 shows an image of one field of the input video signal. This image is an example of a subject with a large degree of backlight against a person standing in front of a window.
- the feature quantity extraction circuit 107 distributes the number of low-luminance pixels, the number of medium ff-degree images, and the number of high-luminance pixels over the entire field of the effective screen, for example, for 320x240 dots of one field image of the effective screen 201 in FIG. Then, a luminance histogram as shown in Fig. 4 bcd is obtained.
- the image discriminating means 108 determines the degree of correction of the halftone correction characteristic for correcting the input image from the luminance histogram extracted by the feature amount extraction circuit 10 #.
- the details of the degree of amendment are described in an earlier application filed by the present applicant, US Serial No. 08/20 1,426 (EP Ap 1 n. No. 94 102 684.1), the content of which is incorporated herein by reference. Shall be included.
- the translation correction suppression means 109 suppresses the degree of correction by the AGC control signal of the AGC control means 106 and determines a correction coefficient.
- the gradation correction circuit 110 obtains a corrected luminance signal Y 'from the luminance signal Y and the correction coefficient, calculates a correction gain (Y' / Y), and outputs the R, G, and ⁇ signals by the delay circuit 807. The timing with the correction gain is adjusted, the multiplier 808 multiplies the correction gain ( ⁇ ' ⁇ ), and outputs the corrected R ', G'. In this way, by using the correction gain in common for the R, G, and ⁇ signals, an output image with good color balance and high gradation expression over the entire range can be obtained.
- the video signal subjected to the 3 ⁇ 4 correction is subjected to various kinds of signal processing by a signal processing circuit 111, and then processed by a D / A converter 112. Then, the converted video signal is output.
- the floor correction circuit 110 performs an operation of changing the input luminance signal Y to a brighter luminance signal Y '.
- the input luminance signal Y and the output luminance signal Y ′ are equal, and the relationship between the two is 45. If the degree of change is the strongest, the relationship is shown by the curve L1.
- the lines L1 and L2 there is a stepwise intermediate change characteristic line, typical examples of which are a. B and c.
- Line Ll and line L2 are expressed by the following equations (3) and (4), respectively.
- L2 Y ... (4)
- the line Y 'between the line L1 and the dependent L2 can be obtained by the following equation (2) by a weighted average.
- Y ' ⁇ L 1-(255-M) + L2 ⁇ / 255... (2)
- ⁇ is a variable that takes a value from 0 to 255 and is expressed by the following equation (5).
- Ya is a luminance average value obtained from the average value detection circuit (LPF) 804, and ⁇ is a correction coefficient.
- the correction coefficient ⁇ before suppression (hereinafter referred to as a correction degree 7) is output from the image discriminating means 108, and the AGC control signal F (which fluctuates in the range of 0 to 12 dB as shown in FIG. 6B) is large. Then, the suppression value S increases, and the correction coefficient ⁇ is suppressed and approaches the line L2. For example, there is a relationship as shown in FIG. 8 between the AGC control signal F and the suppression value S, and is expressed by the following equation (6).
- the input luminance signal Y is compared by the comparator 401 with the fifl plant 1 and the Bfi value 2.
- a low luminance count signal is output.
- a medium luminance count signal is output.
- a high luminance count signal is output.
- the counter circuits 402, 403, and 404 count the number of pixels on an effective screen of one field according to the low-brightness count signal, the middle-brightness count signal, and the high-brightness count signal. , The number of medium luminance pixels and the number of high luminance pixels are output.
- the quantization table 501 contains, as addresses, the number of low-luminance pixels, the number of medium-luminance pixels, and the number of high-luminance pixels supplied from the feature amount extraction circuit 107.
- the quantization data for the subject and the quantization data for the dark subject are stored.
- the output table 502 using the quantized data output of the quantization table 501 as an address, a correction degree for a normally-lit subject, a correction degree for a backlit subject, a correction degree for a dark subject, and the like are described. .
- These correction degrees have been obtained by experience, and are detailed in the earlier application described above.
- the image discriminating means 108 when the number of low-brightness pixels, the number of medium-brightness pictures, and the number of high-brightness pictures are input to the image discriminating means 108 from the special amount extraction circuit 107, one correction degree is determined for the input image. I do. In this way, by using the image discriminating means 108 with a two-stage table configuration, the size of the table can be reduced. This correction degree is linked to the previous field or previous frame. Filter processing is performed by the filter circuit 503 so as to maintain consistency, and a correction degree is output.
- the operation of the floor correction suppression means 109 will be described in detail with reference to FIGS.
- the AGC control signal is input from the AGC control means 106 to the transition correction suppression means 109.
- the input AGC control signal is converted into a suppression value corresponding to the AGC control signal by a gradation correction suppression characteristic converter 601.
- the converted suppression value is added by the adder 602 to the correction degree of the image discriminating means 108 to output a correction coefficient.
- the gradation correction suppression characteristic in FIG. 8 when the AGC control signal is small, the suppression value is small, and as the AGC control signal increases, the suppression value increases. Therefore, by performing the transition correction in conjunction with the AGC so that the suppression of the gradation correction increases as the gain of the AGC increases, it is possible to perform the gradation correction with less noticeable noise.
- the luminance signal Y is calculated by the Y matrix circuit 801 based on the input RGB signals.
- the luminance signal Y is supplied to an L1 gain generation circuit 802 and an L2 gain generation circuit 803.
- the L1 gain generation circuit 802 outputs a first correction gain (L1 / Y) from the input luminance signal Y and L1 corrected by the first correction factor.
- the second correction gain is output from the L2 gain generation circuit 803.
- an average value detection circuit (LPF) 804 obtains the average luminance value Ya, and the adder 805 multiplies the average luminance value Ya by the correction coefficient ⁇ by 64, and outputs an M signal.
- the weighted averaging circuit 806 performs weighted averaging of the first correction gain and the second correction gain by the relational expression (2 ') using the M signal, and outputs a correction gain (Y'ZY).
- FIG. 10 shows this embodiment.
- 5 shows the fall correction characteristics at.
- L1 is the first gradation correction characteristic
- L2 is the second gradation correction characteristic.
- the correction coefficient ⁇ is 0, the gradation correction characteristic becomes a from the relational expression of (2 ').
- the correction coefficient 9> becomes positive
- the gradation correction characteristic becomes like c.
- the correction coefficient 4 becomes negative, the gradation correction characteristic becomes like b.
- the gradation correction characteristic of L2 in Fig. 10 is used for a subject with a sudden light
- the gradation correction characteristic of a in Fig. 10 is used for a backlighted object
- the gradation correction characteristic of L1 in Fig. 10 is used for a dark object.
- FIG. 11 shows gradation correction characteristics and input / output waiting characteristics.
- the average luminance value Ya obtained by the average value detection circuit 804 is equal to the luminance signal Y of the target pixel, the luminance correction value Ya in FIG.
- the average luminance value Ya is higher than the luminance signal Y of the pixel of interest, it is the gradation correction characteristic shown in c of FIG.
- the gradation correction is performed so as to maintain the contrast even when the inclination of the correction gain is small, and an output signal rich in unity expression can be obtained.
- the imaging device fi of the present invention includes the imaging device 101 And a process circuit consisting of a gamma correction circuit and a white balance circuit
- AGC control means 106 for generating a signal to be changed, a feature quantity extraction circuit 107 for extracting a feature quantity of a video signal, and an image discriminating means 108 for discriminating the degree of backlight or over-order light of the input image.
- a tone correction suppression means 109 which determines a correction coefficient based on the output of the 6 control means 106 and the output of the image discriminating means 108, and a tone correction means which performs tone correction according to the halftone correction coefficient.
- the D / A outputs the video signal output of the signal processing circuit 1 1 1 and the signal processing circuit 1 1 1 which performs signal processing on the video signal whose gradation has been corrected by the correction circuit 1 10 and the gradation correction circuit 1 1 0.
- the D / A converter 1 1 2 that converts the noise, the noise is noticeable for all subjects from backlight to normally-lit subject by linking the transition correction with the AGC control signal. No, not crushed is floor network can color balance to obtain a rich output image of good floor II expression over the entire region.
- the gradation correction means of the present invention includes a Y matrix circuit 801, an L1 gain generation circuit 802, an L2 gain generation circuit 803, and a luminance averaging circuit (LPF) 804. , An adder 805, a weighted average circuit 806, a delay circuit 807, and a multiplier 808.
- the circuit scale can be made very small because it is not necessary to have an extra ROM, etc., that stores such characteristics. Also, by changing the correction coefficient ⁇ , it is possible to generate the floor correction characteristics of a backlight or backlit subject, so that the floor mesh is not destroyed for any subject from a backlight subject to a normal subject, and the color balance is maintained. It is possible to obtain a gradual output image of gradation expression over the entire area.
- the so-called correction characteristics can be changed systematically, natural gradation You can catch it.
- the gradation correction characteristic is provided so that the input signal becomes almost the output signal as it is, so that the transition of the high-brightness part is destroyed by the conventional au to knee control or the like. Places can be reproduced beautifully.
- FIG. 12 is a block diagram showing the configuration of the imaging device according to the third embodiment of the present invention.
- reference numeral 1101 denotes an image sensor; 1102, a process circuit including a gamma correction circuit and a white balance circuit; 1103, an A / D converter that performs AZD conversion of the video signal output of the process circuit 1102;
- a feature amount extraction circuit for extracting a feature amount of a signal; 1105, an image discriminating unit for discriminating the degree of backlight or over-order light of the input image; 1106, a DTL gain control unit for determining a DTL gain based on an image discrimination result;
- 1108 is a signal processing circuit for performing signal processing such as detail correction of a video signal whose tone is captured by the tone correction circuit 1107, and 1109 is a signal.
- a DZA converter for D / A converting the video signal output of the processing circuit 1108.
- FIG. 13 is a block diagram of the signal processing circuit 1108 according to the third embodiment of the present invention.
- 1108 is a signal processing circuit
- 1201 is a vertical detail circuit
- 1202 is a horizontal detail circuit
- 1203 is an adder
- 1204 is a multiplier
- 1205 is a delay circuit
- 1206 is an adder.
- FIG. 14 is a characteristic diagram of the detail gain corresponding to the luminance signal Y.
- FIG. 9B is a block diagram of the ffi-baras correction circuit according to the third embodiment of the present invention. In FIG.
- 802 is an L1 gain generation circuit
- 803 is an L2 gain generation circuit
- 804 is a luminance averaging circuit (LPF)
- 805 is an adder
- 806 is a weighted average circuit
- 806 is a delay circuit
- 807 is a multiplier.
- the image discriminating unit 1105 determines a correction coefficient of the gradation correction characteristic to correct the input image from the luminance histogram extracted by the characteristic amount extraction circuit 111.
- the floor transposition correction circuit 1107 obtains the corrected luminance signal Y 'from the luminance signal Y and the correction coefficient, calculates the correction gain (Y'ZY), and converts the input video signal into a delay circuit 807 Adjusts the timing with the correction gain, multiplies the correction gain ( ⁇ '/ ⁇ ) by the multiplier 808, and outputs the gradation-corrected output video signal. Power images can be obtained.
- the DTL gain control means 1106 performs gain control based on the correction coefficient determined by the image discriminating means 1105 so as to reduce the detail gain in the low-luminance part, and the detail gain corresponding to the luminance signal ⁇ is obtained. Is output.
- the video signal subjected to the translation correction is input to the signal processing circuit 1108, and the detail correction signal processing is performed with the detail gain determined by the DTL gain control means 1106.
- the D / A converter 1109 outputs an analog-converted video signal.
- the DTL gain control means 1106 has a detail gain characteristic corresponding to the luminance signal Y as shown in FIG. That is, it has such characteristics that the detail gain in the low-brightness part is reduced and the detail gain in the high-brightness part is increased. This is to prevent the SN degradation in the low-brightness part and to correct the detail that was lost by the gamma correction in the high-brightness part.
- the floor SW correction circuit 1107 performs the floor correction by increasing the gain of the low luminance part as compared with the high luminance part, so that the SZN of the low luminance part deteriorates.
- the S / N deterioration of the low-luminance part can be made inconspicuous. For example, when the value is 0-2, the detail gain G in the low-brightness part is taken as a reference, and the edge part in a dark place and the like are strengthened accordingly.
- FIG. 13 is a block diagram of the signal processing circuit.
- a video signal when a video signal is input, it is input to a vertical detail circuit 1201 that performs high-pass filtering in the vertical direction and a vertical detail circuit 1222 that performs high-pass filtering in the horizontal direction. Then, the vertical detail signal and the horizontal detail signal are calculated. Next, the vertical detail signal and the horizontal detail signal are added by the adder 123 to obtain a detail signal. The detail signal is multiplied by the DTL gain by the multiplier 124 to multiply the level of the detail signal. Adjust. After ft, the input video signal is adjusted in timing by the delay circuit 125, added to the detail signal and added by the adder 125, and the detail-corrected video signal is output. Therefore, by reducing the detail gain of the low-brightness part in conjunction with the correction coefficient determined by the image determination unit 1105, it is possible to make the S / N deterioration of the low-brightness part less noticeable.
- the image pickup apparatus of the present invention includes an image pickup device 111, a process circuit 1102 including a gamma correction circuit and a white balance circuit, and the like.
- feature value extraction circuit 110 4 for extracting feature values of video signal and backlight and over-order light intensity of input image Image determining means 1 105 for determining the DTL gain based on the image determination result
- DTL gain control means 1106 for determining the DTL gain
- a gradation correction circuit 1 10 for performing the weak correction according to the floor correction coefficient.
- a signal processing circuit 1108 that performs signal processing such as detail correction of the video signal whose gradation has been corrected by the gradation correction circuit 1107, and a video signal output of the signal processing circuit 1108.
- the D / A converter 1 1 .0 9 converts D to A from D to A, and a correction gain is generated by the correction coefficient. Since it may not have several different gradation correction property Ki ⁇ to keep extra R OM or the like, can also circuit scale very small. In addition, by changing the correction coefficient, it is possible to generate the IS correction characteristics of the normal and backlight subjects, so that any subjects from the backlight subject to the normal subject are not destroyed, and the color balance is good over the whole area. Thus, an output image rich in gradation expression can be obtained.
- FIG. 15 is a block diagram showing the configuration of the imaging device ffi in the fourth embodiment of the present invention.
- reference numeral 1401 denotes an image sensor; 1402, a process circuit including a gamma correction circuit and a white balance circuit; 1403, an AGC circuit; 1404, an A / D that converts the video signal output of the AGC circuit 1403 to AZD A converter
- 1405 is an integration circuit
- 1406 is an AGC control means for generating a signal for controlling the gain of the AGC circuit 1403
- 1407 is a feature amount extraction circuit for extracting a characteristic of a video signal
- 1408 is backlight of an input image
- Image discriminating means for discriminating the degree of over-order light
- 1409 is a correction correction means for determining a correction coefficient based on the output of the AGC control means 1406 and the output of the image discriminating means 1408, and 1410 is determined by the gradation correction suppressing means 1409.
- DTL gain control means for controlling the DTL gain using the corrected correction coefficient
- 1411 is a gradation correction circuit for performing gradation correction according to the correction coefficient
- 1412 is a video signal subjected to silk correction by the gradation correction circuit 1411.
- 1413 is a signal processing circuit that performs signal processing for A video signal output of the road 1 12 is a D / A converter for converting D A.
- the image signal captured by the image sensor 1401 is processed by a process circuit 1402 such as gamma correction and white balance, and then input to an AGC circuit 1403.
- the video signal output of the AGC circuit 1403 is converted into a digital signal by the AZD converter 1404.
- the output signal of the AZD converter 1404 is input to the integration circuit 1405.
- Edge The circuit 1405 has the same configuration as that shown in FIG. 6A, and the full-screen averaging circuit 105a calculates the average value of the entire screen from the output signal of the A / D converter 1404, and simultaneously weights the center of the screen.
- the averaging circuit 105b calculates the average value of the center part of the screen, and further multiplies the weight (for example, twice) to calculate the weighted average value.
- the respective average values are added by an adder 105c, and the normalization circuit 105d outputs the added average value as an integrated value which is a signal normalized to the output level range of the AGC circuit 1403.
- the AGC control means 1406 also has the same configuration as that shown in FIG. 6A, and the comparison circuit 106a compares the yield value with the reference value, and the AGC control signal output circuit 106b generates the AGC control signal.
- the signal is controlled so that the output signal level of the AGC circuit 1403 becomes constant. That is, as shown in the output characteristics of the AGC control signal in FIG. 6B, when the integrated value is smaller than the reference value, the AGC control signal is output so that the gain becomes large in order to make the edge value equal to the reference value. .
- the output signal level of the AGC circuit 1403 is controlled to be constant.
- the video signal digitally converted to 0 to 255 by the A / D converter 1404 is input to an integration circuit 1405, a characteristic amount extraction circuit 1407, and a gradation correction circuit 1411.
- the image discriminating means 1408 determines the degree of correction of the transition correction characteristic for correcting the input image from the luminance histogram extracted by the feature amount extraction circuit 1407.
- the gradation correction suppressing means 1409 determines the correction coefficient by suppressing the degree of correction by the AGC control signal of the AGC control means 1406.
- the gradation correction circuit 1411 obtains the corrected luminance signal Y ′ from the luminance signal Y and the correction coefficient, calculates the correction gain (Y′ZY), and calculates the timing of the input video signal with the correction gain by the delay circuit 807.
- the multiplier 80 By multiplying by the correction gain (Y '/ Y) in step 8 and outputting an output video signal that has been excavated, it is possible to obtain a beautiful output image in a net-like expression over the entire area where noise is not noticeable. In this way, the AGC and the SS correction are linked together! ⁇ By performing the correction, it is possible to perform the correction in which the noise in the low-brightness area is inconspicuous.
- the DTL gain control means 1410 performs gain control so as to reduce the detail gain in the low-luminance part by using the correction coefficient 4 determined by the translation correction suppression means 1409, and outputs the detail gain corresponding to the luminance signal ⁇ . I do.
- the video signal that has been subjected to the floor correction is input to a signal processing circuit 1412, and the DTL gain control unit 1410 performs signal processing for detail correction with the detail gain determined.
- the DZA converter 1413 outputs an analog-converted video signal.
- the imaging device of the present invention includes an imaging device 1401, a process circuit 1402 including a gamma correction circuit and a white balance circuit, an AGC circuit 1403, and an AGC circuit.
- An octave converter 1404 for converting the video signal output of the circuit 1403 to octave, an aliquoting circuit 1405, an AGC control means 1406 for generating a signal for controlling the gain of the AGC circuit 1403, and a very small amount of the video signal.
- An image discriminating means 1408 for discriminating the degree of backlight or over-order light of the input image, and a step for determining a correction coefficient based on the output of the AGC control means 1406 and the output of the image discriminating means 1408.
- the signal of the video signal corrected by the gradation correction circuit 1411 Signal processing circuit 141 for performing processing 2 and a D / A converter 1 4 1 3 for D / A conversion of the video signal output of the signal processing circuit 1 4 1 2 Since it is not necessary to have an extra ROM, etc., that takes note of the correctability of the first floor, the circuit scale can be very small. In addition, by changing the capture coefficient, it is possible to generate halftone correction characteristics for backlit and backlit subjects.
- a richly expressed output image can be obtained.
- the noise correction can be performed with less noticeable noise.
- the gradation correction characteristic is used so that the input signal becomes almost the same as the output signal, so that the gradation of the high-brightness part is broken by the conventional Otney control or the like. Can be reproduced anyway.
- gradation correction by adaptively changing the gradation correction characteristics in pixel units based on the average luminance value Ya, gradation correction is performed so that the contrast is maintained even when the inclination of the correction gain is small.
- a rich output signal can be obtained.
- the luminance signals Y, R, G, and B signals are used as the input video signals.
- a luminance signal, a color difference signal, a combo signal, and a luminance signal are used instead of the luminance signals Y, R, G, and B signals.
- a similar effect can be obtained by using a signal obtained by combining a color signal with a signal as an input video signal.
- the floor correction means multiplies each of the input video signals by the correction IN to perform the silk correction.
- the correction value instead of the correction gain (Y'ZY), the correction value ( ⁇ The same effect can be obtained by adding '- ⁇ ) to each of the input video signals.
- the input video signal is converted into an 8-bit analog-digital signal.
- the number of quantization bits may be another value, and the number of processing bits of the correction gain generation circuit or the like can be planted in accordance with the number of quantization bits.
- the feature i extraction circuit outputs the number of images at three luminance levels.
- the I value of each level may be different, or the number of levels may not be three. .
- the special pixel amount extraction circuit counts the number of screens for an effective screen having one horizontal pixel number of 320 pixels and 240 lines, but the number of pixels to be counted may be different or the number of pixels may be different. Any number of signal bits may be used as long as the characteristics of the input image are known.
- the correction coefficient determination circuit determines the input image using the luminance histogram as a characteristic amount.
- luminance histogram instead of the luminance histogram, other characteristic amounts, for example, histograms of R, G, and B signal deviations are used.
- one of the effective screens of the histogram or image data is divided into blocks, and the maximum value, average value, minimum value, etc. of the luminance signal, RGB signal, color difference signal of each block are characterized, and the image is classified into a class.
- the method is not limited to this method as long as the feature quantity can be divided.
- the correction coefficient determination circuit may be a method using a neural network, a method using fuzzy control, a method using template matching, or any other method that can determine gradation correction characteristics by determining an image.
- the method is not limited to this.
- the imaging device of the present invention includes a storage element, an AGC circuit, an AGC control means for generating a signal for controlling the gain of the AGC circuit, and a characteristic amount extraction circuit for extracting a characteristic amount of a video signal.
- Image discrimination means for discriminating the degree of back light or over-order light of the input image
- silk correction correction means for determining the iris correction coefficient based on the output of the AGC control means and the output of the image discrimination means
- gradation correction suppression means for suppresse.
- the AGC control signal accelerates the floor correction and the correction coefficient controls the detail gain in the low-brightness area, floor correction with less noticeable noise can be performed.
- the gradation correction characteristic is used so that the input signal becomes almost the same as the output signal. it can.
- the gradation correction is performed so that the contrast is maintained even if the inclination of the correction gain is small. It is possible to obtain an output signal rich in the expression of the atmosphere.
- FIG. 16 is a block diagram illustrating a configuration of an imaging device according to a fifth embodiment of the present invention.
- reference numeral 1601 denotes an image sensor
- 1602 denotes a process circuit formed by a gamma correction circuit / white balance circuit, etc.
- 1603 denotes a video signal output of the process circuit 1602.
- a / D converter for AZD conversion 160 is a special i extraction circuit for extracting the characteristic amount of the video signal
- 1605 is for judging the degree of backlight or over-order light of the input image to determine the correction coefficient.
- Image discriminating means to output 1 6 06 is a noise reduction control means for controlling the noise suppression characteristic by the image discrimination result
- 1607 is a spiral correction circuit for performing a floor correction in accordance with a floor correction coefficient
- 1608 is a correction correction by a 28 correction circuit 1607.
- 1609 is a D / A converter for performing DZA conversion of the video signal output of the signal processing circuit 1608.
- the operations of the * image element 1601, the process circuit 1602, the AZD converter 1603, the special function: ft extraction means 1604, the image discrimination means 1605, and the gradation correction circuit 1607 are the same as those of the third embodiment.
- the operation of the process circuit 1102, the AZD converter: I103, the feature amount extracting means 1104, the image discriminating means 1105, and the operation of the gradation correction circuit 1107 are completely the same.
- the image discriminating means 1605 determines the degree of backlight or over-directed light and outputs a correction coefficient, and the floor IS correction circuit 1607 generates a gradation according to the correction coefficient. Perform a capture.
- the noise reduction control unit 1606 outputs a noise suppression characteristic setting signal so as to increase the noise suppression characteristic of the signal processing circuit 1608.
- the signal processing circuit 1608 performs signal processing with low noise according to this characteristic. In this way, by linking the floor correction and the noise reduction, it is possible to perform the floor HI correction in which the noise is inconspicuous.
- the D / A converter 1609 outputs an analog-converted video signal.
- FIG. 17 is a block diagram of the signal processing circuit 1608 and the noise reduction control means 1606 according to the fifth embodiment of the present invention.
- 1701 is a delay means
- 1702 is a nonlinear processing means
- 1703 is a nonlinear characteristic setting means
- 1704 and 1705 are subtracters
- 1706 is a video signal input terminal
- Reference numeral 7 denotes a video signal output terminal
- reference numeral 1708 denotes an input terminal of the image discriminating means 1605 for the correction coefficient.
- the delay unit 1701 delays the video signal Y 1 ((a) in FIG. 18C) input from the video signal input terminal 1706 by one line and outputs a signal Y 2 ((b) in FIG. 18C).
- the subtractor 1704 outputs a difference signal x ((c) in FIG. 18C) between the current video signal Y1 and the video signal Y2 one line before.
- the non-linear characteristic setting means 1703 sets the input / output characteristics of the non-linear processing means 1702 according to the value of the silk correction coefficient inputted from the terminal 1708.
- the nonlinear processing means 1702 processes the difference signal X from the subtractor 1704 according to the input / output characteristics set by the noise reduction control means 1703, and outputs a signal y ((d) in FIG. 18C).
- the subtractor 1705 outputs a difference Y3 ((e) in FIG. 18C) between the video signal Y1 from the video signal input terminal 1706 and the signal y.
- FIG. 188 is a graph showing the input / output characteristics of the nonlinear processing means 1702.
- the horizontal axis is the input signal X of the nonlinear processing means 1702
- the vertical axis is the output signal y of the nonlinear processing means 1 ⁇ 02. is there.
- the input / output characteristics of the nonlinear processing means 1702 are as shown in (7).
- the characteristic of Expression (6) is set by the noise reduction control unit 1703.
- the noise reduction control means 1703 determines the use of according to, for example, (8) according to the value of the floor correction coefficient.
- the method of changing the characteristics of the noise low-frequency range with the compensation coefficient ⁇ is not revised to the one shown in Fig. 18A, but other methods such as changing the slope shown in Fig. 18B are also possible. It is.
- the input / output characteristics of the non-linear processing means 1702 follow Fig. 18A and the characteristics change according to (8).
- the noise reduction characteristics For an image with a large gain in 1607, by enhancing the noise reduction characteristics, it is possible to perform a floor network correction with less noticeable noise.
- the delay means 1701 is a line memory that delays the input signal Y1 by one line.
- the delay means 1701 may be a flip-flop that delays the input signal Y1 by one or more clocks.
- a field memory that delays more than the field may be used.
- the signal processing circuit 1608 of the present embodiment is a feed-forward type noise reduction circuit in which the extending means 1701 delays the input signal Y1, but a feedback type in which the delay means 1701 delays the output signal Y3.
- the configuration may be as follows.
- FIG. 19 is a block diagram of a signal processing circuit 1608 composed of a feedback type noise reduction circuit using a configuration outline of the signal processing circuit 1608 of this embodiment (shown in FIG. 17) and a noise reduction control unit 1606. According to the configuration of FIG. 19, a greater noise reduction effect can be obtained by using the delay means having the same delay time as compared with the feedforward type configuration.
- FIG. 20 shows a block diagram of a signal processing circuit 1608 composed of a noise reduction circuit configured by connecting the noise reduction circuit of FIG. 19 and the noise reduction circuit of FIG. 17 in series, and the noise reduction control means 1606.
- FIG. 19 the line memory 2 2 4 1, the vertical non-linear processing means 2 2 4 2, the vertical non-linear characteristic setting means 2 2 4 3, and the storage units 2 2 4 7 and 2 2 4 8
- This is a circuit that removes vertical components of screen noise by using a line memory 2221 that delays one line to the delay S2101 of the signal processing circuit shown in FIG.
- the flip-flop 2 2 4 4, the horizontal non-formation processing means 2 2 4 5, the horizontal non-linear characteristic setting means 2 2 4 6, and the subtractors 2 2 4 9 and 2 2 50 are shown in FIG. 17
- the signal processing circuit 1608 of the present embodiment is a noise reduction circuit using a difference signal between the output signal Y2 of the delay means 1701 and the input signal Y1, but Y2 and Y A noise reduction circuit using a signal obtained by dividing the difference signal from 1 into bands may be used.
- FIG. 21 is a block diagram of the signal processing circuit 1606 and the noise reduction control means 1606. In FIG.
- 2 3 2 1 is delay means
- 2 3 2 2 is band division means
- 2 3 2 3 is first nonlinear processing means
- 2 3 2 4 is second nonlinear processing means
- 2 3 2 5 Is the first noise reduction control means
- 2 3 2 6 is the second noise reduction control means
- 2 3 2 7 is an adder
- 2 3 2 8 and 2 3 2 9 are a subtractor
- 2 3 3 0 is a video Signal input terminal
- 2 3 3 1 is video signal output terminal
- 2 3 3 1 is video signal output terminal
- the 32 is an input terminal for the floor correction coefficient.
- the delay means 2 3 2 1 delays the input video signal Y 1 by one line and outputs the signal Y 2.
- the subtractor 2 3 2 8 subtracts the S signal Y 2 from the input signal Y 1 and outputs a difference signal X. ⁇ divider means 2 3 2 2 to separate the differential signal X to the low frequency component X 1 and the high frequency component X 2 You.
- the first non-linear processing means 2 3 2 3 and the second non-linear processing means 2 3 2 4 perform different non-linear processing (having different input / output characteristics having different 0 in FIG. 18) on X and x 2 respectively. And output y 2 .
- the first noise reduction control means 2 325 determines the sensitivity of the input / output characteristics of the first nonlinear processing means 233 according to the value of the 3 ⁇ 43 ⁇ 43 correction coefficient.
- the second noise reduction control means 2332 determines 0 in the input / output characteristics of the second nonlinear processing means 2324 according to the level of the input signal Y1.
- the adder 2 327 adds the y and y 2 output from the non-linear processing means 2 233 and 2 324 and outputs a signal y.
- the subtractor 2 3 2 9 subtracts the signal y from the input signal Y 1 and outputs a signal Y 3.
- the signal processing circuit 1608 and the noise reduction control circuit 1606 of the present embodiment are configured by a feedback type noise reduction circuit using a region division as shown in FIG. Is also good. According to the configuration shown in FIG. 22, a greater noise reduction effect can be obtained by using the transport means having the same travel time as compared with the feedforward type configuration.
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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DE69534929T DE69534929T2 (de) | 1994-09-30 | 1995-09-29 | Bildaufnahmevorrichtung |
US08/809,714 US6040860A (en) | 1994-09-30 | 1995-09-29 | Imaging apparatus for supplying images with rich gradation across the entire luminance range for all subject types |
EP95932941A EP0784399B1 (en) | 1994-09-30 | 1995-09-29 | Image pickup device |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
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JP23673294A JP3531230B2 (ja) | 1994-09-30 | 1994-09-30 | ノイズ低減回路 |
JP6/236732 | 1994-09-30 | ||
JP6/242774 | 1994-10-06 | ||
JP24277494A JP3298330B2 (ja) | 1994-10-06 | 1994-10-06 | 撮像装置 |
Publications (1)
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WO1996010886A1 true WO1996010886A1 (fr) | 1996-04-11 |
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PCT/JP1995/001990 WO1996010886A1 (fr) | 1994-09-30 | 1995-09-29 | Dispositif de prise de vues |
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US (1) | US6040860A (ja) |
EP (1) | EP0784399B1 (ja) |
DE (1) | DE69534929T2 (ja) |
WO (1) | WO1996010886A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0871329A3 (en) * | 1997-03-14 | 1999-04-28 | Matsushita Electric Industrial Co., Ltd. | An imaging apparatus |
EP0866608A3 (en) * | 1997-03-18 | 1999-05-12 | Matsushita Electric Industrial Co., Ltd. | Method for correcting luminance gradation in an image pickup apparatus |
Families Citing this family (51)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
BR9804773B1 (pt) * | 1997-03-06 | 2010-12-14 | aparelho de compensaÇço do gama. | |
US6906745B1 (en) | 1998-04-23 | 2005-06-14 | Micron Technology, Inc. | Digital exposure circuit for an image sensor |
JP3969836B2 (ja) * | 1998-04-24 | 2007-09-05 | キヤノン株式会社 | 信号処理装置および撮像用信号処理方法 |
US6825884B1 (en) * | 1998-12-03 | 2004-11-30 | Olympus Corporation | Imaging processing apparatus for generating a wide dynamic range image |
JP4255553B2 (ja) * | 1999-02-04 | 2009-04-15 | パナソニック株式会社 | 撮像装置 |
JP3714657B2 (ja) * | 1999-05-12 | 2005-11-09 | パイオニア株式会社 | 階調補正装置 |
JP4482956B2 (ja) * | 1999-06-03 | 2010-06-16 | 株式会社ニコン | 画像補正装置及び画像補正プログラムを記録した記録媒体。 |
JP3649043B2 (ja) | 1999-06-07 | 2005-05-18 | セイコーエプソン株式会社 | 画像表示装置及び方法、並びに、画像処理装置及び方法 |
US7092569B1 (en) * | 1999-07-29 | 2006-08-15 | Fuji Photo Film Co., Ltd. | Method and device for extracting specified image subjects |
WO2001033814A1 (en) * | 1999-11-03 | 2001-05-10 | Tellabs Operations, Inc. | Integrated voice processing system for packet networks |
JP3545979B2 (ja) * | 1999-11-30 | 2004-07-21 | シャープ株式会社 | 輪郭補正装置 |
US6567124B1 (en) * | 1999-12-01 | 2003-05-20 | Ball Aerospace & Technologies Corp. | Electronic image processing technique for achieving enhanced image detail |
JP3757747B2 (ja) * | 2000-04-03 | 2006-03-22 | 株式会社ニコン | 電子カメラ、画像処理プログラムを記録した記録媒体、および画像処理方法 |
US6735547B1 (en) * | 2000-10-06 | 2004-05-11 | Evangelos A. Yfantis | Method and apparatus for determining the size and shape of a foot |
US7176962B2 (en) * | 2001-03-01 | 2007-02-13 | Nikon Corporation | Digital camera and digital processing system for correcting motion blur using spatial frequency |
US6900888B2 (en) * | 2001-09-13 | 2005-05-31 | Hitachi High-Technologies Corporation | Method and apparatus for inspecting a pattern formed on a substrate |
JP3992177B2 (ja) * | 2001-11-29 | 2007-10-17 | 株式会社リコー | 画像処理装置、画像処理方法及びコンピュータ・プログラム |
JP2004023605A (ja) * | 2002-06-19 | 2004-01-22 | Sony Corp | 画像処理装置、カメラ装置、及びその自動露光制御方法 |
US6853806B2 (en) * | 2002-09-13 | 2005-02-08 | Olympus Optical Co., Ltd. | Camera with an exposure control function |
DE10301898A1 (de) * | 2003-01-17 | 2004-08-05 | Robert Bosch Gmbh | Verfahren zur Einstellung eines Bildsensors |
JP4167097B2 (ja) * | 2003-03-17 | 2008-10-15 | 株式会社沖データ | 画像処理方法および画像処理装置 |
JP2004318609A (ja) * | 2003-04-17 | 2004-11-11 | Sanyo Electric Co Ltd | 画像処理装置、画像処理方法及び画像処理プログラム |
JP4200890B2 (ja) * | 2003-12-10 | 2008-12-24 | 株式会社日立製作所 | 映像信号処理装置及びそれを用いたテレビジョン受信機並びに映像信号処理方法 |
JP4286124B2 (ja) * | 2003-12-22 | 2009-06-24 | 三洋電機株式会社 | 画像信号処理装置 |
KR100613912B1 (ko) * | 2004-01-26 | 2006-08-17 | 엘지전자 주식회사 | 영상 처리 장치 및 그 방법 |
JP4250595B2 (ja) * | 2004-02-16 | 2009-04-08 | キヤノン株式会社 | 信号処理方法及び信号処理回路 |
JP4387220B2 (ja) * | 2004-02-24 | 2009-12-16 | 株式会社日立製作所 | 映像表示方法及びその装置 |
KR100609155B1 (ko) * | 2004-03-22 | 2006-08-02 | 엘지전자 주식회사 | 영상 처리 장치 및 이를 이용한 역광 보정 방법 |
KR100610478B1 (ko) * | 2004-05-06 | 2006-08-08 | 매그나칩 반도체 유한회사 | 이미지센서 및 그의 디지털 이득 보상 방법 |
KR100579883B1 (ko) * | 2004-05-21 | 2006-05-15 | 삼성전자주식회사 | 노이즈처리가 가능한 감마보정장치 및 감마보정방법 |
WO2006006373A1 (ja) * | 2004-07-07 | 2006-01-19 | Nikon Corporation | 画像処理装置およびコンピュータプログラム製品 |
KR100600991B1 (ko) * | 2004-12-15 | 2006-07-13 | 주식회사 팬택앤큐리텔 | 플래시 자동 제어 기능을 가지는 무선통신 단말기 및 그방법 |
JP4622629B2 (ja) * | 2005-03-31 | 2011-02-02 | 株式会社ニコン | 撮像装置 |
JP2006333202A (ja) * | 2005-05-27 | 2006-12-07 | Matsushita Electric Ind Co Ltd | 映像信号処理装置、および映像信号処理方法 |
US8103119B2 (en) * | 2005-06-20 | 2012-01-24 | Nikon Corporation | Image processing device, image processing method, image processing program product, and image-capturing device |
JP4419933B2 (ja) * | 2005-08-26 | 2010-02-24 | ソニー株式会社 | 画像処理装置、画像表示装置および画像処理方法 |
JP2007142500A (ja) * | 2005-11-14 | 2007-06-07 | Pioneer Electronic Corp | 表示装置、信号処理回路、プログラム及び表示方法 |
US20070153117A1 (en) * | 2005-12-30 | 2007-07-05 | Yen-Yu Lin | Apparatus and method for adjusting display-related setting of an electronic device |
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JP4835525B2 (ja) * | 2007-07-04 | 2011-12-14 | ソニー株式会社 | 画像処理装置、画像処理方法及びプログラム |
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KR102051538B1 (ko) * | 2013-09-13 | 2020-01-08 | 에스케이하이닉스 주식회사 | 신호 처리 장치 및 그의 동작 방법 |
CN104021761B (zh) | 2014-05-30 | 2016-03-09 | 京东方科技集团股份有限公司 | 一种显示器件的亮度补偿方法、装置及显示器件 |
CN104021773B (zh) * | 2014-05-30 | 2015-09-09 | 京东方科技集团股份有限公司 | 一种显示器件的亮度补偿方法、亮度补偿装置及显示器件 |
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US10951859B2 (en) | 2018-05-30 | 2021-03-16 | Microsoft Technology Licensing, Llc | Videoconferencing device and method |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6196876A (ja) * | 1984-10-17 | 1986-05-15 | Matsushita Electric Ind Co Ltd | ビデオカメラの利得制御装置 |
JPH0396078A (ja) * | 1989-09-08 | 1991-04-22 | Hitachi Ltd | 輪郭補正回路 |
JPH04340875A (ja) * | 1991-05-17 | 1992-11-27 | Mitsubishi Electric Corp | 撮像装置 |
JPH04363976A (ja) * | 1991-06-11 | 1992-12-16 | Matsushita Electric Ind Co Ltd | 映像信号の階調変換装置 |
JPH0575896A (ja) * | 1991-09-10 | 1993-03-26 | Mitsubishi Electric Corp | ビデオカメラの映像信号利得制御装置 |
JPH0670228A (ja) * | 1992-08-17 | 1994-03-11 | Matsushita Electric Ind Co Ltd | アパーチャ補正回路 |
JPH06253176A (ja) * | 1993-02-24 | 1994-09-09 | Matsushita Electric Ind Co Ltd | 階調補正回路及び撮像装置 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55135483A (en) * | 1979-04-09 | 1980-10-22 | Toshiba Corp | Color television camera device |
JPH02275587A (ja) * | 1989-04-18 | 1990-11-09 | Fuji Photo Film Co Ltd | 医療用画像表示装置 |
US5194960A (en) * | 1990-03-05 | 1993-03-16 | Konica Corporation | Optical image signal control device |
US5221963A (en) * | 1990-03-31 | 1993-06-22 | Minolta Camera Kabushiki Kaisha | Video camera having a video signal processing apparatus |
JPH0486074A (ja) * | 1990-07-30 | 1992-03-18 | Sony Corp | ビデオ撮像装置 |
JPH0494272A (ja) * | 1990-08-09 | 1992-03-26 | Canon Inc | 撮像装置 |
DE69414153T2 (de) * | 1993-02-24 | 1999-06-10 | Matsushita Electric Ind Co Ltd | Vorrichtung zur Gradationskorrektur und Bildaufnahmegerät mit einer solchen Vorrichtung |
JP3937458B2 (ja) * | 1993-03-05 | 2007-06-27 | キヤノン株式会社 | 撮像装置 |
-
1995
- 1995-09-29 US US08/809,714 patent/US6040860A/en not_active Expired - Fee Related
- 1995-09-29 EP EP95932941A patent/EP0784399B1/en not_active Expired - Lifetime
- 1995-09-29 DE DE69534929T patent/DE69534929T2/de not_active Expired - Fee Related
- 1995-09-29 WO PCT/JP1995/001990 patent/WO1996010886A1/ja active IP Right Grant
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6196876A (ja) * | 1984-10-17 | 1986-05-15 | Matsushita Electric Ind Co Ltd | ビデオカメラの利得制御装置 |
JPH0396078A (ja) * | 1989-09-08 | 1991-04-22 | Hitachi Ltd | 輪郭補正回路 |
JPH04340875A (ja) * | 1991-05-17 | 1992-11-27 | Mitsubishi Electric Corp | 撮像装置 |
JPH04363976A (ja) * | 1991-06-11 | 1992-12-16 | Matsushita Electric Ind Co Ltd | 映像信号の階調変換装置 |
JPH0575896A (ja) * | 1991-09-10 | 1993-03-26 | Mitsubishi Electric Corp | ビデオカメラの映像信号利得制御装置 |
JPH0670228A (ja) * | 1992-08-17 | 1994-03-11 | Matsushita Electric Ind Co Ltd | アパーチャ補正回路 |
JPH06253176A (ja) * | 1993-02-24 | 1994-09-09 | Matsushita Electric Ind Co Ltd | 階調補正回路及び撮像装置 |
Non-Patent Citations (1)
Title |
---|
See also references of EP0784399A4 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0871329A3 (en) * | 1997-03-14 | 1999-04-28 | Matsushita Electric Industrial Co., Ltd. | An imaging apparatus |
EP0866608A3 (en) * | 1997-03-18 | 1999-05-12 | Matsushita Electric Industrial Co., Ltd. | Method for correcting luminance gradation in an image pickup apparatus |
Also Published As
Publication number | Publication date |
---|---|
US6040860A (en) | 2000-03-21 |
EP0784399A4 (en) | 1999-10-06 |
DE69534929D1 (de) | 2006-05-24 |
DE69534929T2 (de) | 2006-11-16 |
EP0784399B1 (en) | 2006-04-12 |
EP0784399A1 (en) | 1997-07-16 |
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