WO1994011854A1 - Processing of signals for interlaced display - Google Patents
Processing of signals for interlaced display Download PDFInfo
- Publication number
- WO1994011854A1 WO1994011854A1 PCT/GB1993/002308 GB9302308W WO9411854A1 WO 1994011854 A1 WO1994011854 A1 WO 1994011854A1 GB 9302308 W GB9302308 W GB 9302308W WO 9411854 A1 WO9411854 A1 WO 9411854A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- signal
- processing means
- signal processing
- pixel
- filter
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/02—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
- G09G5/04—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed using circuits for interfacing with colour displays
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
- G09G1/06—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows
- G09G1/14—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam tracing a pattern independent of the information to be displayed, this latter determining the parts of the pattern rendered respectively visible and invisible
- G09G1/16—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam tracing a pattern independent of the information to be displayed, this latter determining the parts of the pattern rendered respectively visible and invisible the pattern of rectangular co-ordinates extending over the whole area of the screen, i.e. television type raster
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0224—Details of interlacing
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
Definitions
- This invention relates to a signal processing means for processing a signal which is suitable for use on an interlaced display device, such as a low-cost monitor, a television set or to record as a recorded TV video signal.
- the signal will often contain fine detail, such as that which is present in a computer graphics signal.
- the invention is concerned with reducing flicker in an interlaced display.
- Converters which have an input to receive a computer graphics signal having a higher horizontal scanning rate, and an output for providing an output signal at a low horizontal scanning rate suitable for use as a TV video signal, the low rate being exactly half the high rate.
- the inventive signal processing means may be used in conjunction with such a converter, or the signal processing means may be incorporated in the converter.
- the computer graphics output signal is often generated as a non-interlaced signal at twice the usual horizontal scanning rate of a TV standard having the same number of total scan lines.
- the signal processing means can be arranged to store in memory several lines of the computer graphics output for processing, and then to output the processed line at substantially half the scanning rate of the graphics signal in interlaced mode, to provide the TV video signal .
- the synchronising pulses required for television are generally different from those incorporated in the computer graphics signal but are related in timing.
- the signal processing means preferably comprises conversion means arranged to generate television synchronising pulses which are configured according to the appropriate standards, such as those employed for NTSC, SECAM and PAL.
- the TV video signal will normally contain both luminance and chrominance signals, for a colour display.
- the synchronising pulses and the red, green and blue computer graphics signals can be mixed to give the required TV signals by using standard integrated circuits.
- Anti-flicker filters have been designed that balance the brightness of the odd and even fields by applying a digital filter on pixels along the direction perpendicular to the scanline direction. For normal TVs, scanlines are horizontal. Hence, the anti-flicker filters are applied vertically.
- One method known from prior art (see filter shape 1 in Figure 4) adds half the brightness of the pixel above with half the brightness of the current pixel. In this case, each bright pixel or horizontal line segment in a dark background (or dark pixel or horizontal line segment in a bright background), appears to move up and down by one pixel at the field frequency.
- a better method also known from prior art, (see filter shape 2 in Figure 5) adds £ the brightness of the pixel above and below to avoid this effect for long horizontal lines.
- Any such anti -flicker filter based on a one-dimensional digital filter has to strike a trade-off between vertical resolution and the degree of flicker suppression.
- a low-pass traditional two-dimensional filter can also reduce flicker at the cost of resolution.
- a two-dimensional filter in accordance with the invention preserves resolution in most cases while suppressing flicker by applying low-pass filtering to pixels of the other field (odd or even) before mixing with pixels of the current field (even or odd).
- a signal processing means ut lising either software or hardware, has an input to receive an image with fine detail and an output for providing an image suitable for use as an interlaced video signal, the signal processing means being arranged to generate the output for a current line by adding a component produced from the graphics signal of adjacent lines to the current line, the component being produced by subjecting the graphics signal of the adjacent lines to a low-pass filter means, before being added to the current line.
- a signal processing means is capable of substantially reducing flicker in the display of an interlaced video signal yet preserving fine details from the graphics signal.
- the total weight of the low-passed signal is preferably arranged to be no greater than that of the weight of the centre pixel after processing, such that detail in the graphics signal used in one field (odd or even) of the interlaced output signal is not masked by the intensity of the signal contributed from the other field (even or odd respectively).
- output for each field say the odd field
- lines of the video signal are created by summing a reduced intensity version of the current field which is the odd field and the filtered versions of the immediately adjacent even field lines, the filtering means comprising a low-pass filter means which derives a low frequency Fourier component of the even field lines that represent the brightness of the even field lines but not the fine details.
- Figure 1 is a display of a graphics signal prior to processing by a signal processing means in accordance with the invention
- Figure 2 is a display of the graphics signal used for Figure 1, but after subjecting the graphics signal to a signal processing means in accordance with the invention and which incorporates a filter having the characteristics of Figure 3,
- FIG 3 is a chart showing a filter character stic, and the effect of applying the filter to a single pixel signal in line n, Prior art filter characteristics have been described above with reference to Figures 4 and 5 in which:
- Figure 4 is a chart showing a simple filter characteristic
- Figure 5 is a chart showing an improved simple filter characteristic.
- the interlaced scan-lines of the interlaced video signal are generated by addition of a low-passed version of the line above and below of the unprocessed graphics signal to the current line of the graphics signal .
- the screen appears to be refreshing at the field rate (50Hz for PAL and 60Hz for NTSC) rather than the frame rate (25Hz for PAL and 30Hz for NTSC ) and is more stable.
- the field rate 50Hz for PAL and 60Hz for NTSC
- the frame rate 25Hz for PAL and 30Hz for NTSC
- the filtering of the signal can be done either by software or hardware. If done by software, a plain video converter which performs direct RGB to composite signal conversion can be used to get a stable and sharp image. If done by hardware, it can generate stable and sharp output on a TV even for thin characters.
- Low cost analogue filters implemented with discrete components and linear integrated circuits can be used to low-pass and mix the simultaneously generated video signal in the odd and even field. If the pixel data in digital format is taken at video rate, digital filter integrated circuits can be employed to implement the filter before digital to analogue conversion.
- Figure 3 shows one suitable filter characteristic. The rectangular cells represent individual pixels, and the values inside represent the weights of the filter for the various neighbouring pixels. It can be implemented by software or digital filter easily.
- the filter of Figure 3 gives half weight of the unprocessed pixel intensity to the centre pixel, and the remaining half of the weight is distributed as a modulation over a short segment in each of the lines above and below of the TV video signal.
- a single bright pixel will appear as a pixel of half the maximum brightness and as two dispersed line segments of low brightness, in the lines above and below.
- What is seen on the screen is still a sharp pixel since the two dispersed dim segments are less noticeable. Since the total brightness this pixel generates in the two fields is the same over a small region covering the span of the filter, it is observed as flashing at the field rate rather than the frame rate. Without this filtering, it is observed as flashing at the frame rate because the pixel is displayed in one field but not the other.
- Reference 1 of Figure 1 shows the extreme case of alternating black and white lines which will flicker seriously without the filtering.
- part of an image consists of alternating black and white horizontal lines substantially longer than a few pixels
- stability of the image is obtained using the exemplary filter at the cost of reducing this area into a uniform grey except near the ends of the lines, as shown at 4 in Figure 2. he uniform grey appears not to flicker.
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU54287/94A AU5428794A (en) | 1992-11-10 | 1993-11-09 | Processing of signals for interlaced display |
EP93924731A EP0669035A1 (en) | 1992-11-10 | 1993-11-09 | Processing of signals for interlaced display |
JP6511846A JPH11503835A (en) | 1992-11-10 | 1993-11-09 | Signal processing for interlaced display |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB929223492A GB9223492D0 (en) | 1992-11-10 | 1992-11-10 | Processing of signals for interlaced display |
GB9223492.1 | 1992-11-10 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1994011854A1 true WO1994011854A1 (en) | 1994-05-26 |
Family
ID=10724800
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/GB1993/002308 WO1994011854A1 (en) | 1992-11-10 | 1993-11-09 | Processing of signals for interlaced display |
Country Status (7)
Country | Link |
---|---|
EP (1) | EP0669035A1 (en) |
JP (1) | JPH11503835A (en) |
CN (1) | CN1053779C (en) |
AU (1) | AU5428794A (en) |
CA (1) | CA2148792A1 (en) |
GB (1) | GB9223492D0 (en) |
WO (1) | WO1994011854A1 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1996010887A1 (en) * | 1994-09-30 | 1996-04-11 | Cirrus Logic, Inc. | Flicker reduction and size adjustment for video controller with interlaced video output |
EP0751682A2 (en) * | 1995-06-30 | 1997-01-02 | Mitsubishi Denki Kabushiki Kaisha | Scan conversion apparatus with improved vertical resolution and flicker reduction apparatus |
US5611041A (en) * | 1994-12-19 | 1997-03-11 | Cirrus Logic, Inc. | Memory bandwidth optimization |
US7535450B2 (en) | 2002-02-19 | 2009-05-19 | Thomson Licensing | Method and apparatus for sparkle reduction using a split lowpass filter arrangement |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4843380A (en) * | 1987-07-13 | 1989-06-27 | Megatek Corporation | Anti-aliasing raster scan display system |
WO1990007767A1 (en) * | 1988-12-23 | 1990-07-12 | Apple Computer, Inc. | Vertical filtering apparatus for raster scanned display |
US5097257A (en) * | 1989-12-26 | 1992-03-17 | Apple Computer, Inc. | Apparatus for providing output filtering from a frame buffer storing both video and graphics signals |
EP0492696A1 (en) * | 1990-12-21 | 1992-07-01 | Koninklijke Philips Electronics N.V. | Method and apparatus for the graphic reproduction of a symbol with an adjustable scale and position |
-
1992
- 1992-11-10 GB GB929223492A patent/GB9223492D0/en active Pending
-
1993
- 1993-11-09 AU AU54287/94A patent/AU5428794A/en not_active Abandoned
- 1993-11-09 WO PCT/GB1993/002308 patent/WO1994011854A1/en not_active Application Discontinuation
- 1993-11-09 EP EP93924731A patent/EP0669035A1/en not_active Withdrawn
- 1993-11-09 JP JP6511846A patent/JPH11503835A/en active Pending
- 1993-11-09 CA CA 2148792 patent/CA2148792A1/en not_active Abandoned
- 1993-11-10 CN CN93112935A patent/CN1053779C/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4843380A (en) * | 1987-07-13 | 1989-06-27 | Megatek Corporation | Anti-aliasing raster scan display system |
WO1990007767A1 (en) * | 1988-12-23 | 1990-07-12 | Apple Computer, Inc. | Vertical filtering apparatus for raster scanned display |
US5097257A (en) * | 1989-12-26 | 1992-03-17 | Apple Computer, Inc. | Apparatus for providing output filtering from a frame buffer storing both video and graphics signals |
EP0492696A1 (en) * | 1990-12-21 | 1992-07-01 | Koninklijke Philips Electronics N.V. | Method and apparatus for the graphic reproduction of a symbol with an adjustable scale and position |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1996010887A1 (en) * | 1994-09-30 | 1996-04-11 | Cirrus Logic, Inc. | Flicker reduction and size adjustment for video controller with interlaced video output |
US5510843A (en) * | 1994-09-30 | 1996-04-23 | Cirrus Logic, Inc. | Flicker reduction and size adjustment for video controller with interlaced video output |
US5611041A (en) * | 1994-12-19 | 1997-03-11 | Cirrus Logic, Inc. | Memory bandwidth optimization |
EP0751682A2 (en) * | 1995-06-30 | 1997-01-02 | Mitsubishi Denki Kabushiki Kaisha | Scan conversion apparatus with improved vertical resolution and flicker reduction apparatus |
EP0751682A3 (en) * | 1995-06-30 | 1998-10-07 | Mitsubishi Denki Kabushiki Kaisha | Scan conversion apparatus with improved vertical resolution and flicker reduction apparatus |
EP1307056A1 (en) * | 1995-06-30 | 2003-05-02 | Mitsubishi Denki Kabushiki Kaisha | Scan conversion apparatus with improved vertical resolution and flicker reduction apparatus |
US7535450B2 (en) | 2002-02-19 | 2009-05-19 | Thomson Licensing | Method and apparatus for sparkle reduction using a split lowpass filter arrangement |
Also Published As
Publication number | Publication date |
---|---|
CN1053779C (en) | 2000-06-21 |
CN1090694A (en) | 1994-08-10 |
JPH11503835A (en) | 1999-03-30 |
EP0669035A1 (en) | 1995-08-30 |
GB9223492D0 (en) | 1992-12-23 |
CA2148792A1 (en) | 1994-05-26 |
AU5428794A (en) | 1994-06-08 |
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