WO1993019488A1

WO1993019488A1 - Surface mountable integrated circuit package

Info

Publication number: WO1993019488A1
Application number: PCT/US1993/002042
Authority: WO
Inventors: Boris Levit
Original assignee: National Semiconductor Corporation
Priority date: 1992-03-23
Filing date: 1993-03-05
Publication date: 1993-09-30

Abstract

A surface-mountable integrated circuit package having leads arranged in a manner enabling the package to be manufactured with high yield but with reduced pitch between adjacent leads. The circuit package of the invention includes a body (60), and alternating first and second sets (62 and 68) of leads connected along an edge of the body. Each lead (68) in the first set is formed so that its tip extends a first distance from the body. Each lead (66) in the second set is formed so that its tip extends a second distance (substantially different than the first distance) from the body. Even if the leads are mounted with very small pitch, the separation of the tips of adjacent leads will be substantially greater than the pitch. For this reason, the package can be manufactured with high yield and reduced pitch, and shipped with formed leads with only a low risk that the leads will be accidentally bent into electrical contact with each other and without the need to enclose individual packages in individual protective cases for shipment. In a preferred embodiment, the invention includes a first set of leads having a gull-wing configuration alternating with a second set of leads having a J-bend configuration (91). In another preferred embodiment, leads having a gull-wing configuration alternate with leads having an L-bend configuration (101).

Description

SURFACE MOUNTABLE INTEGRATED CIRCUIT PACKAGE

Field of the Invention

This invention relates to an integrated circuit package suitable for mounting on the surface of a circuit board. More particularly, the invention is a surface- ountable integrated circuit package having leads arranged in a manner enabling the package to be manufactured with high yield but with reduced pitch between adjacent leads.

Background of the Invention

Examples of conventional integrated circuit packages include those known as plastic leaded chip carriers (PLCCs) , quad flat packages (QFPs) , small outline integrated circuit (SOIC) packages, and "Tape Pak" packages.

A side view of a PLCC package is shown in Figure 1. As shown in Fig. 1, rows of J-shaped leads 10 extend from opposite sides of the package body 12, and curl below the body. PLCC packages have four rows of J-shaped leads, each row extending from a different side of a square package body.

A side view of a QFP package is shown in Fig. 2. Rows of leads 20 protrude from opposite sides of the package body 22 (which is typically made of plastic or ceramic material) . Each of leads 20 has a gull- wing shape, with a shoulder portion attached to body 22 (in a substantially horizontal orientation) , a substantially horizontal tip portion, and a skew portion between the shoulder and tip portions. The tip portion of each lead is typically oriented at an angle of approximately up to ten degrees with respect to bottom face 22a of body 22, so that the leads can be readily mounted to the surface of a circuit board. For example, the tip portion of each lead 20 can be oriented parallel to the bottom face 22a.

The center-to-center distance between adjacent leads of packaged integrated circuits (i.e., the distance between parallel center lines of adjacent leads, when the leads are oriented parallel to each other) is known as the "pitch" of the leads.

A typical QFP package has a square or rectangular package body with a row of leads extending from each side. All the leads have the same pitch. Figures 2B and 4 are partial top views of an example of this type of QFP package.

The trend in conventional integrated circuit design is toward an increased number of leads (today, typical designs include up to 408 leads per package) . With such large lead counts, conventional QFP package sizes have become very large, reaching almost 2 inch x 2 inch dimensions. It would be desirable to manufacture such circuits with smaller package bodies (i.e., smaller footprint) by decreasing pitch. An example of a package having such a "decreased pitch" is shown in partial top view in Figures 2A and 3. Although it would be desirable to decrease the pitch of conventional packaged circuits to achieve smaller footprint without reducing the total number of leads. Conventional packaged circuits with decreased pitch are subject to more frequent occurrence of undesirable electrical contact between adjacent leads. The reason for this undesirable phenomenon will become apparent from the following discussion of Figs. 2A, 2B, 3, and 4.

Leads 40 of the QFP package shown in Figs. 2B and 4 have pitch equal to 25 mils (25/1000 inch) , and each lead 40 has a width of 12 mils, in conformity with the well known JEDEC standard for integrated circuit packaging. It is common for QFP products to ave pitch in the range from 25 to 31 mils. Each lead 40 has a shoulder portion 40a adjacent to package body 42 and a tip portion 40b (the portion of lead 40 farthest from body 42). If adjacent leads 40 are bent toward each other during manufacture as shown in Fig. 4, with the center of the tip portion 40b of each lead offset by four mils from the center of its shoulder portion 40a, the tip portions 40b will be separated by only five mils. This five mil separation may be sufficient to prevent adjacent leads 40 from accidentally being further bent into electrical contact with each other (for example, during mounting of the circuit to a circuit board) . However, there is significant risk that the leads may be accidentally bent into electrical contact with each other (or otherwise accidentally damaged) after the manufacturing process, and that manufacturing tolerances will result in significant yield loss due to excessively bent leads. However, the risks of high yield loss and accidental product damage are even greater for packages of the type shown in Figs. 2A and 3, which have even smaller pitch. The package of Figs. 2A and 3 comprises thin leads 30 (each having width 11 mils) and body 32, and has a pitch of 19.7 mils (19.7/1000 inch) , so that the tip portions 30b of adjacent leads 30 are separated by a nominal distance of only 8.7 mils (as shown in Fig. 2A) . If two adjacent leads 30 are bent toward each other (during manufacture or subsequent handling) as shown in Fig. 3 by such an amount that the center of each lead's tip portion 30b is offset by four mils from the center of its shoulder portion 30a (the same degree of bending as shown in Fig. 4) , the tip portions 30b of leads 30 will be separated by only 0.7 mil. This 0.7 mil separation is almost certain to be inadequate to prevent adjacent leads 30 from being accidentally bent further into electrical contact with each other or otherwise damaged (for example, during mounting of the circuit to a circuit board) . It is also likely that very high yield loss rates will occur during manufacturing due to excessively bent leads.

It is apparent from Figs. 2A and 3 that a consequence of semiconductor industry standards which allow a manufacturing tolerance of four mils for lead side bending ("sweep") is that conventional packaged circuits cannot practically be manufactured with leads whose edges are separated by less than about ten mils (such as leads 30 of Fig. 2A) . Thus, to produce conventionally packaged circuits having increased numbers of leads, it will be necessary to increase the size (footprint) of the circuits. This is a serious barrier to progress in the areas of computer miniaturization and reduced computing time. Conventional packages having leads on two sides are sometimes referred to as SOIC packages (or as VSOP packages, if they have smaller pitch) . These packages have gull-wing leads as in Fig. 2. All conventional SOIC and VSOP packages are subject to the above-described problem, of excessive bending of adjacent leads, to the extent that they have reduced pitch.

Some conventional packaged integrated circuits have very thin and narrow leads, and very small pitch (in order to achieve reduced footprint) . For example, a conventional integrated circuit having a package known as a "Tape Pak" package has a lead frame thickness of only 2.75 mils, and thus has very delicate, flexible leads. These very delicate circuits must be elaborately protected to prevent undesired lead bending during handling, and they cannot be shipped with formed leads. Instead, each circuit of this conventional type must be shipped with unformed (straight) leads extending perpendicularly from the package body parallel to the plane of the body's top face, and mounted in a specially-designed protective ring. After shipment, the circuit must be removed from the protective ring and the leads then formed at the customer's facility. Another problem with conventional Tape Pak products manufactured with very thin lead frame (e.g., 2.75 mils) and small pitch (e.g., 20 mils) is that there is a very high yield loss during manufacturing, due to the frequent occurrence of excessively bent leads.

Until the present invention, it was not known how to package integrated circuits with decreased pitch between adjacent leads (to achieve reduced footprint for a given number of leads) in such a manner that the packaged circuits can be manufactured with high yield, for shipment with formed leads (to eliminate the need for customers to form leads at their own facilities) with low risk of excessive lead bending during shipping and handling, and without the need to enclose each packaged circuit in its own protective case.

Summary of the Invention The invention is a surface-mountable integrated circuit package having leads arranged in a manner enabling the package to be manufactured with high yield but with reduced pitch between adjacent leads. The inventive circuit package includes a body, and alternating first and second sets of leads connected along at least one edge of the body. Each lead in the first set is formed so that its tip extends a first distance from the body. Each lead in the second set is formed so that its tip extends a second distance (substantially different than the first distance) fro the body. Even if the leads are mounted with very small pitch, the separation of the tips of adjacent leads will be substantially greater than the pitch. For this reason, the package can be manufactured with high yield and reduced pitch, and shipped with formed leads with a low risk that the leads will be accidentally bent into electrical contact with each other (and without the need to enclose individual packages in individual protective cases for shipment) .

In a preferred embodiment, the invention includes a first set of leads having a gull-wing configuration alternating with a second set of leads having a J-bend configuration. In another preferred embodiment, leads having a gull-wing configuration alternate with leads having an L-bend configuration.

Integrated circuit packages that embody the invention can be manufactured with high yield to have a very small footprint and a pitch of 15 mils or less.

Brief Description of the Figures

Figure 1 is a side elevational view of a conventional package of the PLCC type.

Figure 2 is a side elevational view of a conventional package of the QFP type.

Figure 2A is a top view of a portion of a conventional QFP package.

Figure 2B is a top view of a portion of a conventional QFP package. Figure 3 is a top view of a portion of a conventional QFP package with bent leads.

Figure 4 is a top view of a portion of a conventional QFP package with bent leads. Figure 5 is a perspective view of a first preferred embodiment of the inventive integrated circuit package.

Figure 6 is a diagram representing a top view of 5 five leads of an integrated circuit package embodying the invention.

Figure 7 is a diagram representing a top view of five leads of an integrated circuit package embodying the invention. 10 Figure 8 is a top view of a second preferred embodiment of the inventive integrated circuit package.

Figure 9 is a top view of a third preferred embodiment of the inventive integrated circuit 15 package.

Figure 10 is a top view of a conventional integrated circuit package which has the same number of leads as does the package of Fig. 9.

Figure 11 is a side cross-sectional view of an 20 assembly including a fourth preferred embodiment of the inventive integrated circuit package, and top and bottom trays designed for shipping the package.

Figure 12 is a side cross-sectional view of an assembly including a fifth preferred embodiment of 25 the inventive integrated circuit package, and top and bottom trays designed for shipping the package.

Detailed Description of the Preferred Embodiment Although the invention includes a body, and electrical leads which extend out from the body, and

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30 is referred to as a packaged integrated circuit or an integrated circuit package, the invention need not include any particular type of electronic circuit within the body. Rather, the body of the invention can include any type of electronic circuit in

35 electrical contact with the leads. The invention will sometimes be referred to herein as a "combo chip" because it includes a combination of two types of leads, but this expression is not intended to imply that the invention includes any particular type of electronic circuit.

The preferred embodiment of the inventive combo chip shown in Fig. 5 includes a body 50, a first set of leads 52 (each having a J-bend shape) alternating with a second set of leads 54 (each having a gull- wing shape) along one edge of body 50, and a third set of leads 56 (each having a J-bend shape) alternating with a fourth set of leads 58 (each having a gull-wing shape) along another edge of body 50 (and similar sets of leads, not shown, along the other two edges of body 50) . The tips of each lead 52 and 56 lie under body 50, while the tips of each lead 54 and 58 extend far from body 50. The tips of each pair of adjacent leads 52 and 54 (or 56 and 58) are thus separated by a distance much greater than the separation ("pitch") , P, between them at their points of connection to body 50.

Figures 6 and 7 represent top views of five adjacent leads of the combo chip of Fig. 5. Leads 52 and 54 shown in Figs. 6 and 7 have pitch equal to 15 mils (15/1000 inch) . Each of leads 52 and 54 has a width of 12 mils. Each lead 54 has a shoulder portion 53 adjacent to the package body (not shown) and a tip portion 55 farthest from the package body. The distance between adjacent tips 55 is thus 30 mils (twice the pitch) .

If adjacent leads 54 are bent toward each other during manufacture (or subsequent handling) as shown in Fig. 7, by an amount such that the center of each tip 55 is offset by four mils from the center of its shoulder portion 53, the bent tips 55 will be separated by 10 mils. This 10 mil separation will likely be sufficient to prevent the leads from accidentally being further bent into electrical contact with each other (for example, during mounting of the circuit to a circuit board) . Like gull-wing shaped leads 54, J-shaped leads 52 can also be significantly misaligned or bent during manufacture without rendering the packaged circuit unusable (due to the problem of electrical contact between bent leads) . It will be apparent from Fig. 7 that the inventive packaged circuit can be manufactured without high yield loss, even with loose manufacturing tolerances on the alignment of leads 52 and 54.

The packaged circuit of Fig. 5 is surface- mountable, in the sense that the lowest portions of its leads are all arranged in substantially the same plane, so that the leads can be conveniently soldered to one face of a printed circuit board. The "lowest portions" of the leads are the tip portions of leads 54 and 58 (farthest from body 50) , and the curved portions 52a and 56a (of leads 52 and 56) whose tangents are parallel to the top and bottom faces of body 50.

Figure 8 is a top view of a second preferred embodiment of the invention. The Fig. 8 embodiment includes body 60 and two rows of alternating inward- bending and outward-bending leads (along any two opposite sides of body 60) . Along one side, outward- bending leads 64 alternate with inward-bending leads 62. Along the opposite side, outward-bending leads 68 alternate with inward-bending leads 66.

Figure 9 is a top view of a third preferred embodiment of the invention, which includes body 70, and four rows of alternating inward-bending and outward-bending leads connected along the edges of body 70. As an example, each row consists of thirty- three leads (sixteen outward-bending leads 74 alternating with seventeen inward-bending leads 72) , so that the packaged circuit of Fig. 9 has a total of 132 leads. Fig. 10 represents a QFP product having body 80 and gull-wing-shaped leads 82, which includes the same total number of leads as does the Fig. 9 circuit. Figures 9 and 10 represent packaged circuits that can be manufactured with the same yield, assuming that the same tolerance in lead side bending applies to both circuits (e.g., a tolerance of four mil maximum offset between the centers of each lead's tip and shoulder portions) . The pitch of the Fig. 9 circuit is substantially smaller than that of Fig. 10. As a result, the length of each edge of the Fig. 9 circuit is about 64% of the length of each edge of the Fig. 10 circuit, and the footprint of the Fig. 9 circuit is only about 40% of the Fig. 10 footprint. In variations on the Fig. 8 and Fig. 9 embodiments, the leads can have any of a variety of different shapes. For example, leads 62, 66, or 72, can be L-shaped or J-shaped, and leads 64, 68, or 74, can be L-shaped or J-shaped (provided that they face in the opposite directions as do the leads 62, 66, or 72 nearest thereto) , or gull-wing-shaped.

Tray assemblies, each for shipping a plurality of the combo chips of the invention, will next be described with reference to Figures 11 and 12.

Figure 11 is a side cross-sectional view of a portion of one such tray assembly, which is dimensioned for shipping one or more parallel rows of identical combo chips. Each such combo chip comprises a body 90 and two rows of alternating outward-bending leads 93 (having gull-wing shape) and inward-bending, J-shaped leads 91. As shown in Fig. 11, leads 91 and 93 are all substantially coplanar where they extend out from the sides of body 90. The lower end of each lead 91 fits in one of grooves 98 in the bottom face of body 90.

Bottom tray 94 has one or more rows of platforms 95 (with one or more platforms in each row) . Each row of platforms 95 is arranged along a longitudinal axis oriented perpendicular to the plane of Fig. 11. Each platform 95 is dimensioned for supporting one of the identical bodies 90. Bottom tray 94 also has a recessed portion 94a around each platform 95. Of the four side walls 96 of recessed portion 94a, only two are visible in Fig. 11. Each recessed portion 94a is dimensioned to receive leads 91 and 93 (without bending them) when a body 90 rests on platform 95. Top tray 92 has recessed portions 97, each dimensioned to receive the top face of a body 90 resting on a platform 95. Thus, with top and bottom trays 92 and 94 held together by an elastic band 99 (or other fastening means) , one or more rows of chip bodies 90 can be constrained between them. The assembled trays will protect the leads 91 and 93 from damage, without themselves exerting any bending force on the leads.

Figure 12 is a side cross-sectional view of a portion of a slightly different tray assembly, dimensioned for shipping one or more parallel rows of identical combo chips. Each such combo chip comprises a body 100 and two rows of alternating outward- bending leads 103 (having gull-wing shape) and inward-bending, L-shaped leads 101. Bottom tray 104 has one or more rows of platforms 105 (with one or more platforms in each row) . Each row of platforms 105 is arranged along a longitudinal axis oriented perpendicular to the plane of Fig. 12. Each platform 105 is dimensioned for supporting one of identical bodies 100. Bottom tray 104 also has a recessed portion 104a around each platform 105. Of the four side walls 106 of portion 104a, only two are visible in Fig. 12. Each recessed portion 104a is dimensioned to receive leads 101 and 103 (without bending them) when a body 100 rests on platform 105.

Top tray 102 has one or more recessed portions 107, each dimensioned to receive and constrain the top face of a body 100 at rest on platform 105. Thus, with top and bottom trays 102 and 104 held together by an elastic band 109 (or other fastening means) , one or more rows of chip bodies 100 can be constrained between them. The assembled trays will protect the leads 101 and 103 from damage, without themselves exerting any bending force on the leads.

Trays 92, 94, 102, and 104 are preferably molded from plastic. In order to constrain two or more rows of identical combo chips, each bottom tray (94 or 104) is molded to have two or more substantially parallel rows of platforms (95 or 105) . In this class of embodiments, the corresponding top tray (92 or 102) should include a recess (97 or 107) for each platform (95 or 105) .

The invention not only permits construction of integrated circuit packages with reduced pitch, but also enables improvement and simplification of the process of metalization of traces and pads on PC boards, and improves the testability of packaged integrated circuits (by increasing the distance between the free ends of adjacent leads thereof) . Various modifications and alterations in the structure and shape of devices embodying this invention will be apparent to those skilled in the art without departing from the scope and spirit of this invention. Although the invention has been described in connection with specific preferred embodiments, it should be understood that the invention as claimed should not be unduly limited to such specific embodiments.

Claims

WHAT IS CLAIMED IS:

1. A packaged circuit, including: a body having an edge; a first lead having an inner end and a tip, wherein the inner end is connected to the edge at a first location, and wherein the tip extends a first distance from the body; a second lead having an inner end and a tip, wherein the inner end of the second lead is connected to the edge at a second location, and wherein the tip of the second lead extends a distance from the body substantially equal to the first distance; and a third lead having an inner end and a tip, wherein the inner end of the third lead is connected to the edge at a third location between the first location and the second location, wherein the tip of the first lead, the tip of the second lead, and the tip of the third lead are in a single first plane, wherein the first location, the second location, and the third location are all in a single second plane substantially parallel to the first plane, wherein the tip of the third lead extends a second distance from the body, and wherein the second distance is substantially different from the first distance.

2. The packaged circuit of claim 1, also including a fourth lead having an inner end and a tip, wherein the inner end of the fourth lead is connected to the edge at a fourth location, wherein the second location is between the third location and the fourth location, wherein the first location, the second location, the third location, and the fourth location are all substantially in the second plane, and wherein the tip of the fourth lead extends a distance from the body substantially equal to the second distance.

3. The packaged circuit of claim 1, wherein the third location is separated by a pitch distance from the first location and the third location is separated by said pitch distance from the second location.

4. The packaged circuit of claim 3, wherein said pitch distance is smaller than 15 mils.

5. The packaged circuit of claim 1, wherein the first lead and the second lead have a J-bend shape, and the third lead has a gull-wing shape.

6. The packaged circuit of claim 1, wherein the first lead and the second lead have an L-bend shape, and the third lead has a gull-wing shape.

7. A packaged integrated circuit, including: an integrated circuit body having a first edge; a first set of leads, wherein the leads in the first set are connected to the first edge at substantially coplanar first locations, wherein all the first locations are substantially in a single first plane, wherein each of the leads in the first set has an outer end which extends substantially a first distance from the body, and wherein all the outer ends of the leads in the first set are substantially in a single second plane parallel to the first plane; and a second set of leads, wherein the leads in the second set are connected to the first edge at second locations substantially coplanar with the first locations, wherein all the second locations are substantially in the first plane, wherein the second locations alternate with the first locations, wherein each of the leads in the second set has an outer end which extends substantially a second distance from the body, and wherein all the outer ends of the leads in the second set are substantially in the second plane.

8. The packaged integrated circuit of claim 7, wherein the body has a second edge opposite the first edge, and also including: a third set of leads, wherein the leads in the third set are connected to the second edge at third locations, and wherein each of the leads in the third set has an outer end which extends substantially a third distance from the body; and a fourth set of leads, wherein the leads in the fourth set are connected to the second edge at fourth locations, wherein the fourth locations alternate with the third locations, and wherein each of the leads in the fourth set has an outer end which extends substantially a fourth distance from the body.

9. The packaged integrated circuit of claim 8, wherein each of the first locations is separated from at least one of the second locations by a pitch distance, and wherein each of the third locations is separated from at least one of the fourth locations by the pitch distance.

10. The packaged integrated circuit of claim 9, wherein the pitch distance is smaller than 15 mils.

11. The packaged integrated circuit of claim 7, wherein the leads in the first set are inward- bending, and the leads in the second set are outward- bending.

12. The packaged integrated circuit of claim 7, wherein each of the leads in the first set has a J-shape, and each of the leads in the second set has a gull-wing shape.

13. The packaged integrated circuit of claim 7, wherein each of the leads in the first set has an L-shape, and each of the leads in the second set has a gull-wing shape.

14. A packaged circuit, including: body having a first side face which defines a plane; a first set of leads, wherein the leads in the first set are connected to the first side face at first locations, and wherein each of the leads in the first set has an outer end which extends substantially a first distance from the body in a first direction perpendicularly away from the plane; and a second set of leads, wherein the leads in the second set are connected to the first side face at second locations, wherein the second locations alternate with the first locations, wherein each of the leads in the second set has an outer end which extends substantially a second distance from the body in a second direction perpendicularly away from the plane, where said second direction is opposite to said first direction.

15. The packaged circuit of claim 14, wherein each of the leads in the first set has a J-shape, and each of the leads in the second set has a gull-wing shape.

16. The packaged circuit of claim 14, wherein each of the leads in the first set has an inward- bending L-shape, and each of the leads in the second set has a gull-wing shape.