USRE44355E1 - Method of forming a bump-on-lead flip chip interconnection having higher escape routing density - Google Patents
Method of forming a bump-on-lead flip chip interconnection having higher escape routing density Download PDFInfo
- Publication number
- USRE44355E1 USRE44355E1 US13/750,975 US201313750975A USRE44355E US RE44355 E1 USRE44355 E1 US RE44355E1 US 201313750975 A US201313750975 A US 201313750975A US RE44355 E USRE44355 E US RE44355E
- Authority
- US
- United States
- Prior art keywords
- interconnect
- die
- bump
- width
- bumps
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/13111—Tin [Sn] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/1605—Shape
- H01L2224/1607—Shape of bonding interfaces, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16238—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/75301—Bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/81201—Compression bonding
- H01L2224/81203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83856—Pre-cured adhesive, i.e. B-stage adhesive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01075—Rhenium [Re]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Abstract
Description
Claims (38)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/750,975 USRE44355E1 (en) | 2003-11-10 | 2013-01-25 | Method of forming a bump-on-lead flip chip interconnection having higher escape routing density |
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US51886403P | 2003-11-10 | 2003-11-10 | |
US53391803P | 2003-12-31 | 2003-12-31 | |
US10/985,654 US7368817B2 (en) | 2003-11-10 | 2004-11-10 | Bump-on-lead flip chip interconnection |
US12/062,293 US7700407B2 (en) | 2003-11-10 | 2008-04-03 | Method of forming a bump-on-lead flip chip interconnection having higher escape routing density |
US13/750,975 USRE44355E1 (en) | 2003-11-10 | 2013-01-25 | Method of forming a bump-on-lead flip chip interconnection having higher escape routing density |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/062,293 Reissue US7700407B2 (en) | 2003-11-10 | 2008-04-03 | Method of forming a bump-on-lead flip chip interconnection having higher escape routing density |
Publications (1)
Publication Number | Publication Date |
---|---|
USRE44355E1 true USRE44355E1 (en) | 2013-07-09 |
Family
ID=34594933
Family Applications (10)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/985,654 Active 2024-12-23 US7368817B2 (en) | 2003-11-10 | 2004-11-10 | Bump-on-lead flip chip interconnection |
US12/062,293 Ceased US7700407B2 (en) | 2003-11-10 | 2008-04-03 | Method of forming a bump-on-lead flip chip interconnection having higher escape routing density |
US12/716,455 Ceased US7973406B2 (en) | 2003-11-10 | 2010-03-03 | Bump-on-lead flip chip interconnection |
US13/088,647 Ceased US8188598B2 (en) | 2003-11-10 | 2011-04-18 | Bump-on-lead flip chip interconnection |
US13/464,979 Active US8558378B2 (en) | 2003-11-10 | 2012-05-05 | Bump-on-lead flip chip interconnection |
US13/556,106 Active USRE44431E1 (en) | 2003-11-10 | 2012-07-23 | Bump-on-lead flip chip interconnection |
US13/556,064 Active USRE44377E1 (en) | 2003-11-10 | 2012-07-23 | Bump-on-lead flip chip interconnection |
US13/750,975 Active USRE44355E1 (en) | 2003-11-10 | 2013-01-25 | Method of forming a bump-on-lead flip chip interconnection having higher escape routing density |
US13/756,779 Active USRE44524E1 (en) | 2003-11-10 | 2013-02-01 | Bump-on-lead flip chip interconnection |
US13/965,356 Active 2025-09-25 US9922915B2 (en) | 2003-11-10 | 2013-08-13 | Bump-on-lead flip chip interconnection |
Family Applications Before (7)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/985,654 Active 2024-12-23 US7368817B2 (en) | 2003-11-10 | 2004-11-10 | Bump-on-lead flip chip interconnection |
US12/062,293 Ceased US7700407B2 (en) | 2003-11-10 | 2008-04-03 | Method of forming a bump-on-lead flip chip interconnection having higher escape routing density |
US12/716,455 Ceased US7973406B2 (en) | 2003-11-10 | 2010-03-03 | Bump-on-lead flip chip interconnection |
US13/088,647 Ceased US8188598B2 (en) | 2003-11-10 | 2011-04-18 | Bump-on-lead flip chip interconnection |
US13/464,979 Active US8558378B2 (en) | 2003-11-10 | 2012-05-05 | Bump-on-lead flip chip interconnection |
US13/556,106 Active USRE44431E1 (en) | 2003-11-10 | 2012-07-23 | Bump-on-lead flip chip interconnection |
US13/556,064 Active USRE44377E1 (en) | 2003-11-10 | 2012-07-23 | Bump-on-lead flip chip interconnection |
Family Applications After (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/756,779 Active USRE44524E1 (en) | 2003-11-10 | 2013-02-01 | Bump-on-lead flip chip interconnection |
US13/965,356 Active 2025-09-25 US9922915B2 (en) | 2003-11-10 | 2013-08-13 | Bump-on-lead flip chip interconnection |
Country Status (5)
Country | Link |
---|---|
US (10) | US7368817B2 (en) |
JP (1) | JP4928945B2 (en) |
KR (3) | KR101249555B1 (en) |
TW (3) | TWI378516B (en) |
WO (1) | WO2005048311A2 (en) |
Families Citing this family (95)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10388626B2 (en) * | 2000-03-10 | 2019-08-20 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming flipchip interconnect structure |
US20070105277A1 (en) | 2004-11-10 | 2007-05-10 | Stats Chippac Ltd. | Solder joint flip chip interconnection |
USRE44500E1 (en) | 2003-11-10 | 2013-09-17 | Stats Chippac, Ltd. | Semiconductor device and method of forming composite bump-on-lead interconnection |
US8574959B2 (en) | 2003-11-10 | 2013-11-05 | Stats Chippac, Ltd. | Semiconductor device and method of forming bump-on-lead interconnection |
US7659633B2 (en) | 2004-11-10 | 2010-02-09 | Stats Chippac, Ltd. | Solder joint flip chip interconnection having relief structure |
US9029196B2 (en) | 2003-11-10 | 2015-05-12 | Stats Chippac, Ltd. | Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask |
USRE47600E1 (en) | 2003-11-10 | 2019-09-10 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of forming electrical interconnect with stress relief void |
US8129841B2 (en) | 2006-12-14 | 2012-03-06 | Stats Chippac, Ltd. | Solder joint flip chip interconnection |
US8674500B2 (en) * | 2003-12-31 | 2014-03-18 | Stats Chippac, Ltd. | Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask |
US8076232B2 (en) | 2008-04-03 | 2011-12-13 | Stats Chippac, Ltd. | Semiconductor device and method of forming composite bump-on-lead interconnection |
US8026128B2 (en) | 2004-11-10 | 2011-09-27 | Stats Chippac, Ltd. | Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask |
US8216930B2 (en) | 2006-12-14 | 2012-07-10 | Stats Chippac, Ltd. | Solder joint flip chip interconnection having relief structure |
TWI378516B (en) | 2003-11-10 | 2012-12-01 | Chippac Inc | Bump-on-lead flip chip interconnection |
KR20070107154A (en) | 2005-03-25 | 2007-11-06 | 스태츠 칩팩, 엘티디. | Flip chip interconnection having narrow interconnection sites on the substrate |
US8841779B2 (en) | 2005-03-25 | 2014-09-23 | Stats Chippac, Ltd. | Semiconductor device and method of forming high routing density BOL BONL and BONP interconnect sites on substrate |
US7521781B2 (en) * | 2005-04-25 | 2009-04-21 | Stats Chippac Ltd. | Integrated circuit package system with mold clamp line critical area having widened conductive traces |
US7786592B2 (en) | 2005-06-14 | 2010-08-31 | John Trezza | Chip capacitive coupling |
US7989958B2 (en) | 2005-06-14 | 2011-08-02 | Cufer Assett Ltd. L.L.C. | Patterned contact |
US7687400B2 (en) | 2005-06-14 | 2010-03-30 | John Trezza | Side stacking apparatus and method |
US7851348B2 (en) | 2005-06-14 | 2010-12-14 | Abhay Misra | Routingless chip architecture |
US8456015B2 (en) | 2005-06-14 | 2013-06-04 | Cufer Asset Ltd. L.L.C. | Triaxial through-chip connection |
US7560813B2 (en) | 2005-06-14 | 2009-07-14 | John Trezza | Chip-based thermo-stack |
US7781886B2 (en) | 2005-06-14 | 2010-08-24 | John Trezza | Electronic chip contact structure |
US7767493B2 (en) | 2005-06-14 | 2010-08-03 | John Trezza | Post & penetration interconnection |
US7838997B2 (en) | 2005-06-14 | 2010-11-23 | John Trezza | Remote chip attachment |
US7494924B2 (en) * | 2006-03-06 | 2009-02-24 | Freescale Semiconductor, Inc. | Method for forming reinforced interconnects on a substrate |
US7687397B2 (en) | 2006-06-06 | 2010-03-30 | John Trezza | Front-end processed wafer having through-chip connections |
US20080123335A1 (en) * | 2006-11-08 | 2008-05-29 | Jong Kun Yoo | Printed circuit board assembly and display having the same |
US8081484B2 (en) | 2006-11-30 | 2011-12-20 | Cisco Technology, Inc. | Method and apparatus for supporting a computer chip on a printed circuit board assembly |
US7670874B2 (en) | 2007-02-16 | 2010-03-02 | John Trezza | Plated pillar package formation |
US20080246147A1 (en) * | 2007-04-09 | 2008-10-09 | Chao-Yuan Su | Novel substrate design for semiconductor device |
KR100871710B1 (en) * | 2007-04-25 | 2008-12-08 | 삼성전자주식회사 | Flip chip package and method of fabricating the same package |
US8604624B2 (en) * | 2008-03-19 | 2013-12-10 | Stats Chippac Ltd. | Flip chip interconnection system having solder position control mechanism |
US9345148B2 (en) * | 2008-03-25 | 2016-05-17 | Stats Chippac, Ltd. | Semiconductor device and method of forming flipchip interconnection structure with bump on partial pad |
US7759137B2 (en) * | 2008-03-25 | 2010-07-20 | Stats Chippac, Ltd. | Flip chip interconnection structure with bump on partial pad and method thereof |
US20100096754A1 (en) * | 2008-10-17 | 2010-04-22 | Samsung Electronics Co., Ltd. | Semiconductor package, semiconductor module, and method for fabricating the semiconductor package |
US8659172B2 (en) | 2008-12-31 | 2014-02-25 | Stats Chippac, Ltd. | Semiconductor device and method of confining conductive bump material with solder mask patch |
KR101632399B1 (en) * | 2009-10-26 | 2016-06-23 | 삼성전자주식회사 | Semiconductor and method for fabricating the same |
US8420950B2 (en) * | 2010-03-02 | 2013-04-16 | Stats Chippac Ltd. | Circuit system with leads and method of manufacture thereof |
US8367467B2 (en) * | 2010-04-21 | 2013-02-05 | Stats Chippac, Ltd. | Semiconductor method of forming bump on substrate to prevent ELK ILD delamination during reflow process |
US8241964B2 (en) * | 2010-05-13 | 2012-08-14 | Stats Chippac, Ltd. | Semiconductor device and method of embedding bumps formed on semiconductor die into penetrable adhesive layer to reduce die shifting during encapsulation |
US8901736B2 (en) * | 2010-05-28 | 2014-12-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strength of micro-bump joints |
US8228682B1 (en) * | 2010-08-20 | 2012-07-24 | Xilinx, Inc. | Electronic assembly with trenches for underfill material |
US8435834B2 (en) | 2010-09-13 | 2013-05-07 | Stats Chippac, Ltd. | Semiconductor device and method of forming bond-on-lead interconnection for mounting semiconductor die in FO-WLCSP |
US8642446B2 (en) * | 2010-09-27 | 2014-02-04 | Stats Chippac, Ltd. | Semiconductor device and method of forming protective structure around semiconductor die for localized planarization of insulating layer |
WO2012056661A1 (en) * | 2010-10-25 | 2012-05-03 | パナソニック株式会社 | Electronic components assembly |
TWI527178B (en) * | 2010-12-15 | 2016-03-21 | 史達晶片有限公司 | Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask |
US8673761B2 (en) * | 2011-02-19 | 2014-03-18 | International Business Machines Corporation | Reflow method for lead-free solder |
JP5127946B2 (en) * | 2011-03-31 | 2013-01-23 | 株式会社東芝 | Electronic device, electronic component, and method for manufacturing substrate assembly |
US20120267779A1 (en) * | 2011-04-25 | 2012-10-25 | Mediatek Inc. | Semiconductor package |
KR101782503B1 (en) * | 2011-05-18 | 2017-09-28 | 삼성전자 주식회사 | Solder collapse free bumping process of semiconductor device |
US8441127B2 (en) * | 2011-06-29 | 2013-05-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bump-on-trace structures with wide and narrow portions |
US9024438B2 (en) * | 2011-07-28 | 2015-05-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Self-aligning conductive bump structure and method of making the same |
US8598691B2 (en) | 2011-09-09 | 2013-12-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor devices and methods of manufacturing and packaging thereof |
US9099340B2 (en) * | 2011-10-07 | 2015-08-04 | Volterra Semiconductor Corporation | Power management applications of interconnect substrates |
US9786622B2 (en) * | 2011-10-20 | 2017-10-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor package |
US9978656B2 (en) * | 2011-11-22 | 2018-05-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Mechanisms for forming fine-pitch copper bump structures |
US9466696B2 (en) | 2012-01-24 | 2016-10-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFETs and methods for forming the same |
US9281378B2 (en) | 2012-01-24 | 2016-03-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fin recess last process for FinFET fabrication |
US9171925B2 (en) | 2012-01-24 | 2015-10-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multi-gate devices with replaced-channels and methods for forming the same |
JP6011887B2 (en) | 2012-04-19 | 2016-10-25 | パナソニックIpマネジメント株式会社 | Electronic component mounting method and electronic component mounting line |
US9202714B2 (en) | 2012-04-24 | 2015-12-01 | Micron Technology, Inc. | Methods for forming semiconductor device packages |
US8970034B2 (en) | 2012-05-09 | 2015-03-03 | Micron Technology, Inc. | Semiconductor assemblies and structures |
US9177899B2 (en) * | 2012-07-31 | 2015-11-03 | Mediatek Inc. | Semiconductor package and method for fabricating base for semiconductor package |
US9287245B2 (en) * | 2012-11-07 | 2016-03-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Contoured package-on-package joint |
US9443962B2 (en) | 2012-11-09 | 2016-09-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Recessing STI to increase fin height in fin-first process |
US9349837B2 (en) | 2012-11-09 | 2016-05-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Recessing STI to increase Fin height in Fin-first process |
US9773724B2 (en) | 2013-01-29 | 2017-09-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor devices, methods of manufacture thereof, and semiconductor device packages |
US9609752B1 (en) | 2013-03-15 | 2017-03-28 | Lockheed Martin Corporation | Interconnect structure configured to control solder flow and method of manufacturing of same |
KR101563911B1 (en) | 2013-10-24 | 2015-10-28 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor package |
KR102305948B1 (en) | 2013-12-18 | 2021-09-28 | 루미리즈 홀딩 비.브이. | Reflective solder mask layer for led phosphor package |
US9275967B2 (en) | 2014-01-06 | 2016-03-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Protrusion bump pads for bond-on-trace processing |
US9508637B2 (en) | 2014-01-06 | 2016-11-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Protrusion bump pads for bond-on-trace processing |
US9418928B2 (en) | 2014-01-06 | 2016-08-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Protrusion bump pads for bond-on-trace processing |
US9305890B2 (en) | 2014-01-15 | 2016-04-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package having substrate with embedded metal trace overlapped by landing pad |
EP2940729A1 (en) | 2014-04-28 | 2015-11-04 | AT & S Austria Technologie & Systemtechnik Aktiengesellschaft | Electronic assembly comprising a carrier structure made from a printed circuit board |
KR101640773B1 (en) * | 2014-09-15 | 2016-07-19 | (주) 에스에스피 | Method of semiconductor package formed with electromagnetic interference shield and apparatus for the same |
CN104393097B (en) * | 2014-09-30 | 2017-02-08 | 中国空空导弹研究院 | Indium bump face-down bonding interconnection method |
US9859200B2 (en) | 2014-12-29 | 2018-01-02 | STATS ChipPAC Pte. Ltd. | Integrated circuit packaging system with interposer support structure mechanism and method of manufacture thereof |
KR101614721B1 (en) * | 2015-03-24 | 2016-04-22 | (주)씨앤아이테크놀로지 | Attaching and Detaching Method of Semiconductor Packages on tray for EMI shielding Using Adhesive-Pad |
KR101689018B1 (en) * | 2015-04-28 | 2016-12-22 | (주) 씨앤아이테크놀로지 | EMI Shielding Method of Semiconductor Packages by Pocket on Adhesive-Pad |
KR101662069B1 (en) * | 2015-09-18 | 2016-10-10 | (주) 씨앤아이테크놀로지 | Eletromagnetic interference shielding method of semiconductor packages |
FR3041625B1 (en) * | 2015-09-29 | 2021-07-30 | Tronics Microsystems | DEVICE FOR FIXING TWO ELEMENTS SUCH AS A CHIP, AN INTERPOSER AND A BRACKET |
TWI607327B (en) * | 2015-12-25 | 2017-12-01 | 矽創電子股份有限公司 | Semiconductor devices |
US10531575B2 (en) | 2016-04-01 | 2020-01-07 | Intel Corporation | Systems and methods for replaceable bail grid array (BGA) packages on board substrates |
US10504827B2 (en) | 2016-06-03 | 2019-12-10 | Amkor Technology, Inc. | Semiconductor device and manufacturing method thereof |
US10037970B2 (en) * | 2016-09-08 | 2018-07-31 | Nxp Usa, Inc. | Multiple interconnections between die |
KR20180137888A (en) * | 2017-06-20 | 2018-12-28 | 주식회사 프로텍 | Apparatus for Bonding Semiconductor Chip and Method for Bonding Semiconductor Chip |
US20190067232A1 (en) | 2017-08-31 | 2019-02-28 | Micron Technology, Inc. | Method for Solder Bridging Elimination for Bulk Solder C2S Interconnects |
CN109671693A (en) * | 2017-10-16 | 2019-04-23 | 矽创电子股份有限公司 | Circuit pin configuration |
KR102456322B1 (en) * | 2017-11-08 | 2022-10-19 | 삼성전기주식회사 | Substrate strip and electronic component package having the same |
KR102555721B1 (en) | 2018-08-20 | 2023-07-17 | 삼성전자주식회사 | method for bonding flip chip |
DE102020135088A1 (en) | 2020-03-27 | 2021-09-30 | Samsung Electronics Co., Ltd. | Semiconductor device |
US11404390B2 (en) * | 2020-06-30 | 2022-08-02 | Micron Technology, Inc. | Semiconductor device assembly with sacrificial pillars and methods of manufacturing sacrificial pillars |
KR20220034596A (en) | 2020-09-11 | 2022-03-18 | 삼성전자주식회사 | Semiconductor package |
Citations (116)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04355933A (en) | 1991-02-07 | 1992-12-09 | Nitto Denko Corp | Packaging structure of flip chip |
US5186383A (en) | 1991-10-02 | 1993-02-16 | Motorola, Inc. | Method for forming solder bump interconnections to a solder-plated circuit trace |
US5378859A (en) | 1992-03-02 | 1995-01-03 | Casio Computer Co., Ltd. | Film wiring board |
US5386624A (en) | 1993-07-06 | 1995-02-07 | Motorola, Inc. | Method for underencapsulating components on circuit supporting substrates |
US5434410A (en) | 1992-05-29 | 1995-07-18 | Texas Instruments Incorporated | Fine-grain pyroelectric detector material and method |
US5508561A (en) | 1993-11-15 | 1996-04-16 | Nec Corporation | Apparatus for forming a double-bump structure used for flip-chip mounting |
US5519580A (en) | 1994-09-09 | 1996-05-21 | Intel Corporation | Method of controlling solder ball size of BGA IC components |
JPH0997791A (en) | 1995-09-27 | 1997-04-08 | Internatl Business Mach Corp <Ibm> | Bump structure, formation of bump and installation connection body |
US5650595A (en) | 1995-05-25 | 1997-07-22 | International Business Machines Corporation | Electronic module with multiple solder dams in soldermask window |
US5710071A (en) | 1995-12-04 | 1998-01-20 | Motorola, Inc. | Process for underfilling a flip-chip semiconductor device |
JPH10256307A (en) | 1997-03-13 | 1998-09-25 | Ngk Spark Plug Co Ltd | Wiring board with semiconductor device, wiring board and manufacture thereof |
US5844782A (en) | 1994-12-20 | 1998-12-01 | Sony Corporation | Printed wiring board and electronic device using same |
US5854514A (en) | 1996-08-05 | 1998-12-29 | International Buisness Machines Corporation | Lead-free interconnection for electronic devices |
US5869886A (en) | 1996-03-22 | 1999-02-09 | Nec Corporation | Flip chip semiconductor mounting structure with electrically conductive resin |
US5872399A (en) | 1996-04-01 | 1999-02-16 | Anam Semiconductor, Inc. | Solder ball land metal structure of ball grid semiconductor package |
US5889326A (en) | 1996-02-27 | 1999-03-30 | Nec Corporation | Structure for bonding semiconductor device to substrate |
JPH11145176A (en) | 1997-11-11 | 1999-05-28 | Fujitsu Ltd | Method for forming solder bump and method for forming preliminary solder |
US5915169A (en) | 1995-12-22 | 1999-06-22 | Anam Industrial Co., Ltd. | Semiconductor chip scale package and method of producing such |
JPH11233571A (en) | 1998-02-12 | 1999-08-27 | Hitachi Ltd | Semiconductor device, underfill material, and thermosetting film material |
US5985456A (en) | 1997-07-21 | 1999-11-16 | Miguel Albert Capote | Carboxyl-containing polyunsaturated fluxing adhesive for attaching integrated circuits |
JP2000031204A (en) | 1998-07-07 | 2000-01-28 | Ricoh Co Ltd | Manufacture of semiconductor package |
JP2000349194A (en) | 1999-06-08 | 2000-12-15 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacture |
US6201305B1 (en) | 2000-06-09 | 2001-03-13 | Amkor Technology, Inc. | Making solder ball mounting pads on substrates |
US6218630B1 (en) | 1997-06-30 | 2001-04-17 | Fuji Photo Film Co., Ltd. | Printed circuit board having arrays of lands arranged inside and outside of each other having a reduced terminal-pitch |
US6228466B1 (en) | 1997-04-11 | 2001-05-08 | Ibiden Co. Ltd. | Printed wiring board and method for manufacturing the same |
JP2001156203A (en) | 1999-11-24 | 2001-06-08 | Matsushita Electric Works Ltd | Printed wiring board for mounting semiconductor chip |
US6259163B1 (en) | 1997-12-25 | 2001-07-10 | Oki Electric Industry Co., Ltd. | Bond pad for stress releif between a substrate and an external substrate |
US20010013423A1 (en) | 1996-10-31 | 2001-08-16 | Hormazdyar M. Dalal | Flip chip attach on flexible circuit carrier using chip with metallic cap on solder |
US6281450B1 (en) | 1997-06-26 | 2001-08-28 | Hitachi Chemical Company, Ltd. | Substrate for mounting semiconductor chips |
US6297560B1 (en) | 1996-10-31 | 2001-10-02 | Miguel Albert Capote | Semiconductor flip-chip assembly with pre-applied encapsulating layers |
US6324754B1 (en) | 1998-03-25 | 2001-12-04 | Tessera, Inc. | Method for fabricating microelectronic assemblies |
US6329605B1 (en) | 1998-03-26 | 2001-12-11 | Tessera, Inc. | Components with conductive solder mask layers |
US6335568B1 (en) | 1998-10-28 | 2002-01-01 | Seiko Epson Corporation | Semiconductor device and method of fabrication thereof, circuit board, and electronic equipment |
US6335571B1 (en) | 1997-07-21 | 2002-01-01 | Miguel Albert Capote | Semiconductor flip-chip package and method for the fabrication thereof |
US20020041036A1 (en) | 1998-02-03 | 2002-04-11 | Smith John W. | Microelectronic assemblies with composite conductive elements |
US6383916B1 (en) | 1998-12-21 | 2002-05-07 | M. S. Lin | Top layers of metal for high performance IC's |
US6396707B1 (en) | 1999-10-21 | 2002-05-28 | Siliconware Precision Industries Co., Ltd. | Ball grid array package |
US6409073B1 (en) | 1998-07-15 | 2002-06-25 | Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. | Method for transfering solder to a device and/or testing the device |
US6441316B1 (en) | 1999-08-27 | 2002-08-27 | Mitsubishi Denki Kabushiki Kaisha | Printed-circuit board and a semiconductor module, and a manufacturing process of the semiconductor module |
US6448665B1 (en) | 1997-10-15 | 2002-09-10 | Kabushiki Kaisha Toshiba | Semiconductor package and manufacturing method thereof |
JP2002270732A (en) | 2001-03-13 | 2002-09-20 | Sharp Corp | Electronic component with underfill material |
US6458622B1 (en) | 1999-07-06 | 2002-10-01 | Motorola, Inc. | Stress compensation composition and semiconductor component formed using the stress compensation composition |
US20030049411A1 (en) | 2001-09-10 | 2003-03-13 | Delphi Technologies,Inc | No-flow underfill material and underfill method for flip chip devices |
US6573610B1 (en) | 2000-06-02 | 2003-06-03 | Siliconware Precision Industries Co., Ltd. | Substrate of semiconductor package for flip chip package |
US6600234B2 (en) | 1999-02-03 | 2003-07-29 | Casio Computer Co., Ltd. | Mounting structure having columnar electrodes and a sealing film |
US6608388B2 (en) | 2001-11-01 | 2003-08-19 | Siliconware Precision Industries Co., Ltd. | Delamination-preventing substrate and semiconductor package with the same |
WO2003071842A1 (en) | 2001-12-26 | 2003-08-28 | Motorola, Inc. | Method of mounting a semiconductor die on a substrate without using a solder mask |
US6678948B1 (en) | 1998-09-01 | 2004-01-20 | Robert Bosch Gmbh | Method for connecting electronic components to a substrate, and a method for checking such a connection |
US20040035909A1 (en) | 2002-08-22 | 2004-02-26 | Shing Yeh | Lead-based solder alloys containing copper |
US6710458B2 (en) | 2000-10-13 | 2004-03-23 | Sharp Kabushiki Kaisha | Tape for chip on film and semiconductor therewith |
US20040056341A1 (en) | 2002-09-19 | 2004-03-25 | Kabushiki Kaisha Toshiba | Semiconductor device, semiconductor package member, and semiconductor device manufacturing method |
US6734557B2 (en) | 2002-03-12 | 2004-05-11 | Sharp Kabushiki Kaisha | Semiconductor device |
US20040105223A1 (en) | 2001-03-19 | 2004-06-03 | Ryoichi Okada | Method of manufacturing electronic part and electronic part obtained by the method |
JP2004165283A (en) | 2002-11-11 | 2004-06-10 | Fujitsu Ltd | Semiconductor device |
JP2004221205A (en) | 2003-01-10 | 2004-08-05 | Seiko Epson Corp | Method for mounting semiconductor chip, semiconductor mounting substrate, electronic device and electronic equipment |
US6774497B1 (en) | 2003-03-28 | 2004-08-10 | Freescale Semiconductor, Inc. | Flip-chip assembly with thin underfill and thick solder mask |
US6780682B2 (en) | 2001-02-27 | 2004-08-24 | Chippac, Inc. | Process for precise encapsulation of flip chip interconnects |
US6780673B2 (en) | 2002-06-12 | 2004-08-24 | Texas Instruments Incorporated | Method of forming a semiconductor device package using a plate layer surrounding contact pads |
US6787918B1 (en) | 2000-06-02 | 2004-09-07 | Siliconware Precision Industries Co., Ltd. | Substrate structure of flip chip package |
US6809262B1 (en) | 2003-06-03 | 2004-10-26 | Via Technologies, Inc. | Flip chip package carrier |
US6818545B2 (en) | 2001-03-05 | 2004-11-16 | Megic Corporation | Low fabrication cost, fine pitch and high reliability solder bump |
US6821878B2 (en) | 2003-02-27 | 2004-11-23 | Freescale Semiconductor, Inc. | Area-array device assembly with pre-applied underfill layers on printed wiring board |
US20040232562A1 (en) | 2003-05-23 | 2004-11-25 | Texas Instruments Incorporated | System and method for increasing bump pad height |
US6849944B2 (en) | 2003-05-30 | 2005-02-01 | Texas Instruments Incorporated | Using a supporting structure to control collapse of a die towards a die pad during a reflow process for coupling the die to the die pad |
JP2005028037A (en) | 2003-07-11 | 2005-02-03 | Fuji Photo Film Co Ltd | Medical image processing device and medical image processing method |
US6870276B1 (en) | 2001-12-26 | 2005-03-22 | Micron Technology, Inc. | Apparatus for supporting microelectronic substrates |
JP2005109187A (en) | 2003-09-30 | 2005-04-21 | Tdk Corp | Flip chip packaging circuit board and its manufacturing method, and integrated circuit device |
US6888255B2 (en) | 2003-05-30 | 2005-05-03 | Texas Instruments Incorporated | Built-up bump pad structure and method for same |
US6913948B2 (en) | 1999-11-10 | 2005-07-05 | International Business Machines Corporation | Partially captured oriented interconnections for BGA packages and a method of forming the interconnections |
US20050248037A1 (en) | 2004-05-06 | 2005-11-10 | Advanced Semiconductor Engineering, Inc. | Flip-chip package substrate with a high-density layout |
US7005585B2 (en) | 2002-09-02 | 2006-02-28 | Murata Manufacturing Co., Ltd. | Mounting board and electronic device using same |
US7005750B2 (en) | 2003-08-01 | 2006-02-28 | Advanced Semiconductor Engineering, Inc. | Substrate with reinforced contact pad structure |
US7049705B2 (en) | 2003-07-15 | 2006-05-23 | Advanced Semiconductor Engineering, Inc. | Chip structure |
US7057284B2 (en) | 2004-08-12 | 2006-06-06 | Texas Instruments Incorporated | Fine pitch low-cost flip chip substrate |
US7064435B2 (en) | 2003-07-29 | 2006-06-20 | Samsung Electronics Co., Ltd. | Semiconductor package with improved ball land structure |
US20060131758A1 (en) | 2004-12-22 | 2006-06-22 | Stmicroelectronics, Inc. | Anchored non-solder mask defined ball pad |
US7098407B2 (en) | 2003-08-23 | 2006-08-29 | Samsung Electronics Co., Ltd. | Non-solder mask defined (NSMD) type wiring substrate for ball grid array (BGA) package and method for manufacturing such a wiring substrate |
US7102239B2 (en) | 2003-08-18 | 2006-09-05 | Siliconware Precision Industries Co., Ltd. | Chip carrier for semiconductor chip |
US7173828B2 (en) | 2003-07-28 | 2007-02-06 | Siliconware Precision Industries Co., Ltd. | Ground pad structure for preventing solder extrusion and semiconductor package having the ground pad structure |
US7224073B2 (en) | 2004-05-18 | 2007-05-29 | Ultratera Corporation | Substrate for solder joint |
US7242099B2 (en) | 2001-03-05 | 2007-07-10 | Megica Corporation | Chip package with multiple chips connected by bumps |
US20070200234A1 (en) | 2006-02-28 | 2007-08-30 | Texas Instruments Incorporated | Flip-Chip Device Having Underfill in Controlled Gap |
US7271484B2 (en) | 2003-09-25 | 2007-09-18 | Infineon Technologies Ag | Substrate for producing a soldering connection |
US7294929B2 (en) | 2003-12-30 | 2007-11-13 | Texas Instruments Incorporated | Solder ball pad structure |
US7317245B1 (en) | 2006-04-07 | 2008-01-08 | Amkor Technology, Inc. | Method for manufacturing a semiconductor device substrate |
US20080093749A1 (en) | 2006-10-20 | 2008-04-24 | Texas Instruments Incorporated | Partial Solder Mask Defined Pad Design |
US7405484B2 (en) | 2003-09-30 | 2008-07-29 | Sanyo Electric Co., Ltd. | Semiconductor device containing stacked semiconductor chips and manufacturing method thereof |
US20080179740A1 (en) | 2007-01-25 | 2008-07-31 | Advanced Semiconductor Engineering, Inc. | Package substrate, method of fabricating the same and chip package |
US7436063B2 (en) | 2004-10-04 | 2008-10-14 | Rohm Co., Ltd. | Packaging substrate and semiconductor device |
US20080277802A1 (en) | 2007-05-10 | 2008-11-13 | Siliconware Precision Industries Co., Ltd. | Flip-chip semiconductor package and package substrate applicable thereto |
US7521284B2 (en) | 2007-03-05 | 2009-04-21 | Texas Instruments Incorporated | System and method for increased stand-off height in stud bumping process |
US20090108445A1 (en) | 2007-10-31 | 2009-04-30 | Advanced Semiconductor Engineering, Inc. | Substrate structure and semiconductor package using the same |
US20090114436A1 (en) | 2007-11-07 | 2009-05-07 | Advanced Semiconductor Engineering, Inc. | Substrate structure |
US20090152716A1 (en) | 2007-12-12 | 2009-06-18 | Shinko Electric Industries Co., Ltd. | Wiring substrate and electronic component mounting structure |
US20090191329A1 (en) | 2008-01-30 | 2009-07-30 | Advanced Semiconductor Engineering, Inc. | Surface treatment process for circuit board |
US20090288866A1 (en) | 2006-01-16 | 2009-11-26 | Siliconware Precision Industries Co., Ltd. | Electronic carrier board |
US20090308647A1 (en) | 2008-06-11 | 2009-12-17 | Advanced Semiconductor Engineering, Inc. | Circuit board with buried conductive trace formed thereon and method for manufacturing the same |
US7642660B2 (en) | 2002-12-17 | 2010-01-05 | Cheng Siew Tay | Method and apparatus for reducing electrical interconnection fatigue |
US7670939B2 (en) | 2008-05-12 | 2010-03-02 | Ati Technologies Ulc | Semiconductor chip bump connection apparatus and method |
US7671454B2 (en) | 2006-05-12 | 2010-03-02 | Sharp Kabushiki Kaisha | Tape carrier, semiconductor apparatus, and semiconductor module apparatus |
US7700407B2 (en) | 2003-11-10 | 2010-04-20 | Stats Chippac, Ltd. | Method of forming a bump-on-lead flip chip interconnection having higher escape routing density |
US7732913B2 (en) | 2006-02-03 | 2010-06-08 | Siliconware Precision Industries Co., Ltd. | Semiconductor package substrate |
US20100139965A1 (en) | 2008-12-09 | 2010-06-10 | Advanced Semiconductor Engineering, Inc. | Embedded circuit substrate and manufacturing method thereof |
US7750457B2 (en) | 2004-03-30 | 2010-07-06 | Sharp Kabushiki Kaisha | Semiconductor apparatus, manufacturing method thereof, semiconductor module apparatus using semiconductor apparatus, and wire substrate for semiconductor apparatus |
US7791211B2 (en) | 2007-10-19 | 2010-09-07 | Advanced Semiconductor Engineering, Inc. | Flip chip package structure and carrier thereof |
US7790509B2 (en) | 2008-06-27 | 2010-09-07 | Texas Instruments Incorporated | Method for fine-pitch, low stress flip-chip interconnect |
US7847417B2 (en) | 2005-12-22 | 2010-12-07 | Shinko Electric Industries Co., Ltd. | Flip-chip mounting substrate and flip-chip mounting method |
US7847399B2 (en) | 2007-12-07 | 2010-12-07 | Texas Instruments Incorporated | Semiconductor device having solder-free gold bump contacts for stability in repeated temperature cycles |
US7851928B2 (en) | 2008-06-10 | 2010-12-14 | Texas Instruments Incorporated | Semiconductor device having substrate with differentially plated copper and selective solder |
US7898083B2 (en) | 2008-12-17 | 2011-03-01 | Texas Instruments Incorporated | Method for low stress flip-chip assembly of fine-pitch semiconductor devices |
US20110049703A1 (en) | 2009-08-25 | 2011-03-03 | Jun-Chung Hsu | Flip-Chip Package Structure |
US7902678B2 (en) | 2004-03-29 | 2011-03-08 | Nec Corporation | Semiconductor device and manufacturing method thereof |
US7902679B2 (en) | 2001-03-05 | 2011-03-08 | Megica Corporation | Structure and manufacturing method of a chip scale package with low fabrication cost, fine pitch and high reliability solder bump |
US7902660B1 (en) | 2006-05-24 | 2011-03-08 | Amkor Technology, Inc. | Substrate for semiconductor device and manufacturing method thereof |
US7932170B1 (en) | 2008-06-23 | 2011-04-26 | Amkor Technology, Inc. | Flip chip bump structure and fabrication method |
US7947602B2 (en) | 2007-02-21 | 2011-05-24 | Texas Instruments Incorporated | Conductive pattern formation method |
Family Cites Families (124)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0719737B2 (en) | 1990-02-28 | 1995-03-06 | 信越半導体株式会社 | Manufacturing method of S01 substrate |
US5219117A (en) | 1991-11-01 | 1993-06-15 | Motorola, Inc. | Method of transferring solder balls onto a semiconductor device |
US5383916A (en) | 1991-11-12 | 1995-01-24 | Puretan International, Inc. | Support member for a tanning bed or comparable device |
JP3152796B2 (en) | 1993-05-28 | 2001-04-03 | 株式会社東芝 | Semiconductor device and method of manufacturing the same |
US5772451A (en) | 1993-11-16 | 1998-06-30 | Form Factor, Inc. | Sockets for electronic components and methods of connecting to electronic components |
US5427382A (en) | 1994-05-09 | 1995-06-27 | Pate; Elvis O. | Repair kit for three-dimensional animal targets |
JPH08236654A (en) | 1995-02-23 | 1996-09-13 | Matsushita Electric Ind Co Ltd | Chip carrier and manufacture thereof |
EP0747954A3 (en) | 1995-06-07 | 1997-05-07 | Ibm | Reflowed solder ball with low melting point metal cap |
US5796591A (en) | 1995-06-07 | 1998-08-18 | International Business Machines Corporation | Direct chip attach circuit card |
US5697148A (en) | 1995-08-22 | 1997-12-16 | Motorola, Inc. | Flip underfill injection technique |
US5731709A (en) | 1996-01-26 | 1998-03-24 | Motorola, Inc. | Method for testing a ball grid array semiconductor device and a device for such testing |
JP2751912B2 (en) | 1996-03-28 | 1998-05-18 | 日本電気株式会社 | Semiconductor device and manufacturing method thereof |
US5775569A (en) | 1996-10-31 | 1998-07-07 | Ibm Corporation | Method for building interconnect structures by injection molded solder and structures built |
US5796590A (en) | 1996-11-05 | 1998-08-18 | Micron Electronics, Inc. | Assembly aid for mounting packaged integrated circuit devices to printed circuit boards |
US5894173A (en) | 1996-11-27 | 1999-04-13 | Texas Instruments Incorporated | Stress relief matrix for integrated circuit packaging |
US5795818A (en) | 1996-12-06 | 1998-08-18 | Amkor Technology, Inc. | Integrated circuit chip to substrate interconnection and method |
KR100467897B1 (en) | 1996-12-24 | 2005-01-24 | 닛토덴코 가부시키가이샤 | A semiconductor device and a process for the production thereof |
US6002172A (en) | 1997-03-12 | 1999-12-14 | International Business Machines Corporation | Substrate structure and method for improving attachment reliability of semiconductor chips and modules |
JPH10270496A (en) | 1997-03-27 | 1998-10-09 | Hitachi Ltd | Electronic device, information processor, semiconductor device, semiconductor chip, and mounting method thereof |
US6070321A (en) | 1997-07-09 | 2000-06-06 | International Business Machines Corporation | Solder disc connection |
US6441473B1 (en) | 1997-09-12 | 2002-08-27 | Agere Systems Guardian Corp. | Flip chip semiconductor device |
US6335222B1 (en) | 1997-09-18 | 2002-01-01 | Tessera, Inc. | Microelectronic packages with solder interconnections |
US6049122A (en) | 1997-10-16 | 2000-04-11 | Fujitsu Limited | Flip chip mounting substrate with resin filled between substrate and semiconductor chip |
US6326241B1 (en) | 1997-12-29 | 2001-12-04 | Visteon Global Technologies, Inc. | Solderless flip-chip assembly and method and material for same |
US6297564B1 (en) | 1998-04-24 | 2001-10-02 | Amerasia International Technology, Inc. | Electronic devices employing adhesive interconnections including plated particles |
JPH11330162A (en) | 1998-05-19 | 1999-11-30 | Sony Corp | Mounting of semiconductor chip |
JP3420076B2 (en) | 1998-08-31 | 2003-06-23 | 新光電気工業株式会社 | Method for manufacturing flip-chip mounting board, flip-chip mounting board, and flip-chip mounting structure |
JP2000133667A (en) | 1998-10-22 | 2000-05-12 | Citizen Watch Co Ltd | Formation of bump electrode |
JP4024958B2 (en) * | 1999-03-15 | 2007-12-19 | 株式会社ルネサステクノロジ | Semiconductor device and semiconductor mounting structure |
US6556268B1 (en) | 1999-03-31 | 2003-04-29 | Industrial Technology Research Institute | Method for forming compact LCD packages and devices formed in which first bonding PCB to LCD panel and second bonding driver chip to PCB |
JP4121665B2 (en) | 1999-04-19 | 2008-07-23 | 株式会社ルネサステクノロジ | Semiconductor substrate bonding method |
US6268568B1 (en) | 1999-05-04 | 2001-07-31 | Anam Semiconductor, Inc. | Printed circuit board with oval solder ball lands for BGA semiconductor packages |
US6225206B1 (en) | 1999-05-10 | 2001-05-01 | International Business Machines Corporation | Flip chip C4 extension structure and process |
JP2000323534A (en) | 1999-05-13 | 2000-11-24 | Sony Corp | Mounting structure of semiconductor element and mounting method thereof |
US6122171A (en) | 1999-07-30 | 2000-09-19 | Micron Technology, Inc. | Heat sink chip package and method of making |
US6303400B1 (en) | 1999-09-23 | 2001-10-16 | International Business Machines Corporation | Temporary attach article and method for temporary attach of devices to a substrate |
JP3865989B2 (en) | 2000-01-13 | 2007-01-10 | 新光電気工業株式会社 | Multilayer wiring board, wiring board, multilayer wiring board manufacturing method, wiring board manufacturing method, and semiconductor device |
US20010012644A1 (en) | 2000-01-14 | 2001-08-09 | I-Ming Chen | Method for mounting a semiconductor chip on a substrate, and semiconductor device adapted for mounting on a substrate |
JP2001230339A (en) | 2000-02-18 | 2001-08-24 | Nec Corp | Semiconductor device |
US6592019B2 (en) | 2000-04-27 | 2003-07-15 | Advanpack Solutions Pte. Ltd | Pillar connections for semiconductor chips and method of manufacture |
US6578754B1 (en) | 2000-04-27 | 2003-06-17 | Advanpack Solutions Pte. Ltd. | Pillar connections for semiconductor chips and method of manufacture |
JP2001313314A (en) | 2000-04-28 | 2001-11-09 | Sony Corp | Semiconductor device using bump, its manufacturing method, and method for forming bump |
US6661084B1 (en) | 2000-05-16 | 2003-12-09 | Sandia Corporation | Single level microelectronic device package with an integral window |
JP2001332583A (en) | 2000-05-22 | 2001-11-30 | Fujitsu Ltd | Method of mounting semiconductor chip |
JP2001351945A (en) | 2000-06-05 | 2001-12-21 | Matsushita Electric Ind Co Ltd | Method of manufacturing semiconductor device |
JP3506233B2 (en) | 2000-06-28 | 2004-03-15 | シャープ株式会社 | Semiconductor device and manufacturing method thereof |
EP1330178A1 (en) | 2000-11-01 | 2003-07-30 | 3M Innovative Properties Company | Electrical sensing and/or signal application device |
JP2002151532A (en) | 2000-11-08 | 2002-05-24 | Sharp Corp | Electronic component, method and structure for mounting semiconductor device |
JP2002151551A (en) | 2000-11-10 | 2002-05-24 | Hitachi Ltd | Flip-chip mounting structure, semiconductor device therewith and mounting method |
US6552436B2 (en) | 2000-12-08 | 2003-04-22 | Motorola, Inc. | Semiconductor device having a ball grid array and method therefor |
US20020079595A1 (en) | 2000-12-21 | 2002-06-27 | Carpenter Burton J. | Apparatus for connecting a semiconductor die to a substrate and method therefor |
DE10163799B4 (en) | 2000-12-28 | 2006-11-23 | Matsushita Electric Works, Ltd., Kadoma | Semiconductor chip mounting substrate and method of manufacturing such a mounting substrate |
US6518678B2 (en) | 2000-12-29 | 2003-02-11 | Micron Technology, Inc. | Apparatus and method for reducing interposer compression during molding process |
US6800169B2 (en) | 2001-01-08 | 2004-10-05 | Fujitsu Limited | Method for joining conductive structures and an electrical conductive article |
US6458623B1 (en) | 2001-01-17 | 2002-10-01 | International Business Machines Corporation | Conductive adhesive interconnection with insulating polymer carrier |
US6577014B2 (en) | 2001-01-19 | 2003-06-10 | Yu-Nung Shen | Low-profile semiconductor device |
US6737295B2 (en) | 2001-02-27 | 2004-05-18 | Chippac, Inc. | Chip scale package with flip chip interconnect |
DE60235335D1 (en) | 2001-03-15 | 2010-04-01 | Halo Inc | Dual bit MONOS memory cell use for wide program bandwidth |
US6495397B2 (en) | 2001-03-28 | 2002-12-17 | Intel Corporation | Fluxless flip chip interconnection |
TW498506B (en) | 2001-04-20 | 2002-08-11 | Advanced Semiconductor Eng | Flip-chip joint structure and the processing thereof |
US6664483B2 (en) | 2001-05-15 | 2003-12-16 | Intel Corporation | Electronic package with high density interconnect and associated methods |
US6510976B2 (en) | 2001-05-18 | 2003-01-28 | Advanpack Solutions Pte. Ltd. | Method for forming a flip chip semiconductor package |
US7296727B2 (en) | 2001-06-27 | 2007-11-20 | Matsushita Electric Industrial Co., Ltd. | Apparatus and method for mounting electronic components |
JP4445163B2 (en) | 2001-07-13 | 2010-04-07 | パナソニック株式会社 | Electronic component mounting equipment |
US7294457B2 (en) | 2001-08-07 | 2007-11-13 | Boehringer Ingelheim (Canada) Ltd. | Direct binding assay for identifying inhibitors of HCV polymerase |
US6550666B2 (en) | 2001-08-21 | 2003-04-22 | Advanpack Solutions Pte Ltd | Method for forming a flip chip on leadframe semiconductor package |
US6853076B2 (en) | 2001-09-21 | 2005-02-08 | Intel Corporation | Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same |
US7202556B2 (en) | 2001-12-20 | 2007-04-10 | Micron Technology, Inc. | Semiconductor package having substrate with multi-layer metal bumps |
JP3891838B2 (en) | 2001-12-26 | 2007-03-14 | 株式会社ルネサステクノロジ | Semiconductor device and manufacturing method thereof |
US6644536B2 (en) | 2001-12-28 | 2003-11-11 | Intel Corporation | Solder reflow with microwave energy |
TWI245402B (en) | 2002-01-07 | 2005-12-11 | Megic Corp | Rod soldering structure and manufacturing process thereof |
US6974659B2 (en) | 2002-01-16 | 2005-12-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of forming a solder ball using a thermally stable resinous protective layer |
JP3687610B2 (en) | 2002-01-18 | 2005-08-24 | セイコーエプソン株式会社 | Semiconductor device, circuit board, and electronic equipment |
TWI268581B (en) | 2002-01-25 | 2006-12-11 | Advanced Semiconductor Eng | Stack type flip-chip package including a substrate board, a first chip, a second chip, multiple conductive wire, an underfill, and a packaging material |
JP2003264256A (en) | 2002-03-08 | 2003-09-19 | Hitachi Ltd | Semiconductor device |
US6767411B2 (en) | 2002-03-15 | 2004-07-27 | Delphi Technologies, Inc. | Lead-free solder alloy and solder reflow process |
TW530398B (en) * | 2002-03-19 | 2003-05-01 | Chipmos Technologies Inc | Method for manufacturing bumps of chip scale package (CSP) |
TW550800B (en) | 2002-05-27 | 2003-09-01 | Via Tech Inc | Integrated circuit package without solder mask and method for the same |
TW557536B (en) | 2002-05-27 | 2003-10-11 | Via Tech Inc | High density integrated circuit packages and method for the same |
US6659512B1 (en) | 2002-07-18 | 2003-12-09 | Hewlett-Packard Development Company, L.P. | Integrated circuit package employing flip-chip technology and method of assembly |
JP2004063524A (en) | 2002-07-25 | 2004-02-26 | Toshiba Corp | Apparatus and method for mounting or printed circuit board |
US6974330B2 (en) | 2002-08-08 | 2005-12-13 | Micron Technology, Inc. | Electronic devices incorporating electrical interconnections with improved reliability and methods of fabricating same |
US6696644B1 (en) * | 2002-08-08 | 2004-02-24 | Texas Instruments Incorporated | Polymer-embedded solder bumps for reliable plastic package attachment |
US7182241B2 (en) | 2002-08-09 | 2007-02-27 | Micron Technology, Inc. | Multi-functional solder and articles made therewith, such as microelectronic components |
TW561602B (en) | 2002-09-09 | 2003-11-11 | Via Tech Inc | High density integrated circuit packages and method for the same |
JP2004134648A (en) | 2002-10-11 | 2004-04-30 | Seiko Epson Corp | Circuit board, mounting structure of ball grid array, electro-optical device, and electronic apparatus |
TW543923U (en) | 2002-10-25 | 2003-07-21 | Via Tech Inc | Structure of chip package |
TW586199B (en) | 2002-12-30 | 2004-05-01 | Advanced Semiconductor Eng | Flip-chip package |
US6943058B2 (en) | 2003-03-18 | 2005-09-13 | Delphi Technologies, Inc. | No-flow underfill process and material therefor |
US20040232560A1 (en) | 2003-05-22 | 2004-11-25 | Chao-Yuan Su | Flip chip assembly process and substrate used therewith |
TWI221336B (en) | 2003-08-29 | 2004-09-21 | Advanced Semiconductor Eng | Integrated circuit with embedded passive component in flip-chip connection and method for manufacturing the same |
WO2005031863A1 (en) | 2003-09-26 | 2005-04-07 | Tessera, Inc. | Structure and method of making capped chips having vertical interconnects |
US7112524B2 (en) | 2003-09-29 | 2006-09-26 | Phoenix Precision Technology Corporation | Substrate for pre-soldering material and fabrication method thereof |
TWI245389B (en) * | 2003-10-02 | 2005-12-11 | Siliconware Precision Industries Co Ltd | Conductive trace structure and semiconductor package having the conductive trace structure |
JP2005116685A (en) | 2003-10-06 | 2005-04-28 | Seiko Epson Corp | Printed wiring board, electronic component module and electronic apparatus |
US7462942B2 (en) | 2003-10-09 | 2008-12-09 | Advanpack Solutions Pte Ltd | Die pillar structures and a method of their formation |
US7736950B2 (en) | 2003-11-10 | 2010-06-15 | Stats Chippac, Ltd. | Flip chip interconnection |
US8026128B2 (en) | 2004-11-10 | 2011-09-27 | Stats Chippac, Ltd. | Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask |
US8129841B2 (en) | 2006-12-14 | 2012-03-06 | Stats Chippac, Ltd. | Solder joint flip chip interconnection |
US7294451B2 (en) | 2003-11-18 | 2007-11-13 | Texas Instruments Incorporated | Raised solder-mask-defined (SMD) solder ball pads for a laminate electronic circuit board |
JP3863161B2 (en) | 2004-01-20 | 2006-12-27 | 松下電器産業株式会社 | Semiconductor device |
JP3981089B2 (en) | 2004-02-18 | 2007-09-26 | 株式会社東芝 | Semiconductor device and manufacturing method thereof |
US7183493B2 (en) | 2004-06-30 | 2007-02-27 | Intel Corporation | Electronic assembly having multi-material interconnects |
DE102004050178B3 (en) | 2004-10-14 | 2006-05-04 | Infineon Technologies Ag | Flip-chip device |
US7488896B2 (en) | 2004-11-04 | 2009-02-10 | Ngk Spark Plug Co., Ltd. | Wiring board with semiconductor component |
US8067823B2 (en) | 2004-11-15 | 2011-11-29 | Stats Chippac, Ltd. | Chip scale package having flip chip interconnect on die paddle |
TWI261329B (en) | 2005-03-09 | 2006-09-01 | Phoenix Prec Technology Corp | Conductive bump structure of circuit board and method for fabricating the same |
US7361990B2 (en) | 2005-03-17 | 2008-04-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Reducing cracking of high-lead or lead-free bumps by matching sizes of contact pads and bump pads |
KR20070107154A (en) | 2005-03-25 | 2007-11-06 | 스태츠 칩팩, 엘티디. | Flip chip interconnection having narrow interconnection sites on the substrate |
US7148086B2 (en) | 2005-04-28 | 2006-12-12 | Stats Chippac Ltd. | Semiconductor package with controlled solder bump wetting and fabrication method therefor |
US20060255473A1 (en) | 2005-05-16 | 2006-11-16 | Stats Chippac Ltd. | Flip chip interconnect solder mask |
JP4190525B2 (en) | 2005-08-22 | 2008-12-03 | 富士通マイクロエレクトロニクス株式会社 | Manufacturing method of semiconductor device |
US7541681B2 (en) | 2006-05-04 | 2009-06-02 | Infineon Technologies Ag | Interconnection structure, electronic component and method of manufacturing the same |
KR100764055B1 (en) | 2006-09-07 | 2007-10-08 | 삼성전자주식회사 | Wafer level chip scale package and method for manufacturing a chip scale package |
TWI378540B (en) | 2006-10-14 | 2012-12-01 | Advanpack Solutions Pte Ltd | Chip and manufacturing method thereof |
US8178392B2 (en) | 2007-05-18 | 2012-05-15 | Stats Chippac Ltd. | Electronic system with expansion feature |
US20090057378A1 (en) | 2007-08-27 | 2009-03-05 | Chi-Won Hwang | In-situ chip attachment using self-organizing solder |
US8558379B2 (en) | 2007-09-28 | 2013-10-15 | Tessera, Inc. | Flip chip interconnection with double post |
JP5106197B2 (en) | 2008-03-25 | 2012-12-26 | 京セラSlcテクノロジー株式会社 | Semiconductor device and manufacturing method thereof |
KR100979497B1 (en) | 2008-06-17 | 2010-09-01 | 삼성전기주식회사 | Wafer level package and manufacturing method thereof |
JP2010118534A (en) | 2008-11-13 | 2010-05-27 | Mitsubishi Electric Corp | Semiconductor device and method of manufacturing same |
JP2010141055A (en) | 2008-12-10 | 2010-06-24 | Sanyo Electric Co Ltd | Semiconductor module, method of manufacturing semiconductor module, and portable equipment |
US8435834B2 (en) | 2010-09-13 | 2013-05-07 | Stats Chippac, Ltd. | Semiconductor device and method of forming bond-on-lead interconnection for mounting semiconductor die in FO-WLCSP |
US9299674B2 (en) | 2012-04-18 | 2016-03-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bump-on-trace interconnect |
-
2004
- 2004-11-10 TW TW093134366A patent/TWI378516B/en active
- 2004-11-10 KR KR1020067009055A patent/KR101249555B1/en active IP Right Grant
- 2004-11-10 KR KR1020127005471A patent/KR101237172B1/en active IP Right Grant
- 2004-11-10 WO PCT/US2004/037647 patent/WO2005048311A2/en active Application Filing
- 2004-11-10 TW TW101111925A patent/TWI478254B/en active
- 2004-11-10 TW TW101133048A patent/TWI534915B/en active
- 2004-11-10 KR KR1020127031571A patent/KR101286379B1/en active IP Right Grant
- 2004-11-10 JP JP2006539858A patent/JP4928945B2/en active Active
- 2004-11-10 US US10/985,654 patent/US7368817B2/en active Active
-
2008
- 2008-04-03 US US12/062,293 patent/US7700407B2/en not_active Ceased
-
2010
- 2010-03-03 US US12/716,455 patent/US7973406B2/en not_active Ceased
-
2011
- 2011-04-18 US US13/088,647 patent/US8188598B2/en not_active Ceased
-
2012
- 2012-05-05 US US13/464,979 patent/US8558378B2/en active Active
- 2012-07-23 US US13/556,106 patent/USRE44431E1/en active Active
- 2012-07-23 US US13/556,064 patent/USRE44377E1/en active Active
-
2013
- 2013-01-25 US US13/750,975 patent/USRE44355E1/en active Active
- 2013-02-01 US US13/756,779 patent/USRE44524E1/en active Active
- 2013-08-13 US US13/965,356 patent/US9922915B2/en active Active
Patent Citations (121)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04355933A (en) | 1991-02-07 | 1992-12-09 | Nitto Denko Corp | Packaging structure of flip chip |
US5186383A (en) | 1991-10-02 | 1993-02-16 | Motorola, Inc. | Method for forming solder bump interconnections to a solder-plated circuit trace |
US5378859A (en) | 1992-03-02 | 1995-01-03 | Casio Computer Co., Ltd. | Film wiring board |
US5434410A (en) | 1992-05-29 | 1995-07-18 | Texas Instruments Incorporated | Fine-grain pyroelectric detector material and method |
US5386624A (en) | 1993-07-06 | 1995-02-07 | Motorola, Inc. | Method for underencapsulating components on circuit supporting substrates |
US5508561A (en) | 1993-11-15 | 1996-04-16 | Nec Corporation | Apparatus for forming a double-bump structure used for flip-chip mounting |
US5519580A (en) | 1994-09-09 | 1996-05-21 | Intel Corporation | Method of controlling solder ball size of BGA IC components |
US5844782A (en) | 1994-12-20 | 1998-12-01 | Sony Corporation | Printed wiring board and electronic device using same |
US5650595A (en) | 1995-05-25 | 1997-07-22 | International Business Machines Corporation | Electronic module with multiple solder dams in soldermask window |
US6229220B1 (en) | 1995-06-27 | 2001-05-08 | International Business Machines Corporation | Bump structure, bump forming method and package connecting body |
JPH0997791A (en) | 1995-09-27 | 1997-04-08 | Internatl Business Mach Corp <Ibm> | Bump structure, formation of bump and installation connection body |
US5710071A (en) | 1995-12-04 | 1998-01-20 | Motorola, Inc. | Process for underfilling a flip-chip semiconductor device |
US5915169A (en) | 1995-12-22 | 1999-06-22 | Anam Industrial Co., Ltd. | Semiconductor chip scale package and method of producing such |
US5889326A (en) | 1996-02-27 | 1999-03-30 | Nec Corporation | Structure for bonding semiconductor device to substrate |
US5869886A (en) | 1996-03-22 | 1999-02-09 | Nec Corporation | Flip chip semiconductor mounting structure with electrically conductive resin |
US5872399A (en) | 1996-04-01 | 1999-02-16 | Anam Semiconductor, Inc. | Solder ball land metal structure of ball grid semiconductor package |
US5854514A (en) | 1996-08-05 | 1998-12-29 | International Buisness Machines Corporation | Lead-free interconnection for electronic devices |
US6297560B1 (en) | 1996-10-31 | 2001-10-02 | Miguel Albert Capote | Semiconductor flip-chip assembly with pre-applied encapsulating layers |
US20010013423A1 (en) | 1996-10-31 | 2001-08-16 | Hormazdyar M. Dalal | Flip chip attach on flexible circuit carrier using chip with metallic cap on solder |
JPH10256307A (en) | 1997-03-13 | 1998-09-25 | Ngk Spark Plug Co Ltd | Wiring board with semiconductor device, wiring board and manufacture thereof |
US6228466B1 (en) | 1997-04-11 | 2001-05-08 | Ibiden Co. Ltd. | Printed wiring board and method for manufacturing the same |
US6281450B1 (en) | 1997-06-26 | 2001-08-28 | Hitachi Chemical Company, Ltd. | Substrate for mounting semiconductor chips |
US6218630B1 (en) | 1997-06-30 | 2001-04-17 | Fuji Photo Film Co., Ltd. | Printed circuit board having arrays of lands arranged inside and outside of each other having a reduced terminal-pitch |
US5985456A (en) | 1997-07-21 | 1999-11-16 | Miguel Albert Capote | Carboxyl-containing polyunsaturated fluxing adhesive for attaching integrated circuits |
US6335571B1 (en) | 1997-07-21 | 2002-01-01 | Miguel Albert Capote | Semiconductor flip-chip package and method for the fabrication thereof |
US6448665B1 (en) | 1997-10-15 | 2002-09-10 | Kabushiki Kaisha Toshiba | Semiconductor package and manufacturing method thereof |
JPH11145176A (en) | 1997-11-11 | 1999-05-28 | Fujitsu Ltd | Method for forming solder bump and method for forming preliminary solder |
US6109507A (en) | 1997-11-11 | 2000-08-29 | Fujitsu Limited | Method of forming solder bumps and method of forming preformed solder bumps |
US6259163B1 (en) | 1997-12-25 | 2001-07-10 | Oki Electric Industry Co., Ltd. | Bond pad for stress releif between a substrate and an external substrate |
US20020041036A1 (en) | 1998-02-03 | 2002-04-11 | Smith John W. | Microelectronic assemblies with composite conductive elements |
JPH11233571A (en) | 1998-02-12 | 1999-08-27 | Hitachi Ltd | Semiconductor device, underfill material, and thermosetting film material |
US6324754B1 (en) | 1998-03-25 | 2001-12-04 | Tessera, Inc. | Method for fabricating microelectronic assemblies |
US6329605B1 (en) | 1998-03-26 | 2001-12-11 | Tessera, Inc. | Components with conductive solder mask layers |
JP2000031204A (en) | 1998-07-07 | 2000-01-28 | Ricoh Co Ltd | Manufacture of semiconductor package |
US6409073B1 (en) | 1998-07-15 | 2002-06-25 | Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. | Method for transfering solder to a device and/or testing the device |
US6678948B1 (en) | 1998-09-01 | 2004-01-20 | Robert Bosch Gmbh | Method for connecting electronic components to a substrate, and a method for checking such a connection |
US6335568B1 (en) | 1998-10-28 | 2002-01-01 | Seiko Epson Corporation | Semiconductor device and method of fabrication thereof, circuit board, and electronic equipment |
US6383916B1 (en) | 1998-12-21 | 2002-05-07 | M. S. Lin | Top layers of metal for high performance IC's |
US6600234B2 (en) | 1999-02-03 | 2003-07-29 | Casio Computer Co., Ltd. | Mounting structure having columnar electrodes and a sealing film |
JP2000349194A (en) | 1999-06-08 | 2000-12-15 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacture |
US6458622B1 (en) | 1999-07-06 | 2002-10-01 | Motorola, Inc. | Stress compensation composition and semiconductor component formed using the stress compensation composition |
US6441316B1 (en) | 1999-08-27 | 2002-08-27 | Mitsubishi Denki Kabushiki Kaisha | Printed-circuit board and a semiconductor module, and a manufacturing process of the semiconductor module |
US6396707B1 (en) | 1999-10-21 | 2002-05-28 | Siliconware Precision Industries Co., Ltd. | Ball grid array package |
US6913948B2 (en) | 1999-11-10 | 2005-07-05 | International Business Machines Corporation | Partially captured oriented interconnections for BGA packages and a method of forming the interconnections |
JP2001156203A (en) | 1999-11-24 | 2001-06-08 | Matsushita Electric Works Ltd | Printed wiring board for mounting semiconductor chip |
US6787918B1 (en) | 2000-06-02 | 2004-09-07 | Siliconware Precision Industries Co., Ltd. | Substrate structure of flip chip package |
US6573610B1 (en) | 2000-06-02 | 2003-06-03 | Siliconware Precision Industries Co., Ltd. | Substrate of semiconductor package for flip chip package |
US6201305B1 (en) | 2000-06-09 | 2001-03-13 | Amkor Technology, Inc. | Making solder ball mounting pads on substrates |
US6710458B2 (en) | 2000-10-13 | 2004-03-23 | Sharp Kabushiki Kaisha | Tape for chip on film and semiconductor therewith |
US6780682B2 (en) | 2001-02-27 | 2004-08-24 | Chippac, Inc. | Process for precise encapsulation of flip chip interconnects |
US7902679B2 (en) | 2001-03-05 | 2011-03-08 | Megica Corporation | Structure and manufacturing method of a chip scale package with low fabrication cost, fine pitch and high reliability solder bump |
US6818545B2 (en) | 2001-03-05 | 2004-11-16 | Megic Corporation | Low fabrication cost, fine pitch and high reliability solder bump |
US7242099B2 (en) | 2001-03-05 | 2007-07-10 | Megica Corporation | Chip package with multiple chips connected by bumps |
JP2002270732A (en) | 2001-03-13 | 2002-09-20 | Sharp Corp | Electronic component with underfill material |
US20040105223A1 (en) | 2001-03-19 | 2004-06-03 | Ryoichi Okada | Method of manufacturing electronic part and electronic part obtained by the method |
US20030049411A1 (en) | 2001-09-10 | 2003-03-13 | Delphi Technologies,Inc | No-flow underfill material and underfill method for flip chip devices |
US6660560B2 (en) | 2001-09-10 | 2003-12-09 | Delphi Technologies, Inc. | No-flow underfill material and underfill method for flip chip devices |
US6608388B2 (en) | 2001-11-01 | 2003-08-19 | Siliconware Precision Industries Co., Ltd. | Delamination-preventing substrate and semiconductor package with the same |
US6870276B1 (en) | 2001-12-26 | 2005-03-22 | Micron Technology, Inc. | Apparatus for supporting microelectronic substrates |
WO2003071842A1 (en) | 2001-12-26 | 2003-08-28 | Motorola, Inc. | Method of mounting a semiconductor die on a substrate without using a solder mask |
US6734557B2 (en) | 2002-03-12 | 2004-05-11 | Sharp Kabushiki Kaisha | Semiconductor device |
US6780673B2 (en) | 2002-06-12 | 2004-08-24 | Texas Instruments Incorporated | Method of forming a semiconductor device package using a plate layer surrounding contact pads |
US20040035909A1 (en) | 2002-08-22 | 2004-02-26 | Shing Yeh | Lead-based solder alloys containing copper |
US7005585B2 (en) | 2002-09-02 | 2006-02-28 | Murata Manufacturing Co., Ltd. | Mounting board and electronic device using same |
US20040056341A1 (en) | 2002-09-19 | 2004-03-25 | Kabushiki Kaisha Toshiba | Semiconductor device, semiconductor package member, and semiconductor device manufacturing method |
JP2004165283A (en) | 2002-11-11 | 2004-06-10 | Fujitsu Ltd | Semiconductor device |
US7642660B2 (en) | 2002-12-17 | 2010-01-05 | Cheng Siew Tay | Method and apparatus for reducing electrical interconnection fatigue |
JP2004221205A (en) | 2003-01-10 | 2004-08-05 | Seiko Epson Corp | Method for mounting semiconductor chip, semiconductor mounting substrate, electronic device and electronic equipment |
US6821878B2 (en) | 2003-02-27 | 2004-11-23 | Freescale Semiconductor, Inc. | Area-array device assembly with pre-applied underfill layers on printed wiring board |
US6774497B1 (en) | 2003-03-28 | 2004-08-10 | Freescale Semiconductor, Inc. | Flip-chip assembly with thin underfill and thick solder mask |
US20040232562A1 (en) | 2003-05-23 | 2004-11-25 | Texas Instruments Incorporated | System and method for increasing bump pad height |
US6888255B2 (en) | 2003-05-30 | 2005-05-03 | Texas Instruments Incorporated | Built-up bump pad structure and method for same |
US6849944B2 (en) | 2003-05-30 | 2005-02-01 | Texas Instruments Incorporated | Using a supporting structure to control collapse of a die towards a die pad during a reflow process for coupling the die to the die pad |
US6809262B1 (en) | 2003-06-03 | 2004-10-26 | Via Technologies, Inc. | Flip chip package carrier |
JP2005028037A (en) | 2003-07-11 | 2005-02-03 | Fuji Photo Film Co Ltd | Medical image processing device and medical image processing method |
US7049705B2 (en) | 2003-07-15 | 2006-05-23 | Advanced Semiconductor Engineering, Inc. | Chip structure |
US7173828B2 (en) | 2003-07-28 | 2007-02-06 | Siliconware Precision Industries Co., Ltd. | Ground pad structure for preventing solder extrusion and semiconductor package having the ground pad structure |
US7064435B2 (en) | 2003-07-29 | 2006-06-20 | Samsung Electronics Co., Ltd. | Semiconductor package with improved ball land structure |
US7005750B2 (en) | 2003-08-01 | 2006-02-28 | Advanced Semiconductor Engineering, Inc. | Substrate with reinforced contact pad structure |
US7102239B2 (en) | 2003-08-18 | 2006-09-05 | Siliconware Precision Industries Co., Ltd. | Chip carrier for semiconductor chip |
US7098407B2 (en) | 2003-08-23 | 2006-08-29 | Samsung Electronics Co., Ltd. | Non-solder mask defined (NSMD) type wiring substrate for ball grid array (BGA) package and method for manufacturing such a wiring substrate |
US7271484B2 (en) | 2003-09-25 | 2007-09-18 | Infineon Technologies Ag | Substrate for producing a soldering connection |
US20050103516A1 (en) | 2003-09-30 | 2005-05-19 | Tdk Corporation | Flip-chip mounting circuit board, manufacturing method thereof and integrated circuit device |
JP2005109187A (en) | 2003-09-30 | 2005-04-21 | Tdk Corp | Flip chip packaging circuit board and its manufacturing method, and integrated circuit device |
US7405484B2 (en) | 2003-09-30 | 2008-07-29 | Sanyo Electric Co., Ltd. | Semiconductor device containing stacked semiconductor chips and manufacturing method thereof |
US7973406B2 (en) | 2003-11-10 | 2011-07-05 | Stats Chippac, Ltd. | Bump-on-lead flip chip interconnection |
US7700407B2 (en) | 2003-11-10 | 2010-04-20 | Stats Chippac, Ltd. | Method of forming a bump-on-lead flip chip interconnection having higher escape routing density |
US7294929B2 (en) | 2003-12-30 | 2007-11-13 | Texas Instruments Incorporated | Solder ball pad structure |
US7902678B2 (en) | 2004-03-29 | 2011-03-08 | Nec Corporation | Semiconductor device and manufacturing method thereof |
US7750457B2 (en) | 2004-03-30 | 2010-07-06 | Sharp Kabushiki Kaisha | Semiconductor apparatus, manufacturing method thereof, semiconductor module apparatus using semiconductor apparatus, and wire substrate for semiconductor apparatus |
US20050248037A1 (en) | 2004-05-06 | 2005-11-10 | Advanced Semiconductor Engineering, Inc. | Flip-chip package substrate with a high-density layout |
US7224073B2 (en) | 2004-05-18 | 2007-05-29 | Ultratera Corporation | Substrate for solder joint |
US7057284B2 (en) | 2004-08-12 | 2006-06-06 | Texas Instruments Incorporated | Fine pitch low-cost flip chip substrate |
US7436063B2 (en) | 2004-10-04 | 2008-10-14 | Rohm Co., Ltd. | Packaging substrate and semiconductor device |
US20060131758A1 (en) | 2004-12-22 | 2006-06-22 | Stmicroelectronics, Inc. | Anchored non-solder mask defined ball pad |
US7847417B2 (en) | 2005-12-22 | 2010-12-07 | Shinko Electric Industries Co., Ltd. | Flip-chip mounting substrate and flip-chip mounting method |
US20090288866A1 (en) | 2006-01-16 | 2009-11-26 | Siliconware Precision Industries Co., Ltd. | Electronic carrier board |
US7732913B2 (en) | 2006-02-03 | 2010-06-08 | Siliconware Precision Industries Co., Ltd. | Semiconductor package substrate |
US20070200234A1 (en) | 2006-02-28 | 2007-08-30 | Texas Instruments Incorporated | Flip-Chip Device Having Underfill in Controlled Gap |
US7317245B1 (en) | 2006-04-07 | 2008-01-08 | Amkor Technology, Inc. | Method for manufacturing a semiconductor device substrate |
US7671454B2 (en) | 2006-05-12 | 2010-03-02 | Sharp Kabushiki Kaisha | Tape carrier, semiconductor apparatus, and semiconductor module apparatus |
US7902660B1 (en) | 2006-05-24 | 2011-03-08 | Amkor Technology, Inc. | Substrate for semiconductor device and manufacturing method thereof |
US20080093749A1 (en) | 2006-10-20 | 2008-04-24 | Texas Instruments Incorporated | Partial Solder Mask Defined Pad Design |
US20080179740A1 (en) | 2007-01-25 | 2008-07-31 | Advanced Semiconductor Engineering, Inc. | Package substrate, method of fabricating the same and chip package |
US7947602B2 (en) | 2007-02-21 | 2011-05-24 | Texas Instruments Incorporated | Conductive pattern formation method |
US7521284B2 (en) | 2007-03-05 | 2009-04-21 | Texas Instruments Incorporated | System and method for increased stand-off height in stud bumping process |
US20080277802A1 (en) | 2007-05-10 | 2008-11-13 | Siliconware Precision Industries Co., Ltd. | Flip-chip semiconductor package and package substrate applicable thereto |
US7791211B2 (en) | 2007-10-19 | 2010-09-07 | Advanced Semiconductor Engineering, Inc. | Flip chip package structure and carrier thereof |
US20090108445A1 (en) | 2007-10-31 | 2009-04-30 | Advanced Semiconductor Engineering, Inc. | Substrate structure and semiconductor package using the same |
US20090114436A1 (en) | 2007-11-07 | 2009-05-07 | Advanced Semiconductor Engineering, Inc. | Substrate structure |
US7847399B2 (en) | 2007-12-07 | 2010-12-07 | Texas Instruments Incorporated | Semiconductor device having solder-free gold bump contacts for stability in repeated temperature cycles |
US20090152716A1 (en) | 2007-12-12 | 2009-06-18 | Shinko Electric Industries Co., Ltd. | Wiring substrate and electronic component mounting structure |
US20090191329A1 (en) | 2008-01-30 | 2009-07-30 | Advanced Semiconductor Engineering, Inc. | Surface treatment process for circuit board |
US7670939B2 (en) | 2008-05-12 | 2010-03-02 | Ati Technologies Ulc | Semiconductor chip bump connection apparatus and method |
US7851928B2 (en) | 2008-06-10 | 2010-12-14 | Texas Instruments Incorporated | Semiconductor device having substrate with differentially plated copper and selective solder |
US20090308647A1 (en) | 2008-06-11 | 2009-12-17 | Advanced Semiconductor Engineering, Inc. | Circuit board with buried conductive trace formed thereon and method for manufacturing the same |
US7932170B1 (en) | 2008-06-23 | 2011-04-26 | Amkor Technology, Inc. | Flip chip bump structure and fabrication method |
US7790509B2 (en) | 2008-06-27 | 2010-09-07 | Texas Instruments Incorporated | Method for fine-pitch, low stress flip-chip interconnect |
US20100139965A1 (en) | 2008-12-09 | 2010-06-10 | Advanced Semiconductor Engineering, Inc. | Embedded circuit substrate and manufacturing method thereof |
US7898083B2 (en) | 2008-12-17 | 2011-03-01 | Texas Instruments Incorporated | Method for low stress flip-chip assembly of fine-pitch semiconductor devices |
US20110049703A1 (en) | 2009-08-25 | 2011-03-03 | Jun-Chung Hsu | Flip-Chip Package Structure |
Non-Patent Citations (5)
Title |
---|
Kawahara, Toshimi, "SuperCSP", IEEE Transactions on Advanced Packaging, May 2000, pp. 215-219, vol. 23, No. 2. |
Lu, H. et al., "Predicting Optimal Process Conditions for Flip-Chip Assembly Using Copper Column Bumped Dies", Electronics Packaging Technology Conference, 2002, pp. 338-343. |
Son, Ho-Young, "Studies on the Thermal Cycling Reliability of Fine Pitch Cu/SnAg Double-Bump Flip Chip Assemblies on Organic Substrates: Experimental Results and Numerical Analysis", IEEE Electronic Components and Technology Conference, 2008, pp. 2035-2043. |
Yamada, Hiroshi et al., "A fine pitch and high aspect ratio bump array for flip-chip interconnection", Int'l Electronics Manufacturing Technology Symposium, 1992, pp. 288-292, IEEE/CHMT. |
Yamada, Hiroshi et al., "Advanced copper column based solder bump for flip-chip interconnection", International Symposium on Microelectronics, 1997, pp. 417-422, The British Library-"The world's knowledge". |
Also Published As
Publication number | Publication date |
---|---|
KR101237172B1 (en) | 2013-02-25 |
TW201237976A (en) | 2012-09-16 |
TW200525666A (en) | 2005-08-01 |
USRE44377E1 (en) | 2013-07-16 |
US20110215468A1 (en) | 2011-09-08 |
US7368817B2 (en) | 2008-05-06 |
USRE44524E1 (en) | 2013-10-08 |
JP4928945B2 (en) | 2012-05-09 |
KR20130006532A (en) | 2013-01-16 |
WO2005048311A3 (en) | 2006-01-05 |
USRE44431E1 (en) | 2013-08-13 |
WO2005048311A2 (en) | 2005-05-26 |
KR20120041775A (en) | 2012-05-02 |
US9922915B2 (en) | 2018-03-20 |
KR101249555B1 (en) | 2013-04-01 |
TWI478254B (en) | 2015-03-21 |
US20120211887A1 (en) | 2012-08-23 |
TW201304026A (en) | 2013-01-16 |
US7973406B2 (en) | 2011-07-05 |
US8558378B2 (en) | 2013-10-15 |
JP2007511103A (en) | 2007-04-26 |
KR20070009973A (en) | 2007-01-19 |
US8188598B2 (en) | 2012-05-29 |
US20080213941A1 (en) | 2008-09-04 |
KR101286379B1 (en) | 2013-07-15 |
US20100164100A1 (en) | 2010-07-01 |
TWI378516B (en) | 2012-12-01 |
TWI534915B (en) | 2016-05-21 |
US20130328189A1 (en) | 2013-12-12 |
US7700407B2 (en) | 2010-04-20 |
US20050110164A1 (en) | 2005-05-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
USRE44355E1 (en) | Method of forming a bump-on-lead flip chip interconnection having higher escape routing density | |
US9159665B2 (en) | Flip chip interconnection having narrow interconnection sites on the substrate | |
US9545013B2 (en) | Flip chip interconnect solder mask | |
US7901983B2 (en) | Bump-on-lead flip chip interconnection | |
US9373573B2 (en) | Solder joint flip chip interconnection | |
USRE44608E1 (en) | Solder joint flip chip interconnection |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FPAY | Fee payment |
Year of fee payment: 4 |
|
AS | Assignment |
Owner name: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT, HONG KONG Free format text: SECURITY INTEREST;ASSIGNORS:STATS CHIPPAC, INC.;STATS CHIPPAC LTD.;REEL/FRAME:036288/0748 Effective date: 20150806 Owner name: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY Free format text: SECURITY INTEREST;ASSIGNORS:STATS CHIPPAC, INC.;STATS CHIPPAC LTD.;REEL/FRAME:036288/0748 Effective date: 20150806 |
|
AS | Assignment |
Owner name: STATS CHIPPAC PTE. LTE., SINGAPORE Free format text: CHANGE OF NAME;ASSIGNOR:STATS CHIPPAC LTD.;REEL/FRAME:038378/0235 Effective date: 20160329 |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 8TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1552) Year of fee payment: 8 |
|
AS | Assignment |
Owner name: STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD., SINGAPORE Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT;REEL/FRAME:052850/0237 Effective date: 20190503 Owner name: STATS CHIPPAC, INC., CALIFORNIA Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT;REEL/FRAME:052850/0237 Effective date: 20190503 |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 12TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1553); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 12 |
|
AS | Assignment |
Owner name: STATS CHIPPAC PTE. LTD., SINGAPORE Free format text: CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0235. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT;ASSIGNOR:STATS CHIPPAC LTD.;REEL/FRAME:065236/0741 Effective date: 20160329 |