USRE43223E1 - Dynamic memory management - Google Patents
Dynamic memory management Download PDFInfo
- Publication number
- USRE43223E1 USRE43223E1 US12/108,221 US10822108A USRE43223E US RE43223 E1 USRE43223 E1 US RE43223E1 US 10822108 A US10822108 A US 10822108A US RE43223 E USRE43223 E US RE43223E
- Authority
- US
- United States
- Prior art keywords
- memory
- refresh
- dynamic
- power
- dynamic memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40611—External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1689—Synchronisation and timing concerns
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/406—Refreshing of dynamic cells
- G11C2211/4061—Calibration or ate or cycle tuning
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dram (AREA)
Abstract
Description
Itotal=Istatic+Idynamic,
where Itotal is the total current consumption, Istatic is the current consumption when power is applied to the chip with no other operations occurring, and Idynamic includes current consumed for all accesses (read, write, and refresh cycles) and is proportional to fVCC, where f is the frequency of accesses, and VCC is the battery voltage.
Claims (26)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/108,221 USRE43223E1 (en) | 2002-09-26 | 2008-04-23 | Dynamic memory management |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/256,265 US7035155B2 (en) | 2002-09-26 | 2002-09-26 | Dynamic memory management |
US12/108,221 USRE43223E1 (en) | 2002-09-26 | 2008-04-23 | Dynamic memory management |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/256,265 Reissue US7035155B2 (en) | 2002-09-26 | 2002-09-26 | Dynamic memory management |
Publications (1)
Publication Number | Publication Date |
---|---|
USRE43223E1 true USRE43223E1 (en) | 2012-03-06 |
Family
ID=32029242
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/256,265 Ceased US7035155B2 (en) | 2002-09-26 | 2002-09-26 | Dynamic memory management |
US12/108,221 Expired - Lifetime USRE43223E1 (en) | 2002-09-26 | 2008-04-23 | Dynamic memory management |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/256,265 Ceased US7035155B2 (en) | 2002-09-26 | 2002-09-26 | Dynamic memory management |
Country Status (1)
Country | Link |
---|---|
US (2) | US7035155B2 (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20120110363A1 (en) * | 2009-07-27 | 2012-05-03 | Bacchus Reza M | Method and system for power-efficient and non-signal-degrading voltage regulation in memory subsystems |
US20120246390A1 (en) * | 2011-03-24 | 2012-09-27 | Kabushiki Kaisha Toshiba | Information processing apparatus, program product, and data writing method |
US20130111239A1 (en) * | 2011-10-31 | 2013-05-02 | International Business Machines Corporation | Memory refresh rate throttling for saving idle power |
US9135983B2 (en) * | 2014-02-14 | 2015-09-15 | Fujitsu Semiconductor Limited | Semiconductor memory device and control method thereof |
US9140854B2 (en) | 2011-09-22 | 2015-09-22 | Alcatel Lucent | Spatial division multiplexing optical mode converter |
US9377844B2 (en) | 2011-10-31 | 2016-06-28 | Lenovo Enterprise Solutions (Singapore) Pte. Ltd. | Memory refresh rate throttling for saving idle power |
US20170352429A1 (en) * | 2011-08-31 | 2017-12-07 | Micron Technology, Inc. | Memory refresh methods and apparatuses |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7538762B2 (en) | 2003-09-30 | 2009-05-26 | Intel Corporation | Switching display update properties upon detecting a power management event |
ES2322271T3 (en) * | 2003-12-03 | 2009-06-18 | Koninklijke Philips Electronics N.V. | PROCEDURE AND SYSTEM OF ENERGY SAVINGS. |
US7321521B2 (en) * | 2004-07-02 | 2008-01-22 | Seagate Technology Llc | Assessing energy requirements for a refreshed device |
US9384818B2 (en) | 2005-04-21 | 2016-07-05 | Violin Memory | Memory power management |
US8519673B2 (en) * | 2006-06-30 | 2013-08-27 | Seagate Technology Llc | Arbitrating battery power calibration in a device that selects a battery power unit from a purality of selectable battery power units |
JP5082727B2 (en) * | 2007-09-28 | 2012-11-28 | ソニー株式会社 | Storage control device, storage control method, and computer program |
TWI381379B (en) * | 2007-10-05 | 2013-01-01 | Fujitsu Ltd | An information processing apparatus, a memory section control apparatus, and a memory section control method |
KR101098128B1 (en) * | 2007-10-05 | 2011-12-26 | 후지쯔 가부시끼가이샤 | Information processor, storage section control device, and storage section control method |
US8892831B2 (en) * | 2008-01-16 | 2014-11-18 | Apple Inc. | Memory subsystem hibernation |
US7773441B2 (en) * | 2008-06-18 | 2010-08-10 | Micron Technology, Inc. | Memory malfunction prediction system and method |
US8688943B2 (en) * | 2008-07-23 | 2014-04-01 | Micro Motion, Inc. | Processing system with external memory access control |
US8495400B2 (en) * | 2008-09-30 | 2013-07-23 | Seagate Technology Llc | Energy-efficient transitioning among device operating modes |
EP2786224B1 (en) * | 2011-11-30 | 2020-05-06 | Intel Corporation | Reducing power for 3d workloads |
US8848471B2 (en) * | 2012-08-08 | 2014-09-30 | International Business Machines Corporation | Method for optimizing refresh rate for DRAM |
US9342134B2 (en) * | 2013-09-27 | 2016-05-17 | Intel Corporation | Power consumption reduction in a computing device |
CN106133700A (en) | 2014-03-29 | 2016-11-16 | 英派尔科技开发有限公司 | Energy-conservation dynamic dram caching adjusts |
US8929169B1 (en) * | 2014-05-13 | 2015-01-06 | Sandisk Technologies Inc. | Power management for nonvolatile memory array |
US9990293B2 (en) * | 2014-08-12 | 2018-06-05 | Empire Technology Development Llc | Energy-efficient dynamic dram cache sizing via selective refresh of a cache in a dram |
US20170220354A1 (en) * | 2014-11-12 | 2017-08-03 | Hewlett Packard Enterprise Development Lp | Server node shutdown |
JP6180450B2 (en) * | 2015-02-02 | 2017-08-16 | キヤノン株式会社 | Control device, control method and program for control device |
WO2017048294A1 (en) | 2015-09-18 | 2017-03-23 | Hewlett Packard Enterprise Development Lp | Memory persistence from a volatile memory to a non-volatile memory |
US9857978B1 (en) | 2017-03-09 | 2018-01-02 | Toshiba Memory Corporation | Optimization of memory refresh rates using estimation of die temperature |
US11669425B2 (en) * | 2020-04-08 | 2023-06-06 | Micron Technology, Inc. | Computerized system and method for periodically powering up a storage device to avoid data loss |
Citations (15)
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US5590082A (en) | 1994-06-07 | 1996-12-31 | Hitachi, Ltd. | Circuit and method for retaining DRAM content |
US5627791A (en) | 1996-02-16 | 1997-05-06 | Micron Technology, Inc. | Multiple bank memory with auto refresh to specified bank |
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-
2002
- 2002-09-26 US US10/256,265 patent/US7035155B2/en not_active Ceased
-
2008
- 2008-04-23 US US12/108,221 patent/USRE43223E1/en not_active Expired - Lifetime
Patent Citations (15)
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US5918242A (en) * | 1994-03-14 | 1999-06-29 | International Business Machines Corporation | General-purpose customizable memory controller |
US5590082A (en) | 1994-06-07 | 1996-12-31 | Hitachi, Ltd. | Circuit and method for retaining DRAM content |
US5898290A (en) | 1995-09-07 | 1999-04-27 | Norand Corporation | Battery pack with capacity and pre-removal indicators |
US5627791A (en) | 1996-02-16 | 1997-05-06 | Micron Technology, Inc. | Multiple bank memory with auto refresh to specified bank |
US6216233B1 (en) | 1997-02-12 | 2001-04-10 | Intel Corporation | Maintaining a memory while in a power management mode |
US6272588B1 (en) | 1997-05-30 | 2001-08-07 | Motorola Inc. | Method and apparatus for verifying and characterizing data retention time in a DRAM using built-in test circuitry |
US5881016A (en) | 1997-06-13 | 1999-03-09 | Cirrus Logic, Inc. | Method and apparatus for optimizing power consumption and memory bandwidth in a video controller using SGRAM and SDRAM power reduction modes |
US6073223A (en) * | 1997-07-21 | 2000-06-06 | Hewlett-Packard Company | Memory controller and method for intermittently activating and idling a clock signal for a synchronous memory |
US6317657B1 (en) * | 1998-08-18 | 2001-11-13 | International Business Machines Corporation | Method to battery back up SDRAM data on power failure |
US6208577B1 (en) * | 1999-04-16 | 2001-03-27 | Micron Technology, Inc. | Circuit and method for refreshing data stored in a memory cell |
US6252830B1 (en) | 1999-10-15 | 2001-06-26 | William Hsu | Real-time compressing and decompressing apparatus for recording and reproducing multi-soundtrack voice data |
US20020026543A1 (en) * | 2000-05-19 | 2002-02-28 | Masayoshi Tojima | High-performance DMA controller |
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US6658544B2 (en) | 2000-12-27 | 2003-12-02 | Koninklijke Philips Electronics N.V. | Techniques to asynchronously operate a synchronous memory |
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Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20120110363A1 (en) * | 2009-07-27 | 2012-05-03 | Bacchus Reza M | Method and system for power-efficient and non-signal-degrading voltage regulation in memory subsystems |
US8782452B2 (en) * | 2009-07-27 | 2014-07-15 | Hewlett-Packard Development Company, L.P. | Method and system for power-efficient and non-signal-degrading voltage regulation in memory subsystems |
US20120246390A1 (en) * | 2011-03-24 | 2012-09-27 | Kabushiki Kaisha Toshiba | Information processing apparatus, program product, and data writing method |
US20170352429A1 (en) * | 2011-08-31 | 2017-12-07 | Micron Technology, Inc. | Memory refresh methods and apparatuses |
US10109357B2 (en) | 2011-08-31 | 2018-10-23 | Micron Technology, Inc. | Memory refresh methods and apparatuses |
US10290359B2 (en) * | 2011-08-31 | 2019-05-14 | Micron Technology, Inc. | Memory refresh methods and apparatuses |
US9140854B2 (en) | 2011-09-22 | 2015-09-22 | Alcatel Lucent | Spatial division multiplexing optical mode converter |
US20130111239A1 (en) * | 2011-10-31 | 2013-05-02 | International Business Machines Corporation | Memory refresh rate throttling for saving idle power |
US9116699B2 (en) * | 2011-10-31 | 2015-08-25 | Lenovo Enterprise Solutions (Singapore) Pte. Ltd. | Memory refresh rate throttling for saving idle power |
US9377844B2 (en) | 2011-10-31 | 2016-06-28 | Lenovo Enterprise Solutions (Singapore) Pte. Ltd. | Memory refresh rate throttling for saving idle power |
US9135983B2 (en) * | 2014-02-14 | 2015-09-15 | Fujitsu Semiconductor Limited | Semiconductor memory device and control method thereof |
Also Published As
Publication number | Publication date |
---|---|
US7035155B2 (en) | 2006-04-25 |
US20040062119A1 (en) | 2004-04-01 |
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Legal Events
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AS | Assignment |
Owner name: FRANKFURT GMBH, LLC, DELAWARE Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:XWARE TECHNOLOGY, INC.;REEL/FRAME:025116/0106 Effective date: 20070514 |
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Owner name: CUFER ASSET LTD. L.L.C., DELAWARE Free format text: MERGER;ASSIGNOR:FRANKFURT GMBH. LLC;REEL/FRAME:037117/0118 Effective date: 20150812 |
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Owner name: INTELLECTUAL VENTURES ASSETS 115 LLC, DELAWARE Free format text: NUNC PRO TUNC ASSIGNMENT;ASSIGNOR:CUFER ASSET LTD. L.L.C.;REEL/FRAME:048093/0254 Effective date: 20181214 |
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Owner name: COMPUTER CIRCUIT OPERATIONS LLC, NEW YORK Free format text: NUNC PRO TUNC ASSIGNMENT;ASSIGNOR:INTELLECTUAL VENTURES ASSETS 115 LLC;REEL/FRAME:048879/0373 Effective date: 20181227 |