|Publication number||USRE41363 E1|
|Application number||US 11/296,847|
|Publication date||1 Jun 2010|
|Filing date||8 Dec 2005|
|Priority date||21 Nov 1995|
|Also published as||DE69635239D1, DE69635239T2, EP0775931A2, EP0775931A3, EP0775931B1, EP1338914A2, EP1338914A3, US6008065, US6331443, US6339230, US6661026, US20020106825|
|Publication number||11296847, 296847, US RE41363 E1, US RE41363E1, US-E1-RE41363, USRE41363 E1, USRE41363E1|
|Inventors||Jueng-gil Lee, Jung-Ho Lee, Hyo-Rak Nam|
|Original Assignee||Samsung Electronics Co., Ltd.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (47), Non-Patent Citations (5), Referenced by (3), Classifications (47), Legal Events (3)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This is a divisional application of application Ser. No. 09/391,454, filed Sep. 8, 1999 now U.S. Pat. No. 6,339,230 which is a continuation application of application Ser. No. 08/754,644, filed Nov. 21, 1996 now U.S. Pat. No. 6,008,065, which is incorporated herein by reference in its entirety.
The present invention relates to a method for manufacturing a liquid crystal display. More particularly, present invention relates to an improved method for manufacturing a thin film transistor-liquid crystal display which reduces the number of photolithography processes that must be performed.
A thin film transistor LCD (“TFT-LCD”), which uses the thin film transistor as the active device, has various advantages over other LCDs. These advantages include low power consumption, low drive voltage, a thinness, and lightness of weight, among others.
Since the thin film transistor (“TFT”) is significantly thinner than a conventional transistor, the process of manufacturing a TFT is complicated, resulting in low productivity and high manufacturing costs. In particular, since a mask is used in every step for manufacturing a TFT, at least seven masks are required. Therefore, various methods for increasing productivity of the TFT and lowering the manufacturing costs have been studied. In particular, a method for reducing the number of the masks used during the manufacturing process has been widely researched.
In the drawings, reference characters “A” and “B” denote a TFT area and a pad area, respectively. Referring to
As shown in
As shown in
Subsequently, pixel electrodes 18 and 18a are formed by depositing indium tin oxide (“ITO”), a transparent conductive material, over the entire surface of the substrate, including the contact hole, and performing a seventh photolithography process on the resultant ITO film. As a result of this seventh lithography, the drain electrode 14b and the pixel electrode 18 are connected in the TFT area, and the pad electrode 14c and the pixel electrode 18a are connected in the pad area.
According to the conventional method for manufacturing the LCD, pure aluminum (“Al”) is used as the gate electrode material to lower the resistance of a gate line. An anodizing process is therefore required to prevent a hillock caused by the Al. This additional anodizing step complicates the manufacturing process, reduces productivity, and increases manufacturing costs.
It is an object of the present invention to provide an improved method for manufacturing a liquid crystal display in which manufacturing costs are reduced and productivity increased by reducing the number of photolithography processes performed.
It is another object of the present invention to provide a method for manufacturing a liquid crystal display by which it is possible to prevent the deterioration of device characteristics by preventing the generation of an undercut in a gate electrode.
To achieve the above objects, there is provided an improved method for manufacturing a liquid crystal display according to the present invention, comprising the steps of forming a gate electrode and a gate pad by a first photolithography process by sequentially depositing a first metal film and a second metal film over a substrate of a TFT area and a pad area, respectively; forming an insulating film over the entire surface of the substrate on which the gate electrode and the gate pad are formed; forming a semiconductor film pattern over the insulating film of the TFT area using a second photolithography process; forming a source electrode and a drain electrode in the TFT area using a third photolithography process, the source electrode and the drain electrode comprising a third metal film; forming a protection film pattern over the substrate on which the source electrode and the drain electrode are formed using a fourth photolithography process, the protection film pattern exposing a portion of the drain electrode and a portion of the gate pad; and forming a pixel electrode over the substrate on which the protection film pattern is formed using a fifth photolithography process, the pixel electrode being connected to the drain electrode and the gate pad.
The first metal film preferably comprises one of aluminum or an aluminum alloy and the second metal film comprises a refractory metal. More specifically, the second metal film preferably comprises a metal selected from the group consisting of Cr, Ta, Mo, and Ti.
The step of forming the gate electrode includes the steps of forming the first metal film and the second metal film over a substrate in the described order; forming a photoresist pattern over a portion of the second metal film; etching the second metal film using the photoresist pattern as a mask; reflowing the photoresist pattern; etching the first metal film using the reflowed photoresist pattern as a mask; and removing the reflowed photoresist pattern. The step of reflowing the photoresist pattern may be performed in multiple steps.
The step of forming the gate electrode preferably includes the steps of forming the first metal film and the second metal film on the substrate in the described order; forming a photoresist pattern on a portion of the second metal film; etching the second metal film by etching using the photoresist pattern as a mask; and etching the first metal film. The etching of the second metal film may be either a wet or dry etch and a step of baking the photoresist pattern may be included after the step of etching the second metal film.
The step of forming the gate electrode preferably includes the steps of forming the first metal film and the second metal film on a substrate; forming a photoresist pattern on a portion of the second metal film; etching the second metal film using the photoresist pattern as a mask; etching the first metal film using the patterned second metal film; and re-etching the patterned second metal film. A step of baking the photoresist pattern may be included prior to the step of etching the first metal film after the step of etching the second metal film.
According to the present invention, it is possible to prevent a battery effect and a hillock caused by directly contact of Al to the ITO by forming the gate electrode in a double structure of Al or an Al alloy and a refractory metal film. Also, it is possible to omit the anodizing process and to simultaneously etch the insulating layer and the protection film due to a capping film, thus reducing the number of the photolithography processes. Also, since it is possible to form the first metal film larger than or identical to the second metal film, an undercut is not generated in the gate electrode. Therefore, it is possible to prevent the deterioration of insulation characteristics due to poor step coverage during deposition of the insulating film after forming the gate electrode.
The above objects and advantages of the present invention will become more apparent by describing in detail a preferred embodiment thereof with reference to the attached drawings in which:
The first metal film 22 is preferably formed of Al or an Al-alloy such as Al—Nd or Al—Ta. It is possible to lower the resistance of the gate line and to prevent generation of a hillock when the gate electrode is formed of the Al alloy. The second metal film 24 is preferably formed of one refractory metal selected from the group consisting of Cr, Ta, Mo, and Ti. The second metal film acts as a capping film to prevent the Al alloy from contacting the ITO film to be formed in a subsequent process. Because a capping film is formed on the Al or Al-alloy, a high temperature oxidation process and a photolithography process for forming an oxidized film are not required. Also, since the second metal film 24 does not include Al, no battery effect is generated, even though the second metal film 24 directly contacts the ITO film formed in a subsequent process.
The method for forming a liquid crystal display according to a first embodiment of the present invention prevents the occurrence of a battery effect and prevents the formation of an Al hillock caused by contact of Al to the ITO. This method achieves these goals by forming a gate electrode using Al or an Al-alloy and by forming the capping film on the gate electrode using a refractory metal. The method of the first preferred embodiment also makes it possible to reduce the number of photolithography processes by omitting the anodizing process and simultaneously forming the contact on the insulating film and the protection film.
The first metal film 22 and the second metal film 24 which comprise the gate electrode in the first embodiment of the present invention are etched using only one mask. As a result of this use of a single mask, an undercut may be generated in the gate electrode as shown in FIG. 12. As a result, step coverage becomes poor in a subsequent insulating film depositing process, thus creating a risk of deteriorating insulation characteristics. In the second through fourth embodiments of the present invention, a method for preventing the generation of the undercut in the gate electrode is provided.
If the second metal film 54 is wet etched in this step, an undercut may be generated to narrow the width of the first metal film 52. In this case, if the photoresist pattern is not removed, baking may be performed on the photoresist pattern to prevent lifting of the photoresist pattern.
According to the above-mentioned preferred methods for manufacturing the liquid crystal display according to the present invention, the gate electrode is formed in a two-layered-structure of Al or Al-alloy and a refractory metal. Therefore, it is possible to prevent a battery effect caused by directly contacting the Al to the ITO and it is also possible to prevent the generation of a hillock of the Al due to the stress relaxation of the refractory metal. It is also possible to reduce the number of photolithography processes by omitting the anodizing process and simultaneously etching the insulating film and the protection film.
Since it is possible to form the Al film or Al-alloy film formed on the lower area to be identical in size or larger than the refractory metal formed on the upper portion, an undercut is not generated in the gate electrode. Therefore, it is possible to prevent the deterioration of insulation characteristics caused by poor step coverage.
The present invention is not limited to the above-described embodiments. Various changes and modifications may be effected by one having an ordinary skill in the art and remain within the scope of the invention, as defined by the appended claims.
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|U.S. Classification||257/59, 257/72, 257/E29.137, 257/57, 257/88, 257/347, 349/38|
|International Classification||G02F1/1368, H01L23/52, H01L29/786, H01L21/768, H01L21/336, H01L29/49, G02F1/136, H01L27/12, G02F1/1362, H01L21/28, H01L23/482, G02F1/1345, H01L29/423, G02F1/1343, H01L21/3205, H01L29/40|
|Cooperative Classification||H01L27/124, H01L27/1288, G02F1/1345, G02F1/136286, H01L27/12, H01L23/4827, G02F2001/13629, H01L21/28008, G02F1/136227, H01L2924/0002, H01L29/42384, H01L29/4908, G02F1/13458, G02F1/1368|
|European Classification||G02F1/1345T, H01L27/12T, H01L21/28E, G02F1/1362W, H01L23/482M, H01L27/12, H01L29/423D2B8, G02F1/1345, H01L29/49B, G02F1/1368|
|24 May 2011||FPAY||Fee payment|
Year of fee payment: 8
|21 Sep 2012||AS||Assignment|
Owner name: SAMSUNG DISPLAY CO., LTD., KOREA, REPUBLIC OF
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SAMSUNG ELECTRONICS CO., LTD.;REEL/FRAME:029019/0139
Effective date: 20120904
|29 May 2015||FPAY||Fee payment|
Year of fee payment: 12