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Publication numberUS9582696 B2
Publication typeGrant
Application numberUS 14/724,908
Publication date28 Feb 2017
Filing date29 May 2015
Priority date22 Jan 2001
Also published asUS7268924, US7428079, US7492493, US7817878, US8121440, US8559767, US9047525, US20020125317, US20060126129, US20080170275, US20090255993, US20110031314, US20120145789, US20140175174, US20150269402
Publication number14724908, 724908, US 9582696 B2, US 9582696B2, US-B2-9582696, US9582696 B2, US9582696B2
InventorsCharles P. Barber, Carl W. Gerst, George S. Smith, Robert M. Hussey, Robert C. Gardiner, Matthew W. Pankow
Original AssigneeHand Held Products, Inc.
Export CitationBiBTeX, EndNote, RefMan
External Links: USPTO, USPTO Assignment, Espacenet
Imaging apparatus having imaging assembly
US 9582696 B2
Abstract
There is described an imaging apparatus having an imaging assembly that includes an image sensor. The imaging apparatus can capture a frame of image data having image data corresponding to a first set of pixels of the image sensor. The imaging apparatus can capture a frame or image data having image data corresponding to a second set of pixels of the image sensor.
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Claims(20)
The invention claimed is:
1. An apparatus for reading indicia, comprising:
an imaging assembly comprising an image sensor having a plurality of pixels and optics for focusing an image onto the image sensor;
wherein the apparatus is operable during a single frame clock out period to:
capture a relatively smaller sized frame of image data using a first pixel clock out rate;
process the relatively smaller sized frame of image data;
responsively to processing the relatively smaller sized frame of image data, capture one or more relatively larger sized frames of image data using a second pixel clock out rate that is slower than the first pixel clock out rate, and
attempt to decode an indicia, the one or more relatively larger sized frames of image data having image data corresponding to a predetermined set of pixels of said image sensor and representing a larger portion of the indicia than image data of the relatively smaller sized frame of image data.
2. The apparatus of claim 1, wherein the apparatus is operable to capture the one or more relatively larger sized frame conditionally on the condition that the processing of the relatively smaller sized frame does not result in a successful decoding of the indicia.
3. The apparatus of claim 1, wherein the image sensor is a CMOS image sensor.
4. The apparatus of claim 1, wherein the one or more relatively larger sized frames of image data is a full frame of image data.
5. The apparatus of claim 1, comprising an illumination assembly.
6. The apparatus of claim 5, wherein:
the illumination assembly comprises a laser; and
the illumination assembly is adapted to project an aiming pattern.
7. The apparatus of claim 1, comprising an illumination assembly comprising a white LED.
8. The apparatus of claim 1, comprising a scan stand.
9. The apparatus of claim 1, wherein the apparatus is operative to attempt to decode a 1D indicia.
10. The apparatus of claim 1, wherein the apparatus is operative to attempt to decode a 2D indicia.
11. An apparatus for reading indicia, comprising:
an imaging assembly comprising an image sensor having a plurality of pixels and optics for focusing an image onto the image sensor;
wherein the apparatus is operable during a single frame clock out period to:
capture a first frame of image data having image data corresponding to a first set of pixels of the image sensor using a first pixel clock out rate;
process the first frame of image data;
responsively to processing the first frame of image data, determine a second set of pixels that is different from the first set of pixels; and
responsively to processing the first frame of image data, capture a second frame of image data using a second pixel clock out rate that is slower than the first pixel clock out rate, the second frame having image data corresponding to the second set of pixels of the image sensor for use in attempting to decode an indicia.
12. The apparatus of claim 11, comprising an illumination assembly.
13. The apparatus of claim 11, comprising an illumination assembly comprising a white LED.
14. The apparatus of claim 11, comprising a scan stand.
15. An apparatus for reading indicia, comprising:
an imaging assembly comprising an image sensor having a plurality of pixels and optics for focusing an image onto the image sensor;
wherein the apparatus is operable during a single frame clock out period to:
capture a first frame of image data having image data corresponding to a first set of pixels of the image sensor using a first pixel clock out rate;
process the first frame of image data to determine if the first frame of image data comprises a portion of a 2D indicia;
responsively to determining that the first frame of image data comprises a portion of a 2D indicia, determine a second set of pixels that is different from the first set of pixels; and
responsively to processing the first frame of image data, capture a second frame of image data using a second pixel clock out rate that is slower than the first pixel clock out rate, the second frame having image data corresponding to the second set of pixels of the image sensor for use in attempting to decode the 2D indicia.
16. The apparatus of claim 15, wherein the apparatus is operable to adaptively determine the position, size, orientation, and/or shape of the second set of pixels based on the first frame of image data.
17. The apparatus of claim 15, wherein the second set of pixels comprises more pixels than the first set of pixels.
18. The apparatus of claim 15, wherein the second set of pixels comprises a full frame of image data.
19. The apparatus of claim 15, comprising a laser for projecting an aiming pattern.
20. The apparatus of claim 15, comprising an illumination assembly.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims the benefit of U.S. patent application Ser. No. 14/053,175 for an Imaging Apparatus Having Imaging Assembly filed Oct. 14, 2013 (and published Jun. 26, 2014 as U.S. Patent Application Publication No. 2014/0175174), now U.S. Pat. No. 9,047,525, which claims the benefit of U.S. patent application Ser. No. 13/399,577 for an Imaging Apparatus Having Imaging Assembly filed Feb. 17, 2012 (and published Jun. 14, 2012 as U.S. Patent Application Publication No. 2012/0145789), now U.S. Pat. No. 8,559,767, which claims the benefit of U.S. patent application Ser. No. 12/906,728 for an Imaging Apparatus Having Imaging Assembly filed Oct. 18, 2010 (and published Feb. 10, 2011 as U.S. Patent Application Publication No. 2011/0031314), now U.S. Pat. No. 8,121,440, which claims the benefit of U.S. patent application Ser. No. 12/371,277 for an Imaging Apparatus Having Plurality of Operating States filed Feb. 13, 2009 (and published Oct. 15, 2009 as U.S. Patent Application Publication No. 2009/0255993), now U.S. Pat. No. 7,817,878, which claims the benefit of U.S. patent application Ser. No. 11/895,803 for a Bar Code Reading Device Having Plurality of Operating States filed Aug. 27, 2007 (and published Jul. 17, 2008 as U.S. Patent Application Publication No. 2008/0170275), now U.S. Pat. No. 7,492,493, which claims the benefit of U.S. patent application Ser. No. 09/766,922 for an Optical Reader Having Reduced Parameter Determination Delay filed Jan. 22, 2001 (and published Sep. 12, 2002 as U.S. Patent Application Publication No. 2002/0125317), now U.S. Pat. No. 7,268,924. Each of the foregoing patent applications, patent publications, and patents is hereby incorporated by reference in its entirety.

U.S. patent application Ser. No. 14/257,174 for a Reading Apparatus Having Partial Frame Operating Mode filed Apr. 21, 2014 (and published Oct. 9, 2014 as U.S. Patent Application Publication No. 2014/0299665), claims the benefit of U.S. patent application Ser. No. 13/892,921 for a Reading Apparatus Having Partial Frame Operating Mode filed May 13, 2013 (and published Sep. 26, 2013 as U.S. Patent Application Publication No. 2013/0248605), now U.S. Pat. No. 8,702,000, which claims the benefit of U.S. patent application Ser. No. 12/249,742 for a Reading Apparatus Having Partial Frame Operating Mode filed Oct. 10, 2008 (and published Feb. 5, 2009 as U.S. Patent Application Publication No. 2009/0032597) now U.S. Pat. No. 8,439,264, which claims the benefit of U.S. patent application Ser. No. 11/895,803 and U.S. patent application Ser. No. 09/766,922. U.S. patent application Ser. No. 14/257,174 also claims the benefit of U.S. patent application Ser. No. 11/637,231 for an Optical Reader Having Partial Frame Operating Mode filed Dec. 11, 2006 (and published Aug. 9, 2007 as U.S. Patent Application Publication No. 2007/0181693), now U.S. Pat. No. 7,434,733, which claims the benefit of U.S. patent application Ser. No. 10/651,298 for an Optical Reader Having Partial Frame Operating Mode filed Aug. 28, 2003 (and published Oct. 7, 2004 as U.S. Patent Application Publication No. 2004/0195332), now U.S. Pat. No. 7,270,273, which claims the benefit of U.S. patent application Ser. No. 09/766,806 for an Optical Reader Having Partial Frame Operating Mode filed Jan. 22, 2001 (and published Apr. 3, 2003 as U.S. Patent Application Publication No. 2003/0062418), now U.S. Pat. No. 6,637,658. Each of the foregoing patent applications, patent publications, and patents is hereby incorporated by reference in its entirety.

U.S. patent application Ser. No. 11/238,176 for a Bar Code Reading Device Having Partial Frame Image Capture Operating Mode filed Sep. 28, 2005 (and published Jun. 15, 2006 as U.S. Patent Application Publication No. 2006/0126129), now U.S. Pat. No. 7,428,079, also claims the benefit of U.S. patent application Ser. No. 09/766,922. Each of the foregoing patent applications, patent publication, and patent is hereby incorporated by reference in its entirety.

FIELD OF TECHNOLOGY

The present invention relates to an optical apparatus generally and particularly to an apparatus for use in indicia reading.

BACKGROUND

Prior to commencing comprehensive image data processing, which may include e.g., searching for symbol or character representations, decoding and character recognition processing, presently available optical readers clock out and capture in a memory location at least one exposure test frame of image data, read pixel data from the memory-stored exposure test frame to determine an exposure parameter value that is based on actual illumination conditions, then utilize the exposure parameter value in the exposure of a frame of image data that is clocked out, and then subjected to searching, decoding, and/or character recognition processing. The frame of image data exposed utilizing the exposure parameter based on actual illumination conditions is not available for reading until after it is clocked out. Presently available optical readers therefore exhibit an appreciable inherent exposure parameter determination delay. Readers having higher resolution imagers have slower frame clock out rates and therefore longer exposure parameter determination delays.

There is a growing demand for higher resolution optical readers, including optical readers that incorporate mega pixel image sensors. Accordingly, there is growing need to address the parameter determination delay problem associated with presently available optical readers.

Optical readers having 2D image sensors commonly are used to read both 1D and 2D symbols. Some optical readers having a 2D image sensor read a 1D symbol by capturing a 2D image representation, or “frame” of image data corresponding to a target area which comprises a 1D symbol, and launching a scan line or lines in order to attempt to decode for 1D symbols which may be represented in the area. Other optical readers having 2D image sensors read 1D symbols by capturing a 2D image representation of an area containing the 1D symbol, preliminarily analyzing the image data represented in the area to determine that the image data comprises a representation of a 1D symbol, and then launching a scan line in an attempt to decode for the 1D symbol determined to be present. In either case, a full frame 2D image representation is captured in order to decode for a 1D symbol.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1a and 1b are image maps illustrating possible low resolution frames of image data clock out during a low resolution frame clock out mode of the invention;

FIG. 2a is a block diagram of an optical reader of a type in which the invention may be incorporated;

FIGS. 2b-2h show various types of optical reader housings in which the invention may be incorporated;

FIG. 3a is a process flow diagram illustrating frame clocking operations in an optical reader having an image sensor including a one-frame buffer;

FIG. 3b is a time line illustrating frame clock out operations in a prior art optical reader;

FIG. 3c is a time line illustrating a frame clock out of operations in an optical reader operated according to the invention.

[Beginning of Section Excerpted from U.S. patent application Ser. No. 09/766,806].

FIGS. 4a-4g illustrate various image data patterns that may be captured by an optical reader operating in a partial frame capture mode according to the invention;

FIG. 5a is a block diagram of an optical reader of a type in which the invention may be incorporated;

FIGS. 5b-5h show various types of optical reader housings in which the invention may be incorporated.

[End of Section Excerpted from U.S. patent application Ser. No. 09/766,806].

SUMMARY

There is set forth herein an imaging apparatus having an imaging assembly that includes an image sensor. The imaging apparatus can capture a frame of image data having image data corresponding to a first set of pixels of the image sensor. The imaging apparatus can capture a frame of image data having image data corresponding to a second set of pixels of the image sensor.

DETAILED DESCRIPTION

When operated to generate valid pixel data, presently available optical reading devices clock out electrical signals corresponding to pixel positions of an image sensor at a uniform clock out rate such that the electrical signal corresponding to each pixel of the image sensor array accurately represents light incident on the pixel.

By contrast, an image sensor of the present invention is made to operate under two major frame capture modes, a “low resolution” frame clock out mode and a “normal resolution” frame clock out mode. In a “low resolution” mode of operation, an image sensor according to the invention is operated to clock out electrical signals corresponding to some pixels of an image sensor array at a high clock out rate and other pixels of the image sensor at a normal clock out rate. Clocking out a portion of the electrical signals using a faster than normal clock out rate results in a reduction in the overall frame clock out time while clocking out a portion of the signals at a normal clock out rate enables the generation of pixel data sufficient to enable determination of parameter settings for use in subsequent frame captures. In a “normal resolution” mode of operation the image sensor is operated to clock out electrical signals corresponding to pixels of the array using a single uniform clock out speed as in prior art readers. The low resolution mode of operation may also be carried out by clocking out electrical signals corresponding to only a portion of a frame's pixels and not clocking out electrical signals corresponding to the remaining pixels.

A reader configured in accordance with the invention clocks out and captures in a memory storage location at least one parameter determination frame of image data in a “low resolution” frame capture mode, reads pixels of the parameter determination frame in establishing at least one operation parameter that is based on actual illumination conditions, utilizes the determined operation parameter in clocking out a subsequent frame of image data in a “normal resolution mode,” then captures and subjects the frame of image data clocked out utilizing the operation parameter to image data searching, decoding, and/or recognition processing. The reader may be adapted to decode a decodable symbol represented in a frame of image data developed utilizing a determined operating parameter.

An optical reading system is which the invention may be employed is described with reference to the block diagram of FIG. 2 a.

Optical reader 10 includes an illumination assembly 20 for illuminating a target object T, such as a 1D or 2D bar code symbol, and an imaging assembly 30 for receiving an image of object T and generating an electrical output signal indicative of the data optically encoded therein. Illumination assembly 20 may, for example, include an illumination source assembly 22, together with an illuminating optics assembly 24, such as one or more lenses, diffusers, wedges, reflectors or a combination of such elements, for directing light from light source 22 in the direction of a target object T. Illumination assembly 20 may comprise, for example, laser or light emitting diodes (LEDs) such as white LEDs or red LEDs. Illumination assembly 20 may include target illumination and optics for projecting an aiming pattern 27 on target T. Illumination assembly 20 may be eliminated if ambient light levels are certain to be high enough to allow high quality images of object T to be taken. Imaging assembly 30 may include an image sensor 32, such as a 1D or 2D CCD, CMOS, NMOS, PMOS, CID OR CMD solid state image sensor, together with an imaging optics assembly 34 for receiving and focusing an image of object T onto image sensor 32. The array-based imaging assembly shown in FIG. 2a may be replaced by a laser array based imaging assembly comprising multiple laser sources, a scanning mechanism, emit and receive optics, at least one photodetector and accompanying signal processing circuitry.

Optical reader 10 of FIG. 2a also includes programmable control circuit 40 which preferably comprises an integrated circuit microprocessor 42 and an application specific integrated circuit (ASIC 44). The function of ASIC 44 could also be provided by field programmable gate array (FPGA). Processor 42 and ASIC 44 are both programmable control devices which are able to receive, output and process data in accordance with a stored program stored in memory unit 45 which may comprise such memory elements as a read/write random access memory or RAM 46 and an erasable read only memory or EROM 47. RAM 46 typically includes at least one volatile memory device but may include one or more long term non-volatile memory devices. Processor 42 and ASIC 44 are also both connected to a common bus 48 through which program data and working data, including address data, may be received and transmitted in either direction to any circuitry that is also connected thereto. Processor 42 and ASIC 44 differ from one another, however, in how they are made and how they are used.

More particularly, processor 42 is preferably a general purpose, off-the-shelf VLSI integrated circuit microprocessor which has overall control of the circuitry of FIG. 2a , but which devotes most of its time to decoding image data stored in RAM 46 in accordance with program data stored in EROM 47. Processor 44, on the other hand, is preferably a special purpose VLSI integrated circuit, such as a programmable logic or gate array, which is programmed to devote its time to functions other than decoding image data, and thereby relieve processor 42 from the burden of performing these functions.

The actual division of labor between processors 42 and 44 will naturally depend on the type of off-the-shelf microprocessors that are available, the type of image sensor which is used, the rate at which image data is output by imaging assembly 30, etc. There is nothing in principle, however, that requires that any particular division of labor be made between processors 42 and 44, or even that such a division be made at all. This is because special purpose processor 44 may be eliminated entirely if general purpose processor 42 is fast enough and powerful enough to perform all of the functions contemplated by the present invention. It will, therefore, be understood that neither the number of processors used, nor the division of labor there between, is of any fundamental significance for purposes of the present invention.

With processor architectures of the type shown in FIG. 2a , a typical division of labor between processors 42 and 44 will be as follows. Processor 42 is preferably devoted primarily to such tasks as decoding image data, once such data has been stored in RAM 46, recognizing characters represented in stored image data according to an optical character recognition (OCR) scheme, handling menuing options and reprogramming functions, processing commands and data received from control/data input unit 39 which may comprise such elements as trigger 74 and keyboard 78 and providing overall system level coordination.

Processor 44 is preferably devoted primarily to controlling the image acquisition process, the A/D conversion process and the storage of image data, including the ability to access memories 46 and 47 via a DMA channel. Processor 44 may also perform many timing and communication operations. Processor 44 may, for example, control the illumination of LEDs 22, the timing of image sensor 32 and an analog-to-digital (A/D) converter 36, the transmission and reception of data to and from a processor external to reader 10, through an RS-232, a network such as an Ethernet, a serial bus such as USB, a wireless communication link (or other) compatible I/O interface 37. Processor 44 may also control the outputting of user perceptible data via an output device 38, such as a beeper, a good read LED and/or a display monitor which may be provided by a liquid crystal display such as display 82. Control of output, display and I/O functions may also be shared between processors 42 and 44, as suggested by bus driver I/O and output/display devices 37′ and 38′ or may be duplicated, as suggested by microprocessor serial I/O ports 42A and 42B and I/O and display devices 37″ and 38′. As explained earlier, the specifics of this division of labor is of no significance to the present invention.

FIGS. 2b through 2g show examples of types of housings in which the present invention may be incorporated. FIGS. 2b-2g show 1D/2D optical readers 10-1, 10-2, and 10-3. Housing 12 of each of the optical readers 10-1 through 10-3 is adapted to be graspable by a human hand and has incorporated therein at least one trigger switch 74 for activating image capture and decoding and/or image capture and character recognition operations. Readers 10-1 and 10-2 include hard-wired communication links 79 for communication with external devices such as other data collection devices or a host processor, while reader 10-3 includes an antenna 80 for providing wireless communication device or a host processor.

In addition to the above elements, readers 10-2 and 10-3 each include a display 82 for displaying information to a user and a keyboard 78 for enabling a user to input commands and data into the reader.

Any one of the readers described with reference to FIGS. 2b through 2g may be mounted in a stationary position as is illustrated in FIG. 2h showing a generic optical reader 10 docked in a scan stand 90. Scan stand 90 adapts portable optical reader 10 for presentation mode scanning. In a presentation mode, reader 10 is held in a stationary position and an indicia bearing article is moved across the field of view of reader 10.

As will become clear from the ensuing description, the invention need not be incorporated in a portable optical reader. The invention may also be incorporated, for example, in association with a control circuit for controlling a non-portable fixed mount imaging assembly that captures image data representing image information formed on articles transported by an assembly line, or manually transported across a checkout counter at a retail point of sale location. Further, in portable embodiments of the invention, the reader need not be hand held. The reader may be part or wholly hand worn, finger worn, waist worn, or head worn for example.

Referring again to particular aspects of the invention, a low resolution frame clock out mode of the invention is described in detail with reference to the pixel maps of FIGS. 1a and 1b . Control circuit 40 establishes a clock out rate for clocking out an electrical signal corresponding to a pixel of an image sensor 32 by appropriate state control of control signals in communication with image sensor 32. In the present invention, image sensor 32 is selected to be of a type whose pixel clock out rate can be varied by way of control signals received from control circuit 40. In presently available optical readers, an image sensor's pixel clock out rate is not changed during the course of clocking out of a frame of image data.

In a “low resolution” frame clock out mode of the invention, however, control circuit 40 causes image sensor 32 to clock out electrical signals corresponding to the pixels of the array at least two speeds during a single frame capture period. During a single frame clock out period, control circuit 40 controls image sensor 32 so that some pixels are clocked out at normal clock out rate sufficient to develop electrical signals accurately representing the intensity of light at the respective pixel positions, while other pixels are either not clocked out or are clocked out at a clock out rate which may be insufficient to allow development of electrical signals that accurately represent the intensity of light at the respective pixels but which nevertheless results in a reduction of the overall frame clock out time of the frame of image data being clocked out.

FIG. 1a shows a schematic diagram of an exemplary image map frame that is clocked out according to the low resolution frame clock out mode of the invention and then captured into memory 45. The image map is divided into “zones” of valid data and invalid data. Valid zones 84 shown are rows of pixels that are clocked out at a normal clock out speed while invalid zones 86 shown are rows of pixels that are clocked out at a faster clock out speed, which is normally (but not necessarily) a speed insufficient to allow development of electrical signals accurately representing the intensity of light at a pixel.

FIG. 1b shows another possible division of an image map into valid zones and invalid zones. This type of embodiment in which valid zones 84 comprise less than full pixel rows is conveniently realized by appropriate control of an image sensor manufactured using CMOS fabrication methods. Using CMOS fabrication methods, an image sensor can be merged with a microprocessor, an ASIC, or another timing device on a single die to the end that a pre-established clocking sequence in which a pixel clock out rate is changed multiple times during the course of clock out a frame of image data may be actuated in response to the activation of a single control signal in communication with image sensor 32.

Using CMOS fabrication techniques, image sensors are readily made so that electrical signals corresponding to certain pixels of a sensor can be selectively clocked out without clocking out electrical signals corresponding to remaining pixels of the sensor. CMOS image sensors are available from such manufacturers as Symagery, Pixel Cam, Omni Vision, Sharp, Natural Semiconductor, Toshiba, Hewlett-Packard, and Mitsubishi. Further aspects of a partial frame clock out mode are described in commonly assigned application Ser. No. 09/766,806 entitled “Optical Reader Having Partial Frame Operating Mode,” now U.S. Pat. No. 6,637,658 filed concurrently herewith and incorporated herein by reference.

The invention is also conveniently realized with use of an image sensor having an image sensor discharge function. Image sensors having a discharge function are typically adapted to receive a discharge clock out signal which when active results in all pixels of a frame being read out at a high clock out rate insufficient to allow development of electrical signals. In presently available readers having a directional function, a control circuit sets the discharge clocking signal to an active state while clocking out an initial “discharge period” frame of image data immediately after reception of a trigger actuation. This initial discharge process removes any residual charges built up on image sensor 32 prior to capturing a first frame including valid pixel data.

For producing an image map divided into valid and invalid zones using an image sensor having a discharge function, control circuit 40 may be made to intermittently change the state of a discharge clock out signal during a frame clock out period during which image sensor 32 is otherwise operated according to a normal resolution clock out mode.

An exemplary embodiment of the invention in which the invention is employed in a reader equipped with a SONY ICX084AL CCD image sensor (that includes a one frame analog buffer memory) and a SONY CXD2434TQ timing generator is described with reference to FIGS. 3a, 3b and 3c . FIG. 3a shows a flow diagram, of an imaging system in which the image sensor includes a one frame buffer memory. For purposes of illustrating the advantages of the invention, FIG. 3b shows a time line illustrating the time required to clock out and capture a frame of image data useful for searching and decoding in a prior art reader having a buffer memory not configured to operate in accordance with a low resolution frame clock out mode. FIG. 3c shows a time line illustrating the time required to clock out and capture a frame of image data useful for searching, decoding, and recognizing characters in a reader having a buffer memory configured to operate in a low resolution frame clock out mode according to the invention.

When a reader includes a one frame buffer memory, then the activation of an appropriate frame clock out signal by image sensor 32 causes electrical charges representative of light on pixels of an image sensor's pixel array 32 a to be transferred to analog buffer memory 32 b and causes electrical signals corresponding to pixel value storage locations of buffer 32 b (representing light on the pixels during a previous timing period) to be clocked out to analog to digital converter 36 so that the frame of image data stored on buffer memory can be captured in memory 45, wherein the data may be read by control circuit 40.

Referring to time line 92 corresponding a prior art reader it can be seen that a substantial parameter determination delay is present without use of a low resolution frame capture mode according to the invention. At time T0, control circuit 40 activates a frame discharge control signal so that residual charges built up in the storage locations of buffer memory 32 b are eliminated or “cleaned” during clock out period CPO.

At time T1, control circuit 40 activates a frame clocking signal to commence the clock out a first frame of pixel data according to a normal resolution frame clock out mode (the pixel data clocked out during clock out period CP1 is normally invalid pixel data). During clock out period CP1, the charges built up on pixel array 32 a during clock out period CP0 are transferred to buffer memory 32 b and then clocked out to A/D converter 36. Also during clock out period CP1 pixel array 32 a is exposed to light for a time determined by an exposure parameter value, e0, that was previously transmitted at time Te0 prior to time T1. The exposure parameter e0 is based on previous exposure values during a previous trigger actuation period or based on expected illumination conditions, but is not based on actual illumination conditions present.

At time T2, control circuit 40 activates a frame clock out signal to commence the clock out of a second frame of image data in accordance with a normal resolution frame clock out mode. During clock out period CP2, the charges built up on pixel array 32 a during clock out period CP1 are transferred to buffer memory 32 b and then clocked out to A/D converter 36. Also during clock out period CP2 pixel array 32 is exposed to light for a time determined by an exposure parameter value, e1, that was previously transmitted at time Te1 prior to time T2. The exposure parameter e1, like exposure parameter e0, also cannot be based on actual illumination conditions since the most recent frame image data available for reading by circuit 40 prior to the transmittal of exposure parameter e1 is the invalid frame data resulting from transmittal of frame discharge signal at time T0.

At time T3, control circuit 40 activates a frame clock out signal to commence the capture of a third frame of image data in accordance with a normal resolution frame clock out mode. During clock out period CP3, the charges built up on pixel array 32 a during clock out period CP2 are transferred to buffer memory 32 b and then clocked out to A/D converter 36. Also during clock out period CP3, pixel array 32 a is exposed to light for a time determined by an exposure parameter value, e2, that was previously transmitted at time Te2 prior to time T3. Unlike the previous exposure values e0 and e1, the exposure parameter value e2 can be a value determined from actual illumination conditions since the frame of image data resulting from pixel array 32 a being exposed to light during clock out period CP1, is available for reading by control circuit 40 prior to the time that the exposure parameter e2 must be communicated to image sensor 32. However, because of the built in one frame delay resulting from the presence of buffer 32 b, it is seen that a frame of image data clocked out while being exposed with the exposure parameter value e2, determined based on actual illumination conditions, will not be available for reading by control circuit unit after the expiration of clocking period CP4. Accordingly, it can be seen that the above reader exhibits a typical parameter determination delay of four normal resolution clock out periods, CP1+CP2+CP3+CP4 plus the frame discharge clock out parameter CP0. The normal resolution frame clock out period of the above-referenced SONY image sensor is about 33.37 ms and the frame discharge period is about 8.33 ms, resulting in a typical-case total parameter determination delay in the example described of 140 ms (an earlier frame may be subjected to image data searching, decoding, and recognition if e0 or e1 yields an image of acceptable quality).

Advantages of operating image sensor 32 according to a low resolution frame clock out mode of operation are easily observable with reference to time line 94 corresponding to a reader having an image sensor operated in accordance with a low resolution frame clock out mode. In the example illustrated by time line 94 control circuit 40 operates image sensor as described in connection with FIG. 3b except that control circuit 40 operates image sensor 32 according to a low resolution frame clock out mode during clocking periods CP1, CP2, and CP3. Because electrical signals corresponding to only some of the pixels during these timing periods are clocked out at speeds sufficiently slow to read valid image data, the total frame clock out time associated with these clocking periods is significantly shorter than that of a frame clocked out according to a normal resolution frame clock out mode. In an exemplary embodiment in which control circuit 40 alternatingly changes the state of a discharge clock out control signal (known as an EFS signal) in communication with a SONY ICX084AL CCD image sensor, to result in a zone division pattern having valid zones comprising four pixel rows clocked out at normal speed bounded by invalid rows having eighteen rows of pixels clocked out at high speed, the low resolution frame clock out rate is 8.52 ms. The overall typical parameter determination delay is therefore reduced to T0+T1+T2+T3+T4=66.2 ms as compared to the 140 ms delay in the prior art reader example described with reference to FIG. 3 a.

In the example described in which image sensor 32 comprises a one frame buffer 32 b, pixel array 32 a is exposed to light for at least some time currently as electrical signals are clocked out from buffer 32 b. In the control of presently available image sensors that do not have one frame buffers, frame clock out periods normally follow frame exposure periods without overlapping the exposure periods.

A low resolution parameter determination frame of image data clocked out using a low resolution clock out mode is useful for determining an exposure control parameter because exposure parameter values can be accurately determined by sampling only a small percentage of pixel values from a frame of image data. In fact, for improving the processing speed of an optical reader it is preferred to determine an exposure control value based on a sampling of a small percentage of pixel values from a frame of image data. The proper exposure parameter setting varies substantially linearly with illumination conditions, and therefore is readily determined based on a sampling of pixel values from a single frame of image data.

Additional reader operating parameters can be determined by reading pixel values from a frame of image data clocked out according to a low resolution clock out mode of the invention. These additional parameters which may be determined from a low resolution parameter determining frame of image data include an amplification parameter for adjusting the gain of an amplifier prior to analog-to-digital conversion, an illumination level parameter for adjusting the current level delivered to, and therefore the radiance of light emitted from LEDs 22, an illumination time parameter for adjusting the on-time of LEDs 22, a light level parameter for adjusting a light level of a subsequently captured frame of image data, a dark level parameter for adjusting a dark level of a subsequently captured frame of image data, and an analog-to-digital converter reference parameter for adjusting a reference voltage of analog-to-digital converter 36.

Referring to FIGS. 4a-4g the invention is an optical reader equipped with a 2D image sensor that is configured to operate in a partial frame capture mode. In a partial frame clock out mode, a control circuit of an optical reader clocks out (or “reads”) electrical signals corresponding to less than all of the 2D image sensor's pixels, and captures image data corresponding to the pixel locations into memory.

Partial frames of image data which may be clocked out and captured by an optical reader control circuit during a partial frame capture mode are illustrated in FIGS. 4a-4g in which valid zones 212 represent frame image data corresponding to image sensor pixel positions that are clocked out and invalid zones (indicated by the shaded regions of the views of FIGS. 4a-4g ) represent potential image data positions corresponding to pixel positions that are not clocked out.

Border 210 defines the full field of view of an optical reader in the case the reader is operated in a full frame captured mode while symbols 216-1, 216-2, 216-3, 216-4, 216-6 and 216-7 are symbols entirely within the full field of view of an optical reader defined by border 10 but are only partially within certain valid zones shown. Valid zones 212-1, 212-3, 212-7, 212-8, 212-9, 212-10, and 212-13 are valid zones of image data that partially contain representations of a decodable symbol while valid zones 212-11 and 212-12 are valid zones of image data captured during a partial frame capture mode which contain representations of an entire decodable symbol.

In the examples illustrated with reference to FIGS. 4a-4e an optical reader operating in a partial frame clock out mode clocks out electrical signals corresponding to linear patterns of pixels. It is useful to cause a reader to clock out electrical signals corresponding to linear patterns as shown in FIGS. 4a-4d when a reader will be used to decode mainly 1D linear bar code symbols.

In the examples illustrated with reference to FIGS. 4f and 4g an optical reader operating in a partial frame clock out mode clocks out electrical signals corresponding to non-linear groupings of pixels. It is useful to cause a reader to clock out electrical signals corresponding to pixel groupings as shown in FIGS. 4f and 4g when a reader will be used to decode symbols which are expected to be within a certain position in an image sensor's field of view.

A reader may be configured so that the reader automatically switches out of partial frame capture mode on the sensing of a certain condition. For example a reader according to the invention may be made to switch out of partial frame capture operating mode and into a full frame capture mode on the sensing that a 2D symbol is partially represented in the partial frame of image data, or on the condition that processing of the partial frame of image data fails to result in image data being decoded.

An optical reading system in which the invention may be employed is described with reference to the block diagram of FIG. 5 a.

Optical reader 110 includes an illumination assembly 120 for illuminating a target object T, such as a 1D or 2D bar code symbol, and an imaging assembly 130 for receiving an image of object T and generating an electrical output signal indicative of the data optically encoded therein. Illumination assembly 120 may, for example, include an illumination source assembly 122, together with an illuminating optics assembly 124, such as one or more lenses, diffusers, wedges, reflectors or a combination of such elements, for directing light from light source 122 in the direction of a target object T. Illumination assembly 120 may comprise, for example, laser or light emitting diodes (LEDs) such as white LEDs or red LEDs. Illumination assembly 120 may include target illumination and optics for projecting an aiming pattern 127 on target T. Illumination assembly 120 may be eliminated if ambient light levels are certain to be high enough to allow high quality images of object T to be taken. Imaging assembly 130 may include an image sensor 132, such as a 1D or 2D CCD, CMOS, NMOS, PMOS, CID OR CMD solid state image sensor, together with an imaging optics assembly 134 for receiving and focusing an image of object T onto image sensor 132. The array-based imaging assembly shown in FIG. 5a may be replaced by a laser array based imaging assembly comprising multiple laser sources, a scanning mechanism, emit and receive optics, at least one photodetector and accompanying signal processing circuitry.

The partial frame clock out mode is readily implemented utilizing an image sensor which can be commanded to clock out partial frames of image data or which is configured with pixels that can be individually addressed. Using CMOS fabrication techniques, image sensors are readily made so that electrical signals corresponding to certain pixels of a sensor can be selectively clocked out without clocking out electrical signals corresponding to remaining pixels of the sensor. CMOS image sensors are available from such manufacturers as Symagery, Pixel Cam, Omni Vision, Sharp, National Semiconductor, Toshiba, Hewlett-Packard, and Mitsubishi. A partial frame clock out mode can also be carried out by selectively activating a frame discharge signal during the course of clocking out a frame of image data from a CCD image sensor, as is explained in concurrently filed U.S. patent application Ser. No. 09/766,922, entitled “Optical Reader Having Reduced Parameter Determination Delay,” incorporated previously herein by reference.

Optical reader 110 of FIG. 5a also includes programmable control circuit 140 which preferably comprises an integrated circuit microprocessor 142 and an application specific integrated circuit (ASIC 144). The function of ASIC 144 could also be provided by field programmable gate array (FPGA). Processor 142 and ASIC 144 are both programmable control devices which are able to receive, output, and process data in accordance with a stored program stored in memory unit 145 which may comprise such memory elements as a read/write random access memory or RAM 146 and an erasable read only memory or EROM 147. RAM 146 typically includes at least one volatile memory device but may include one or more long term non-volatile memory devices. Processor 142 and ASIC 144 are also both connected to a common bus 148 through which program data and working data, including address data, may be received and transmitted in either direction to any circuitry that is also connected thereto. Processor 142 and ASIC 144 differ from one another, however, in how they are made and how they are used.

More particularly, processor 142 is preferably a general purpose, off-the-shelf VLSI integrated circuit microprocessor which has overall control of the circuitry of FIG. 5a , but which devotes most of its time to decoding image data stored in RAM 146 in accordance with program data stored in EROM 147. Processor 144, on the other hand, is preferably a special purpose VLSI integrated circuit, such as a programmable logic or gate array, which is programmed to devote its time to functions other than decoding image data and, thereby, relieve processor 142 from the burden of performing these functions.

The actual division of labor between processors 142 and 144 will naturally depend on the type of off-the-shelf microprocessors that are available, the type of image sensor which is used, the rate at which image data is output by imaging assembly 130, etc. There is nothing in principle, however, that requires that any particular division of labor be made between processors 142 and 144, or even that such a division be made at all. This is because special purpose processor 144 may be eliminated entirely if general purpose processor 142 is fast enough and powerful enough to perform all of the functions contemplated by the present invention. It will, therefore, be understood that neither the number of processors used, nor the division of labor there between, is of any fundamental significance for purposes of the present invention.

With processor architectures of the type shown in FIG. 5a , a typical division of labor between processors 142 and 144 will be as follows. Processor 142 is preferably devoted primarily to such tasks as decoding image data, once such data has been stored in RAM 146, recognizing characters represented in stored image data according to an optical character recognition (OCR) scheme, handling menuing options and reprogramming functions, processing commands and data received from control/data input unit 139 which may comprise such elements as trigger 174 and keyboard 178 and providing overall system level coordination.

Processor 144 is preferably devoted primarily to controlling the image acquisition process, the A/D conversion process and the storage of image data, including the ability to access memories 146 and 147 via a DMA channel. Processor 144 may also perform many timing and communication operations. Processor 144 may, for example, control the illumination of LEDs 122, the timing of image sensor 132 and an analog-to-digital (A/D) converter 136, the transmission and reception of data to and from a processor external to reader 110, through an RS-232, a network such as an Ethernet, a serial bus such as USB, a wireless communication link (or other) compatible I/O interface 137. Processor 144 may also control the outputting of user perceptible data via an output device 138, such as a beeper, a good read LED and/or a display monitor which may be provided by a liquid crystal display such as display 182. Control of output, display and I/O functions may also be shared between processors 142 and 144, as suggested by bus driver I/O and output/display devices 137′ and 138′ or may be duplicated, as suggested by microprocessor serial I/O ports 142A and 142B and I/O and display devices 137′ and 138′. As explained earlier, the specifics of this division of labor is of no significance to the present invention.

Some or all of the above optical and electronic components may be incorporated in an imaging module as are described in commonly assigned U.S. patent application Ser. No. 09/411,936, incorporated herein by reference.

FIGS. 5b-5g show examples of types of housings in which the present invention may be incorporated. FIGS. 5b-5g show 1D/2D optical readers 110-1, 110-2, and 110-3. Housing 112 of each of the optical readers 110-1 through 110-3 is adapted to be graspable by a human hand and has incorporated therein at least one trigger switch 174 for activating image capture and decoding and/or image capture and character recognition operations. Readers 110-1 and 110-2 include hard-wired communication links 179 for communication with external devices such as other data collection devices or a host processor, while reader 110-3 includes an antenna 180 for providing wireless communication device or a host processor.

In addition to the above elements, readers 110-2 and 110-3 each include a display 182 for displaying information to a user and a keyboard 178 for enabling a user to input commands and data into the reader. Control circuit 140 may cause a graphical user interface (GUI) to be displayed on display 182. A pointer on the GUI may be moved by an actuator or actuators protruding from housing 112.

Any one of the readers described with reference to FIGS. 5b-5g may be mounted in a stationary position as is illustrated in FIG. 5h showing a generic optical reader 110 docked in a scan stand 190. Scan stand 190 adapts portable optical reader 110 for presentation mode scanning. In a presentation mode, reader 110 is held in a stationary position and an indicia bearing article is moved across the field of view of reader 110.

As will become clear from the ensuing description, the invention need not be incorporated in a portable optical reader. The invention may also be incorporated, for example, in association with a control circuit for controlling a non-portable fixed mount imaging assembly that captures image data representing image information formed on articles transported by an assembly line, or manually transported across a checkout counter at a retail point-of-sale location. Further, in portable embodiments of the invention, the reader need not be hand held. The reader may be part or wholly hand worn, finger worn, waist worn, or head worn for example.

Referring again to particular aspects of the invention, control circuit 140 in the example of FIG. 4a executes a partial frame capture mode in order to clock out and capture pixel data illustrated by valid zone 212-1. Reading the pixel values of valid zone 212-1 is effective to decode 1D symbol 216-1 in the reader's full field of view. Given that clocking out and capturing image data of valid zone 212-1 consumes less time than clocking out and capturing a full frame of image data, it is seen that execution of a partial frame capture mode decreases the decode time of the reader. In prior art 2D optical readers, electrical signals corresponding to full frame 210 are clocked out in order to decode a single 1D symbol 216-1. The pixels of valid zone 212-1 may comprise a single row of pixels (a scan line) or a plurality of rows.

In the example of FIG. 4b , of control circuit 140 executes a partial frame capture mode in order to capture data defining valid zones 212-2, 212-3 and 212-4 of a full frame of image data corresponding to a full field of view of a 2D image sensor. Valid zones 212-2, 212-3, and 212-4 are line patterns of image data at various angular orientations. Reading of pixels of line valid zones arranged at various angular orientations is effective to decode a 1D symbol which may be located at an oblique angle in a field of view. It is seen that reading of pixels of line valid zone 212-3 will result in the successful decoding of 1D bar code symbol 216-2. Zones 212-2, 212-3, and 212-4 may be one or more pixels wide.

In the example of FIG. 4c , control circuit 140 executes a partial frame capture mode in order to clock out and capture image data defining valid zones 212-5 through 212-9. Valid zones 212-5 to 212-9 form a plurality of horizontal parallel lines. The pattern of valid zones shown in FIG. 4c clocked out and captured in a partial frame capture mode is effective for decoding substantially horizontally oriented 1D symbols which are at an unknown height in a full field of view. It is seen that the reading of image data of valid zone 212-8 will not result in the decoding of symbol 216-3 because symbol 216-3 is not a 1D symbol. Nevertheless, because valid zone 212-8 intersects symbol bullseye 216-6, reading of image data of valid zone 212-8 may be effective to determine that a 2D symbol is likely present in the full field of view of image sensor 132. In one aspect of the invention, reader 110 may be configured to switch out of a partial frame capture mode and into a full frame capture mode when reading of image data captured in the partial frame capture mode reveals that a 2D symbol is likely to be represented in the image data corresponding to the image sensor's full field of view.

The states of operation of reader 110 operating in accordance with the invention are normally selected by actuating appropriate buttons of keyboard 178, or control of a GUI, or by the reading of menuing symbols, as are explained in commonly assigned U.S. Pat. No. 5,929,418 incorporated herein by reference.

It should be apparent that several operating states of the invention are possible. In a first operating state, reader 110 is made to operate only in a partial frame capture mode until the time the first operating state is deactivated.

In a second operating state, as is alluded to in the example of FIG. 4c , the reader operates in a partial frame capture mode until the time that reading of image data captured in the partial frame capture mode reveals that a 2D symbol is likely to be included in the full frame field of view of image sensor 132. When reading of the partial frame of image data reveals that a 2D symbol is likely to be included in a full frame field of view, control circuit 140 captures at least one full frame of image data from sensor 132 and attempts to decode for the 2D symbol determined likely to be represented in the full frame of image data. A reader operating in the second operating state may also be made to switch to a full frame operating mode on the condition that a symbol is not successfully decoded during operation of the reader in the partial frame operating mode.

A third operating state of a reader operating in accordance with the invention is described with reference to FIGS. 4d and 4e . Operating in accordance with a third operating state, a reader operates in a partial frame capture mode to clock out and capture image data of valid zone 212-10 which corresponds to a predetermined pattern and position in field of view 210. It is seen that reading of image data of zone 212-10 will not be effective to decode symbol 216-4 because symbol 216-4 is of a type of 2D symbol known as a stacked linear bar code. Control circuit 140 may nevertheless detect that symbol is a 2D symbol given that valid zone 212-10 intersects a finder pattern 216 f of symbol 216-4.

Sensing that a 2D symbol is likely present in the field of view when reading the partial frame image data corresponding to valid zone 212-10, the reader operating in the third operating state then continues to operate in a partial frame mode to clock out and capture image data that defines a second valid zone 212-11 of pixel positions as seen in FIG. 4e . The second valid zone 212-11 is not of a predetermined size and position, but rather is of an adaptive position whose position, and possibly size, orientation and shape depends on the result of the reading of the image data corresponding to the first valid zone 212-10. Specifically, the second valid zone 212-11 is normally at least of a size and position that is likely to encompass the symbol 216-5 detected to be present when reading of the image data of first valid zone 212-10 (labeled 216-4 in FIG. 4d ). It is seen that the third operating state is likely to be operative to further reduce the clocking out and capture of irrelevant image data, and therefore is likely to further increase decoding speed. In the third operating state, additional adaptive position valid zones may be clocked out and captured if the reading of image data of first adaptive valid zone 212-11 does not result in a symbol being decoded.

In the example of FIGS. 4f and 41g valid zones 212-12 and 212-13 correspond to nonlinear groupings of pixels. Capturing of the valid zone patterns 212-12 and 212-13 of FIGS. 4f and 4g is particularly useful for decoding symbol image data in the case that a symbol is likely to be at a certain position in relation to an image sensor's full frame field of view such as in the center of an image sensor's field of view as shown in FIG. 4 f.

In the example of FIG. 4f control circuit 140 can successfully decode symbol 216-6 because symbol 216-6 is located entirely within valid zone 212-12.

In the example of FIG. 4g , control circuit 140 cannot decode symbol 216-7 if operating in the first operating state since symbol 216-7 is a 2D symbol and is not entirely located within valid zone 212-13. If operating in the second operating state, then a reader capturing image data within valid zone 212-13 may successfully decode symbol 216-7 by reading the image data of zone 212-13 to determine that a 2D symbol is present, switching operation to a full frame capture mode to capture a full frame 210 of image data, and processing the full frame of image data to decode symbol 216-7. A reader operating in the third operating state described hereinabove may decode symbol 216-7, in the example of FIG. 4g , by reading image data within valid zone 212-13, capturing image data within an adaptively defined valid zone (not shown) of sufficient size and position to encompass symbol 216-7, and then processing the image data within the adaptively defined valid zone to decode symbol 216-7.

A bar code reading device having an image sensor including a plurality of pixels can be operated to capture a parameter determination frame of image data, wherein the parameter determination frame of image data includes image data corresponding to light incident at less than all of the pixels of the image sensor. A bar code reading device can also be operated in an image capture operating mode in which a partial frame of image data is captured, wherein the partial frame of image data includes image data corresponding to light incident at less all of the pixels of the image sensor, and wherein image data of the partial frame can be processed in order to attempt to decode a bar code symbol.

According to its major aspects and broadly stated, the present invention is a method for controlling an optical reader to reduce the reader's parameter determination delay. According to the invention, an image sensor is adapted to clock out image data from an image sensor according to two modes of operation, a “low resolution” clock out mode of operation and a “normal resolution” clock out mode of operation.

In a low resolution mode, some pixels of the reader's image sensor pixel array are clocked out at a normal clock out speed sufficient to develop electrical signals that accurately represent the intensity of light incident on the pixel array, while other pixels of the array are either not clocked out or are clocked out at a higher clock out rate which is insufficient to allow development of electrical signals that accurately represent the intensity of light at the respective pixels but which nevertheless, result in an increase in the overall frame clock out rate of the frame of image data. In a normal resolution mode of operation the image sensor is caused to clock out electrical signals corresponding to each pixel of the array at a constant “normal mode” speed which is a speed sufficient to ensure that the electrical signal corresponding to each pixel accurately represents the intensity of light incident on the pixel.

An optical reader according to the invention operates an image sensor in a low resolution mode of operation in order to clock out and capture a parameter-determining frame of image data at high speed, reads pixel data from the parameter determination frame to determine an operation parameter based on actual illumination conditions, then utilizes the operation parameter in operating an image sensor according to high resolution mode in the clocking out of a succeeding frame of image data that is captured and subjected to comprehensive image data processing which may include image data searching, decoding, and/or recognition processing. Clocking out some of the pixels of an array at high speed during execution of the low resolution mode significantly decreases the reader's parameter determination delay.

These parameters determined by reading pixel values from a low resolution parameter determination frame of image data according to the invention may include an exposure time parameter, an amplification parameter for controlling amplification of an electrical signal prior to its analog to digital conversion, an illumination level parameter (intensity or period of illumination), a dark or light level adjustment parameter and an analog-to-digital converter reference voltage parameter for adjusting the high and/or low reference voltages of the reader's analog to digital converter.

In the present invention, an optical reader image sensor is adapted to clock out image data from an image sensor according to “low resolution” mode of operation in order to reduce a parameter determination delay of the reader. In a low resolution mode, some pixels of the readers image sensor array are clock out at normal clock out speed sufficient to develop electrical signals accurately reflecting the intensity of light at the respective pixel positions, while other pixels of the array are either not clocked out or are clocked out at a higher clock out rate which may be insufficient to allow development of electrical signals that accurately represent light incident on the image sensor's sensor array but which nevertheless, results in a reduction of the overall frame clock out rate of the frame of image data. An optical reader according to the invention operates in a low resolution frame clock out mode to capture a low resolution parameter determining frame of image data at high speed, reads pixel data from the parameter determination frame to determine an operation parameter based on actual illumination conditions, then utilizes the operation parameter in operating an optical reader.

[Beginning of Section Excerpted From U.S. patent application Ser. No. 09/766,806].

The invention is a method for configuring an optical reader having a 2D image sensor so the reader captures and processes image data at higher speeds.

According to the invention, a control circuit of an optical reader equipped with a 2D image sensor is configured to operate in a partial frame operating mode. In a partial frame operating mode, the control circuit clocks out and captures less than a full frame of image data and processes that image data. The control circuit may process the image data of the partial frame, for example, by reading the image data from memory and outputting the image data to an output location such as a display device or a processor system in communication with the reader, by reading and attempting to decode decodable symbols which may be recorded in the partial frame, or by reading and performing optical character recognition on characters represented in the partial frame of image data.

In one embodiment, the partial frame operating mode is employed to clock out and capture image data corresponding to at least one linear pattern sufficient so that a 1D symbol in the field of view of the image sensor may be decoded without clocking out and capturing an entire frame of image data. The partial frame of image data that is clocked out from the image sensor during the partial frame capture operating mode may be, for example, a row of pixels at or near the center of the image sensor or a limited number of lines of image data corresponding to pixel locations of the image sensor, possibly at varying angular orientations. The control circuit may be configured so that if the control circuit cannot decode a 1D symbol during the course of operating in the partial frame capture mode, or detects that a 2D symbol is represented in the captured image data, the control circuit switches operation to a full frame capture mode.

In another embodiment, the partial frame operating mode is employed to clock out and capture pixel values corresponding to a grouping of pixels at or near a center of an image sensor other than a linear pattern of pixels. This embodiment may be advantageously employed in cases where decodable symbols are expected to be concentrated proximate a center of an image sensor's field of view. A control circuit may be configured so that if the control circuit cannot decode a symbol represented in the partial frame, or determines that a symbol is represented partially or entirely outside the image data of the partial frame, the control circuit automatically switches operation to a full frame image capture mode.

The invention is an optical reader having a 2D image sensor that is configured to operate in a partial frame capture mode. In a partial frame operating mode, the reader clocks out and captures at least one partial frame of image data having image data corresponding to less than all of the pixels of an image sensor pixel array. In one embodiment, the reader operating in a partial frame operating mode captures image data corresponding to a linear pattern of pixels of the image sensor, reads the image data, attempts to decode for a decodable 1D symbol which may be represented in the image data, and captures a full frame of image data if the image data reading reveals a 2D symbol is likely to be present in a full field of view of the 2D image sensor.

[End of Section Excerpted from U.S. patent application Ser. No. 09/766,806].

While the present invention has been explained with reference to the structure disclosed herein, it is not confined to the details set forth and this invention is intended to cover any modifications and changes as may come within the scope of the following claims.

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13Marshall Electronics, Optical Systems Division, Monochrome Monolithic Image Sensor With Analogue and Digital Outputs WL1070 Specification, Believed to be published in Dec. 1994, pp. 1-24.
14Micron's Wide VGA MT9V022 Image sensor from Micron Technology, Inc., 8000 South Federal Way, Post Office Box 6, Boise, ID 83707-0006, http://download.micro.com/pdf/flyers/mt9v022 (mi-0350) flyer,pdf, pp. 1-2, Dec. 2004.
15PC Card Standard 8.0 Release-Apr. 2001 maintained by the Personel Computer Memory Card International Association (PCMCIA) and available through the website at http://www.pcmcia.org. pp. 1-2.
16Sony Corporation, ICX084AL, Technical Specification, Believed to be published prior to Jan. 22, 2000.
17Symbol Technologies, Inc., LS 4800 Series Product Reference Guide, May 1996, Holtsville, NY.
18Tian, Hui et al., "Analysis of 1/f Noise in Switched MOSFET Circuits," Information Systems Laboratory, Electrical Engineering Department, Stanford University, Stanford, California 94305, 21 pp. Aug. 2000.
19U.S. Appl. No. 09/411,936, filed Oct. 4, 1999, now abandoned.
20VLSI Vision Ltd., High Resolution EIA/CCIR Monochrome Camera Specification, WL-1060, Apr. 1994, pp. 1-23.
21VLSI Vision Ltd., Serial Interface Specification, WL-1060, Apr. 1994, pp. 1-9.
22WL1070 Engineering Evaluation Kit Specification, Sep. 27, 1994, V1.1, pp. 1-5.
Classifications
International ClassificationG06K7/14, G06K7/10, H04N5/374
Cooperative ClassificationH04N5/343, G06K7/10821, H04N5/374, G06K7/1413, G06K7/10732, G06K7/10722, G06K7/1417