US3885197A

US3885197A - Light dimmer

Info

Publication number: US3885197A
Application number: US438687A
Authority: US
Inventors: Adrian Moses
Original assignee: Lear Siegler Inc
Current assignee: Lear Siegler Inc
Priority date: 1974-02-01
Filing date: 1974-02-01
Publication date: 1975-05-20
Anticipated expiration: 1992-05-20

Abstract

The traffic light dimmer saves electrical energy in the nighttime hours by passing only a given number of cycles of alternating current to the lights during successive time intervals. Essentially, a switch is connected between the source of energy and the traffic lights and a gating pulse is initiated every Nth cycle of the alternating voltage source. The time width of the gating pulse can be adjusted between zero and the time for N cycles to pass so that a desired lesser number of cycles defined by the pulse width can be passed or excluded by the switch thereby supplying less power to the lights. A photo cell or equivalent device can be used to start the dimmer circuit at night fall.

Description

United States Patent 11 1 Moses 1 1 LIGHT DIMMER [75] Inventor: Adrian Moses, Newhall. Calif.

[73} Assignee: Lear Siegler, Inc., Santa Monica,

Calif.

22 Filed: Feb. 1, 1974 211 Appl. No.: 438,687

m. CKT.

Logic Circuit Control Unit 1 May 20, 1975 Primary Examiner-Nathan Kaufman Attorney, Agent, or Firm-Pastoriza & Kelly [57] ABSTRACT The traffic light dimmer saves electrical energy in the night-time hours by passing only a given number of cycles of alternating current to the lights during successive time intervals. Essentially, a switch is connected between the source of energy and the traffic lights and a gating pulse is initiated every N cycle of the alternating voltage source. The time width of the gating pulse can be adjusted between zero and the time for N cycles to pass so that a desired lesser number of cycles defined by the pulse width can be passed or excluded by the switch thereby supplying less power to the lights. A photo cell or equivalent device can be used to start the dimmer circuit at night fall.

6 Claims, 3 Drawing Figures LIGHT DIMMER This invention relates generally to dimming circuits and more particularly to a circuit for dimming traffic lights during night-time hours.

BACKGROUND OF THE INVENTION Traffic signal lights are ordinarily provided with sufficient power to be distinguished in bright day-time sunlight. Consequently, the light output exceeds the nighttime requirements by a large factor, possibly by a factor of 10.

The unnecessary, excess light at night represents a substantial energy loss.

Normally, traffic signal lights are operated by a control unit, generally housed within a weatherproof cabinet at the particular intersection or other location of the traffic light. Normal l lS-volt 60-cycle power is required for operating these control units to in turn control the traffic lights. This power source may be tapped from available power used for conventional street light- While a simple solution for conserving power at night-time would appear to be a simple dimming of street lights as well as traffic lights, any diminution in the basic power supplied to the street and traffic lights would also affect the control unit which requires full power for proper switching of the lights. Moreover, while the street lights might be dimmed to threequarters or one-half magnitude, the traffic lights themselves could be dimmed a substantially greater amount since they are normally provided with sufficient energy to be clearly visible in the day-time.

A general diminution of power from a power station to conserve energy insofar as traffic lights are concerned is thus really not feasible.

BRIEF DESCRIPTION OF THE PRESENT INVENTION The present invention contemplates a dimmer circuit designed to be incorporated in the available control units associated with the traffic signal lights themselves in such a manner as to effect proper dimming of the lights during night-time hours to conserve energy without interfering with the normal power requirements required for the control unit. Moreover, the dimming control for the traffic lights is such as to achieve dimming control with a desired selection of the amount of dimming with low noise generation and low power dissipation. Further, a balanced condition is maintained on the power lines.

By connecting the dimmer circuit into the control unit, all of the traffic lights at an intersection are simultaneously subject to the dimming operation.

Briefly, the dimmer circuit itself contemplates a switch means connected between a tapped off connection from the source of power normally supplying the control unit and the traffic lights. Means connected to the source provide a gating pulse each N cycle of the source. The time width of this gating pulse in turn is adjusted to encompass n cycles of the alternating power source where n is less than N and wherein each of the n cycles constitutes a full wave form over 360. Means are then provided for passing the gating pulse to the switch means to open the switch means every N" cycle for the duration of n cycles whereby n/N of the power of the AC. source is not passed to the traffic lights and therefore saved.

By removing one or more whole cycles from the power source, a balanced condition is maintained and yet desired dimming and thus power savings result.

BRIEF DESCRIPTION OF THE DRAWINGS A better understanding of this invention will be had by now referring to the accompanying drawings in which:

FIG. 1 is a schematic diagram partly in block form illustrating a series of traffic lights which might be at a typical intersection together with a control unit incorporating the dimmer circuit of this invention;

FIG. 2 is a more detailed diagram of the basic components making up the dimmer circuit used in FIG. 1; and,

FIG. 3 illustrates various wave forms occurring at correspondingly lettered points in the diagram of FIG. 2, useful in explaining the operation of the invention.

DETAILED DESCRIPTION OF THE INVENTION Referring first to FIG. 1 there is shown in the righthand portion a series of

traffic lights

10, 10a, 10b, and so forth. At any one busy intersection, there may be as many as eight or 10 such signal units each normally incorporating a red, yellow and green light as indicated by the letters R, Y and G in FIG. 1.

All of the signal lights at a single intersection are normally controlled by one control unit in a weatherproof housing or cabinet 11. As shown in FIG. 1, the unit within the housing is supplied from an external 1 l5-volt AC. power source as by an input line 12. This power passes directly to a logic circuit 13 incorporating a suitable timer for controlling the switching operation of the lights. For example, there are shown switches 8-1, 5-2 and 8-3 for supplying power to the red lights, yellow lights, and green lights in a properly timed sequence under control of the logic circuit 13. Power to the lights is normally tapped from the llS-volt A.C. line 12 to pass directly to the switches by way of line 14.

In accord with the present invention, a dimmer circuit indicated by the block 15 is incorporated in the cabinet 11 and has its input and

output terminals

16 and 17 interposed between the 1l5-volt A.C. line 12 and line 14 to the switches. The output lines from the respective switches are shown at 18, 19 and 20 and suitable tap-off leads from these lines connect to the

traffic lights

10, 10a, 10b and so forth. Opening and closing of the switches in proper sequence is effected by suitable control signals from the logic circuit 13 passed to the switches through

lines

21, 22 and 23 as shown.

With the dimmer circuit 15 in the power supply line, a diminished amount of power may be passed to the various traffic lights without interfering with the normal l lS-volt A.C. supply to the controlling logic circuit 13.

The dimmer circuit is so designed that when it is not in operation, normal power will be supplied on the power line 14 from the main input power line 12. A suitable control which might, for example, constitute a photo cell 24 may be provided on the cabinet 11 to initiate operation of the dimming circuit 15 when the ambient light falls below a given level.

Referring now to FIG. 2, the dimmer circuit 15 itself is shown in greater detail. Essentially, the input terminal 16 receiving the l l-volt A.C. power connects directly to a power line to a power switch means 26, the other side of which connects to the output terminal 17. The power switch means 26 which is normally closed, may include a suitable circuit incorporating Triac type power switches or any equivalent switch means responsive to a gating signal to open for a given time duration.

The gating control signal to the power switch means 26 is in turn provided by a zero cross-over detector means 27 and dividing circuit 28. The zero cross-over detector circuit 27 includes an NPN transistor Q1 which functions to generate square pulses having leading and trailing edges at each zero cross-over of the 1 l S-volt A.C. signal at the input terminal 16. These signals are picked off the collector terminal of the transistor Q1 and passed to the dividing circuit in the form of clock signals. The dividing circuit 28 itself may include any suitable counter means such as flip-

flop circuits

29 and 30 together with and" circuit 31 and inverter 32 which will provide gating pulses of time width depending upon the degree of division of the clock pulses. Different time width pulses may be selected by the switch S-4, the same being amplified in transistor Q2 and passed as a gating pulse to the power switch means 26.

A DC. power supply for the transistors 01 and Q2 and the dividing circuit is provided on line 33 derived from the main power on power line 25 by rectifying circuit 34. The photo cell 24 is shown connected to a switch 5-5 for energizing the line 33 at night-time hours only.

OPERATION The operation of the circuit of FIG. 2 can best be understood by now referring to the various wave forms in FIG. 3.

Referring to the top wave form, there is shown at 35 the alternating voltage source supplied at the terminal 16 and present at the lettered point A on the line 25 of FIG. 2. This wave form is passed to the base of the transistor 01 the negative portions of the wave form 35 turning off the transistor Q1 so that the positive voltage on line 33 appears at B, the transistor Q1 being turned on during positive portions to drop voltage at B. There thus results at the collector terminal B a series of clock pulses 36 the leading and trailing edges of which occur substantially at the zero cross-over points of the alternating voltage 35.

The clock pulses are passed to the flip-flop circuit 29 to provide output pulses at C shown at 37 in FIG. 3. These pulses occur every other cycle, the flip-flop dividing the input clock pulses by 2. This output in turn is fed to the flip-flop 30 to provide at its output D the pulses 38 in FIG. 3 which represent a division by 4. By then passing the

pulses

37 and 38 into the and" circuit 31, the output from the and" circuit at E will be an elongated pulse as at 39 in FIG. 3. Finally, by passing the signal at E through the inverter 32, a short pulse results at point F as at 40 in FIG. 3.

It will be seen from FIG. 3, that over a period of N cycles which in the example shown constitutes four complete cycles, the time width of the pulse 38 spans two complete cycles, the time width of the pulse 39 spans three complete cycles, and the time width of the pulse 40 spans only one cycle. These variable width time pulses will be repeated every N cycle. By selecting one of these pulses and passing the same to the power switch means to open the switch means or turn it off for a period of time corresponding to the time width of the selected pulse, two cycles out of every four would be eliminated if the pulse 38 were used, three cycles out of every four would be eliminated if the pulse 39 were used, and one cycle out of every four would be eliminated if the pulse 40 were used. The eliminated power can thus be selected to be 50 per cent, per cent, or 25 per cent. As stated, the power switch means 26 is normally closed or on so that in the absence of any control pulses, zero per cent power is eliminated and per cent power passed.

It will be appreciated by an examination of the

pulses

37 and 38 shown in wave forms C and D in FIG. 3 that 50 per cent of the power could also be eliminated by utilizing the pulses 37 which have a time width corresponding to one cycle but wherein two such pulses occur during the N pulse period. Thus, it would be equally feasible to utilize the pulses 37 to provide for a 50 per cent power reduction rather than the pulses 38. In fact, it is really preferable to utilize the pulses 37 in the case of a 50 per cent reduction to minimize a flicker in this mode.

Referring again to FIG. 2, the outputs occuring at C, E and F connect to terminals for the switch S-4 connecting to the base of the transistor 02. The switch arm 84 can thus be moved to select the desired percentage of power reduction. The amplifying transistor Q2 will pass the selected wave form to the power switch means 26 as described.

As a specific example, assume that the switch arm 8-4 is on the terminal E to select wave form E shown in FIG. 3. This wave form lasts for three cycles out of every four, and when applied to the power switch means 26 will open the switch for three cycles out of every four so that only one cycle 41 in each set of four will appear at the output 17. This situation is depicted by wave form G in FIG. 3 and 75 per cent savings in power results.

Assume now that the switch arm S-4 is moved to the terminal C in FIG. 2 so that the pulses 37 are passed to the power switch means. In this situation, every other cycle would be eliminated so that two cycles out of every four would be passed to the output. These additional cycles are indicated by the dotted lines in wave form G as at 42.

By opening the switch; that is, turning it off by means of the gating pulses, a fail-safe" condition exists. Thus, if for any reason the divider circuit should fail to function properly or the zero cross-over detector not function properly, there will be no signals passed to the power switch means and since it is normally closed or on" 100 per cent power will be passed to the traffic lights as is the case during day-time hours when the dimmer circuit is not operating. However, the invention should not be thought of as limited to this particular arrangement in that it would be equally as feasible to utilize variable width pulses for closing the switch or turning it on" for desired percentages of time. The important feature is the fact that one or more whole cycles in a given number of cycles are eliminated or passed in order to control the power to the traffic lights.

It will further be understood that N may constitute more than simply four cycles. For example, by incorporating three flip-flop circuits, eight outputs are available for selection so that the power may be varied in steps of 12% per cent. In FIG. 3, if n designates the number of cycles occurring over the time width of a selected pulse, such as the pulse 39 each N cycle, the power saved is given by n/N and the percentage of power passed to the traffic lights through the switch is given by l n/N.

As a consequence of removal of whole cycles by means, for example, of suitable Triac type switches responsive to gating signals derived from the zero crossover points of the input AC. voltage source, balanced conditions are maintained on the AC. line and opera tion is effected with a minimum of power dissipation and low noise conditions.

Moreover, it will be evident that all of the individual traffic lights at a single intersection may be controlled by a single dimmer control circuit without interfering with normal power requirements for the controller used to switch the lights. It has been calculated that for an average intersection and with the unit set to reduce power by per cent, the savings in energy would be sufficient to pay for the cost of the unit over a period of 2 years, assuming an average of 12 hours for nighttime operation.

What is claimed is:

l. A dimmer circuit for decreasing the power provided by an AC. source of voltage to traffic lights comprising:

a. switch means connected between said source and said traffic light;

b. means connected to said source for providing a gating pulse each N" cycle of said source;

c. means for adjusting the time duration of said gating pulse to encompass n cycles where n is less than N and wherein each of the n cycles constitutes a whole wave form over 360"; and

d. means for passing said gating pulse to said switch means to open said switch means every N cycle for the duration of n cycles whereby n/N of the power of said A.C. source is not passed to said traffic lights as a result of blockage of the n whole wave form cycles.

2. A dimmer circuit for dimming traffic lights wherein the lights are controlled by a logic circuit requiring a given source of alternating voltage for operation, and wherein the traffic lights are connected to said source through switches controlled by said logic circuit, said dimmer circuit including, in combination:

a. input and output terminals for interposition between said source and said switches;

b. detecting means connected to said input terminal to provide clock signals having a frequency determined by the frequency of alternating voltage;

c. divider means connected to receive said clock signals and provide a control output pulse responsive to the reception of N clock signals, said output pulse having a time duration corresponding to the time for 11 clock signals to be received where n s N; and

d. a power switch means connected between said input terminal and output terminal and having a gate control terminal connected to receive said output pulse whereby said power switch is opened for a period corresponding to the width of said output pulse so that n/N of the power is not passed to said lights as a result of the blockage of it whole wave form cycles by said power switch.

3. A circuit according to claim 2, in which N is four and in which means are provided to select a value of n l, 2, or 3, whereby 25, 50, or per cent of the power may be blocked from said lights.

4. A circuit according to claim 2, including photo detector means connected to said dimmer circuit for automatically actuating said dimmer circuit only when the ambient light falls below a given level.

5. A circuit according to claim 2, in which said detecting means includes a transistor having its base connected to said alternating voltage to provide clock signals having leading and trailing edges at the zero crossover points of said alternating voltage and in which said divider means includes at least one flip flop circuit connected to receive said clock pulses.

6. A circuit according to claim 5 including an additional flip-flop circuit connected to the output of said first-mentioned flip-flop circuit; said divider means also including an and circuit having its input connected to receive the outputs from the first mentioned and additional flip-flop circuits; and an inverter circuit connected to the output of said and" circuit, whereby said output pulse having a time duration can be selected from the output of said first mentioned flip-flop circuit, the output of said and circuit or the output from said inverter circuit.

Claims

1. A dimmer circuit for decreasing the power provided by an A.C. Source of voltage to traffic lights comprising: a. switch means connected between said source and said traffic light; b. means connected to said source for providing a gating pulse each Nth cycle of said source; c. means for adjusting the time duration of said gating pulse to encompass n cycles where n is less than N and wherein each of the n cycles constitutes a whole wave form over 360*; and d. means for passing said gating pulse to said switch means to open said switch means every Nth cycle for the duration of n cycles whereby n/N of the power of said A.C. source is not passed to said traffic lights as a result of blockage of the n whole wave form cycles.

2. A dimmer circuit for dimming traffic lights wherein the lights are controlled by a logic circuit requiring a given source of alternating voltage for operation, and wherein the traffic lights are connected to said source through switches controlled by said logic circuit, said dimmer circuit including, in combination: a. input and output terminals for interposition between said source and said switches; b. detecting means connected to said input terminal to provide clock signals having a frequency determined by the frequency of alternating voltage; c. divider means connected to receive said clock signals and provide a control output pulse responsive to the reception of N clock signals, said output pulse having a time duration corresponding to the time for n clock signals to be received where n < OR = N; and d. a power switch means connected between said input terminal and output terminal and having a gate control terminal connected to receive said output pulse whereby said power switch is opened for a period corresponding to the width of said output pulse so that n/N of the power is not passed to said lights as a result of the blockage of n whole wave form cycles by said power switch.

3. A circuit according to claim 2, in which N is four and in which means are provided to select a value of n 1, 2, or 3, whereby 25, 50, or 75 per cent of the power may be blocked from said lights.

5. A circuit according to claim 2, in which said detecting means includes a transistor having its base connected to said alternating voltage to provide clock signals having leading and trailing edges at the zero cross-over points of said alternating voltage and in which said divider means includes at least one flip flop circuit connected to receive said clock pulses.

6. A circuit according to claim 5 including an additional flip-flop circuit connected to the output of said first-mentioned flip-flop circuit; said divider means also including an ''''and'''' circuit having its input connected to receive the outputs from the first mentioned and additional flip-flop circuits; and an inverter circuit connected to the output of said ''''and'''' circuit, whereby said output pulse having a time duration can be selected from the output of said first mentioned flip-flop circuit, the output of said ''''and'''' circuit or the output from said inverter circuit.