|Publication number||US3504272 A|
|Publication date||31 Mar 1970|
|Filing date||31 May 1968|
|Priority date||31 May 1968|
|Publication number||US 3504272 A, US 3504272A, US-A-3504272, US3504272 A, US3504272A|
|Inventors||Kenney George C|
|Original Assignee||Hewlett Packard Co|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (2), Referenced by (10), Classifications (10)|
|External Links: USPTO, USPTO Assignment, Espacenet|
March 31, 1970 G. C. KENNEY ll POWER SUPPLY HAVING INTERCONNECTED VOLTAGE REGULATORS PROVIDING MULTIPLE OUTPUTS Filed May 31, 1968 AGENT 55 LOAD LOAD v bZ
0+ 6 +0- ma I O- "c 1 7V4 6 |N4 i ure 3 INVENTOR GEORGE C. KENNEY IE Elm United States Patent 3,504,272 POWER SUPPLY HAVING INTERCONNECTED VOLTAGE REGULATORS PROVIDING MULTI- PLE OUTPUTS George C. Kenney H, Santa Clara, Calif., assignor to Hewlett-Packard Company, Palo Alto, Calif., a corporation of California Filed May 31, 1968, Ser. No. 733,717 Int. Cl. G05f 1/58 US. Cl. 323-22 8 Claims ABSTRACT OF THE DISCLOSURE A plurality of voltage regulators are sequentially interconnected so that the bias voltage required by one voltage regulator is provided by the regulated output of the immediately preceding voltage regulator. The output voltages of the regulators have low ripple components. When the output voltage of any one of the regulators falls below its regulated value, all of the voltage regulators are disabled, thereby protecting them from overload con- 'ditions.
BACKGROUND OF THE INVENTION Frequently it is required that a power supply provide multiple regulated outputs for supplying voltages to a combination of utilization circuits forming an integral operating device. If any one utilization circuit of the combination becomes shorted or otherwise malfunctions to overload its corresponding voltage supply, it is preferable that the entire system be turned off so as to prevent improper operation of the system and protect the other circuits of the combination from possible damage. In addition to this protective feature, the power supply should provide accurately regulated output voltages, each of which has a low ripple component. Preferably a power supply with these features and advantages should have a simple and economical circuit configuration.
SUMMARY OF THE INVENTION The present invention, in one specific embodiment, includes two or more sequentially connected voltages regulators, each of which has a series regulating element and output voltage responsive control means therefor. Each regulating element and its corresponding control means are biased into operation by the output voltage of the immediately preceding voltage regulator. Since the bias voltage is regulated, the ripple component at the output is low. A drop in the output voltage of any one voltage regulator due to an overload condition, for example, decreases the bias to the next succeeding voltage regulator, which consequently becomes non-conducting. This process is repeated until all of the voltage regulators are turned olf. The first and last ones of the sequentially connected voltage regulators include circuit components having complementary conductivities to permit suitable interconnection of the bias voltages.
BRIEF DESCRIPTION OF THE DRAWINGS FIGURE 1 is a combined schematic and block diagram illustrating two interconnected, reciprocally biased voltage regulators of one embodiment of the present invention.
FIGURE 2 is a simplified block diagram illustrating the connections between the two voltage regulators of FIG- URE 1.
FIGURE 3 is a block diagram illustrating a multiple output power supply including a plurality of interconnected mutually biased voltage regulators in accordance with another embodiment of the present invention.
Patented Mar. 31, 1970 "ice Referring now to FIGURE 1, there are shown two voltage regulators, the first of which includes positive and negative input terminals 11, 13 for receiving an unregulated DC. voltage, and positive and negative output terminals 15, 17 for supplying a regulated voltage to a load. The unregulated DC. voltage may be provided in the conventional manner by the combination of an A.C. transformer and a four-diode bridge circuit, not shown. A filter capacitor 19 is connected across the input terminals 11, 13.
A voltage regulating transistor 21 of the PNP type is connected in series between the negative input terminal 13 and the negative output terminal 17. Regulating transistor 21 is driven through its base electrode by an intermediate PNP type transistor 23, the two transistors 21, 23 being connected in the Well-known Darlington compound configuration.
The conductivities of transistors 21, 23 are varied by control means including a PNP type transistor 25 having its collector electrode connected to the base electrode of transistor 23. The control signal produced by transistor 25 is dependent upon the difference between a reference voltage and a proportion of the regulator output voltage. Specifically, the reference voltage is provided by a Zener diode 27 connected in series between the emit ter electrode of transistor 25 and the positive output terminal 15. A proportion of the regulator output voltage is derived from a voltage divider formed by two resistors 29, 31 connected in series between the output terminals 15, 17. The common junction of resistors 29, 31 is connected to the base electrode of transistor 25. The Zener diode 27 and the three transistors 21, 23, 25 are suitably biased from a negative potential source by biasing means hereinafter described.
In operation of the above-described voltage regulator, the conductivity of transistor 21 is varied in accordarwfg? with changes in the loading conditions between output terminals 15, 17. An increase in the load is accompanied by a tendency for the output voltage to drop. Transistor 25 is then biased toward non-conduction, and in turn transistor 21 is biased toward greater conduction to raise the output voltage. Conversely, if the load decreases, transsistor 25 is biased toward conduction and transistor 21 conducts less. Thus, any change in load conditions results in a compensatory change in the conduction of transistor 21 to maintain the output voltage across terminals 15, 17 constant.
The circuit configuration of the second voltage regulator is similar to that of the first voltage regulator described hereinabove. Specifically, the second voltage regulator includes positive and negative input terminals 33, 35 for receiving an unregulated D.C. input voltage, a filter capacitor 37, a pair of output terminals 39, 41 connectable to a load, and a main series connected voltage regulating transistor 43 of the NPN type. Transistor 43 is driven by an intermediate NPN type transistor 45, and the pair of transistors 43, 45 are controlled by an NPN type transistor 47. The control signal produced by transistor 47, and thus the conductivity of transistor 43, depends on the difference between the reference voltage produced by a Zener diode 4'9 and the voltage output from a voltage divider formed by resistors 51, 53. The operation of the second voltage regulator is substantially the same as that previously described with respect to the first voltage regulator.
The first and second voltage regulators are reciprocally biased in variable conduction modes of operation by biasing means interconnecting the output of each regulator with the bias input of the other regulator. Specifically, the
junction of the collector electrode of transistor 25 and the base electrode of transistor 23 is connected through a re-' sistor 55 to a bias input terminal 57. Terminal 57 is connected to the output terminal 41 of the second voltage regulator, which provides a negative bias voltage V The voltage from terminal 57 also biases Zener diode 27 into conduction through a resistor 59.
Similarly, the second voltage regulator receives a positive bias voltage +V through resistors 61, 63 and terminal 65, the latter of which is connected to the output terminal 15 of the first voltage regulator.
In order to properly reference the output of each regulator for use as the bias input to the other regulator, the output terminal 17 of the first regulator is connected to the opposite polarity output terminal 39 of the second regulator. The two terminals 17, 39 are also connected to a common terminal 67. Thus there are provided three output voltages V V V at terminals 15, 67, 41, respectively, any one of which may serve as a reference voltage. For example, if terminal 67 is grounded, voltages V V will have opposite polarities with respect to one another. It can be seen that the output voltages V V correspond respectively to the bias voltages +V 2, V
It is to be noted that the bias voltage of each voltage regulator is considerably higher than the output voltage of the same regulator, and in the situation where the unregulated D.C-. input voltages for each regulator are identical, the ratio of bias voltage to output voltage is 2:1 for each regulator. This voltage relationship is particularly desirable and is made possible because transistors 23, 25 and transistors 45, 47 are of complementary conductivity types, thus permitting the use of bias voltages of the opposite polarity.
Since the two bias voltages are regulated, the output voltages from each regulator have low ripple components. The overall circuit configuration is simplified and incorporates a minimum number of components because additional pro-regulators for the bias voltages are not required. Also, filter capacitors 19, 37 can be made considerably smaller than those required in prior art voltage regulators.
An important aspect of the interconnected voltage regulators described hereinabove is that each regulator depends for proper operation upon the bias voltage received from the other regulator. If the output of the first voltage regulator is shorted or overloaded so that the output voltage drops, the bias voltage supplied to the second regulator will also drop thereby rendering the regulating transistor 43 non-conducting. This in turn causes a drop in the output voltage across terminals 39, 41 and in the bias voltage applied to the first regulator through terminal 57. Therefore, the regulating transistor 21 becomes non-conducting. The general result of the reciprocal biasing arrangement is that if one voltage regulator is overloaded, it will disable the other voltage regulator, which in turn disables the first voltage regulator.
If both voltage regulators are disabled, due to an overload condition for example, they will remain disabled even after the overload condition is removed because neither regulator is properly biased. In order to initiate conduction of the regulating transistors 21, 43, one of the voltage regulators, for example the second voltage regulator, is provided with starting means including a capacitor 69, a switch 71, and a resistor 73 connected in series between the collector electrode of transistor 47 and the common junction of input terminal 33 and the collector electrode of transistor 45. During normal operation of the first and second voltage regulators, switch 71 is in the position shown in FIGURE 1 and the capacitor 69 is partially charged with a low voltage, on the order of 3-4 volts. When the two regulators are disabled, regulating elements 21, 43 are non-conducting and the voltage across capacitor 69 rises to equal the unregulated D.C. input voltage across terminals 33, 53. The regulators are started by discharging capacitor 69 and then permitting this capacitor to charge through the base-emitter junctions of transistors 43, 45, thus causing these two transistors to conduct. This biases the first voltage regulator into operation, which in turn properly biases the second voltage regulator, so that both regulators again operate.
The aforementioned discharging of capacitor 69 is achieved in one of two ways. Firstly, the unregulated DC. voltage may be disconnected from input terminals 33, 35, in which case capacitor 69 discharges through a resistor 75 connected across the input terminals. Alternatively, capacitor 69 may be'discharged by momentarily moving the common arm of switch 71 into a position which shunts the end terminals of the capacitor.
FIGURE 2 illustrates the previously described first and second voltage regulators in block diagram form, with their respective input, output and biasing terminals numbered as shown in FIGURE 1. Also illustrated are the interconnections between these two voltage regulators, and the connections providing the three output voltages V V V The interconnecting circuitry is not limited to two voltage regulators, but instead may be generalized to a plurality of sequentially arranged voltage regulators, as shown in FIGURE 3. Specifically, the exemplary embodiment of FIGURE 3 includes four voltage regulators, each having a circuit configuration similar to one of the first and second voltage regulators described hereinabove, and each including a pair of input terminals for receiving an unregulated input voltage V a bias voltage input terminal V and positive and negative output terminals. The positive output terminal of each regulator except the last one provides a bias voltage for the next succeeding regulator. Also, the negative output terminal of each voltage regulator except the last one is connected to the positive output terminal of the immediately succeeding voltage regulator. The last voltage regulator of the sequential arrangement has its negative output terminal connetced to the bias input terminal of the first voltage regulator. Preferably, the first and last voltage regulators employ complementary circuit configurations, as described hereinabove with respect to FIGURE 1, so that the first voltage regulator will operate with a negative bias and the last voltage regulator will operate with a positive bias.
The four voltage regulators of FIGURE 3 may provide as many as five output voltages V V V any one of which may be referenced to ground. If the output of any one of these voltage regulators is overloaded, all of the regulators are disabled, due to the successive loss of bias voltage in each regulator in the manner described above with respect to FIGURE 1.
What is claimed is:
1. A power supply circuit for providing multiple regulated output voltage comprising:
a plurality of sequentially arranged voltage regulators each including:
positive and negative input terminals for receiving an unregulated voltage; positive and negative output terminals for providing a regulated voltage to a load; regulating means having a variable conduction current path connected in series between one of said input terminals and the corresponding one of said output terminals of like polarity; means for controlling and protecting said regulating means, said controlling and protecting means including:
a source of reference voltage; driver means for varying the conduction of said current path in response to the difierence between said reference voltage and the voltage at said output terminals means; terminal means for receiving a bias voltage; means interconnecting said bias voltage termi nal means and said driver means for substantially decreasing the conduction of said current path to disable said regulating means when said bias voltage falls below a predetermined level;
means connecting the bias voltage terminal means of the first one of said plurality of sequentially arranged voltage regulators to the negative output terminal of the last one of said voltage regulators;
means connecting the positive output terminal of each of said voltage regulators other than said last voltage regulator to the bias terminal means of the immediately succeeding one of said sequentially arranged voltage regulators; and
means connecting the negative output terminal of each of said voltage regulators other than said last voltage regulator to the positive output terminal of the immediately succeeding one of said sequentially arranged voltage regulators;
whereby all of said plurality of voltage regulators are disabled when the output voltage of any one regulator falls below said predetermined bias voltage level.
2. The circuit of claim 1, said driver means of the first and last ones of said plurality of sequentially arranged voltage regulators respectively including a transistor, said transistors being of complementary conductivity type.
3. A multiple output power supply comprising:
first and second voltage regulators respectively having I one polarity and opposite polarity input terminals connectable to a source of unregulated voltage, and one polarity and opposite polarity output terminals connectable to a load, each of said voltage regulators including:
a regulating element having a first main current carrying electrode connected to one of said input terminals, a second main current carrying electrode connected to the corresponding one of said output terminals of like polarity, and a control electrode;
a source of reference voltage;
means connected to said control electrode for controlling the current conduction of said regulating element in response to the difference between said reference voltage and a proportion of the voltage across said output terminals;
first means for biasing the regulating element of said first voltage regulator into non-conduction when the voltage across the output terminals of said second voltage regulator falls below a predetermined level, said first biasing means being connected between said one polarity output terminal of said second voltage regulator and the control electrode of said regulating element of said first voltage regulator;
second means for biasing the regulating element of said second voltage regulator into non-conduction when the voltage across the output terminals of said first voltage regulator falls below a predetermined level, said second biasing means being connected between said opposite polarity output terminal of said first voltage regulator and the control electrode of said regulating element of said second voltage regulator; and
means for connecting said one polarity output terminal of said first voltage regulator to said opposite polarity output terminal of said second voltage regulator.
4. The power supply circuit of claim 3, said controlling means for said first and second voltage regulators, each including:
voltage divider means connected across the output terminals of the corresponding one of said voltage regulators; and
a transistor having one main current carrying electrode coupled to the corresponding one of said regulating element control electrodes; another main current carrying electrode connected to the corresponding one of said reference voltage sources; and a control electrode connected to the corresponding one of said voltage divider means;
said transistors of said first and second voltage regulator controlling means having complementary conductivities.
5. The power supply circuit of claim 4, wherein each of said first and second voltage regulators further includes an intermediate driver transistor connected between the corresponding ones of said regulating elements and said controlling means.
6. The power supply circuit of claim 4, each of said sources of reference voltage including:
a Zener diode; and
means connected to the corresponding one of said first and second biasing means for biasing said Zener diode. 7. The power supply circuit of claim 3, further including starting means for initiating conduction of said regulating elements after said regulating elements are biased into non-conduction said starting means including:
capacitor means coupled in a series current path between the first main current carrying electrode and the control electrode of the regulating element of one of said first and second voltage regulators; and
resistance means coupled between the input terminals of said one voltage regulator for discharging said capacitor means in the absence of an unregulated voltage across said input terminals.
8. The power supply circuit of claim 7, said starting means further including switch means for momentarily discharging said capacitor means.
References Cited UNITED STATES PATENTS 3,356,855 12/1967 Suzuki et al. 3,414,802 12/1968 Harrigan et al. 323-l9 X LEE T, HIX, Primary Examiner A. D. 'PELLlNEN, Assistant Examiner U.S. Cl. X.R. 30-752; 3'2325, 38
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|US3356855 *||18 Oct 1963||5 Dec 1967||Nippon Electric Co||Parallel operating voltage stabilized power supply arrangement|
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|Citing Patent||Filing date||Publication date||Applicant||Title|
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|EP0063611A1 *||28 Oct 1981||3 Nov 1982||Fanuc Ltd.||Electric power source for a control unit|
|EP0063611A4 *||28 Oct 1981||3 Apr 1985||Fanuc Ltd||Electric power source for a control unit.|
|EP0410423A2 *||25 Jul 1990||30 Jan 1991||Kabushiki Kaisha Toshiba||Multiple power supply system|
|EP0448026A2 *||18 Mar 1991||25 Sep 1991||Tokyo Electric Co., Ltd.||Power supply.|
|U.S. Classification||307/24, 323/281, 307/52|
|International Classification||G05F1/577, G05F1/585, G05F1/10|
|Cooperative Classification||G05F1/585, G05F1/577|
|European Classification||G05F1/585, G05F1/577|