US20100226148A1 - Wide supply range flyback converter - Google Patents
Wide supply range flyback converter Download PDFInfo
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- US20100226148A1 US20100226148A1 US12/733,587 US73358708A US2010226148A1 US 20100226148 A1 US20100226148 A1 US 20100226148A1 US 73358708 A US73358708 A US 73358708A US 2010226148 A1 US2010226148 A1 US 2010226148A1
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- flyback converter
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- 239000003990 capacitor Substances 0.000 claims description 20
- 238000004804 winding Methods 0.000 claims description 18
- 230000002159 abnormal effect Effects 0.000 claims 1
- 230000000694 effects Effects 0.000 description 3
- 230000000977 initiatory effect Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 230000002045 lasting effect Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- GQIUQDDJKHLHTB-UHFFFAOYSA-N trichloro(ethenyl)silane Chemical compound Cl[Si](Cl)(Cl)C=C GQIUQDDJKHLHTB-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
Definitions
- the present invention generally relates to power converters. Specifically, the present invention relates to power converters operating in flyback mode and more specifically those that maintain high efficiency despite a wide range of line and load variations, have very low idle power consumption, and are low cost. Wherein, the ratio of high line to low line can be greater than 3 to 1.
- DCM Continuous Conduction Mode
- CCM Continuous Conduction Mode
- the present invention exploits the advantages of flyback operation while not suffering from the disadvantages of this mode of operation which include its tendency toward reduced efficiency at high and low line conditions. It adapts to changes in line condition thereby reducing the drop in efficiency due to conductive losses at low line and switching losses at high line. Further, the present invention is practical for applications wherein reduced size, cost, and idle power consumption are desirable thus providing a superior alternative to the prior art.
- FIG. 1 is a schematic diagram of the preferred embodiment of the present invention.
- FIG. 2 is an illustration of voltage waveforms developed under operation at junction points as referenced in FIG. 1 essential to the understanding of the present invention.
- FIG. 3 is another illustration of voltage waveforms developed under operation at junction points as referenced in FIG. 1 essential to the understanding of the present invention.
- a wide supply range flyback converter will be described with reference to FIG. 1 .
- One terminal of a timing capacitor 16 is connected to a voltage controlled current sink 4 as in FIG. 1 forming junction 21 .
- Voltage controlled current source with gated threshold 2 and feed forward current source 5 are further connected to said junction point.
- Switched current source 1 is additionally connected to this junction.
- This junction also forms the input of inverted Schmitt trigger 24 .
- a waveform as in FIG. 2B is developed at junction point 21 .
- the other terminal of said timing capacitor 16 is connected to common ground 15 . Ground points 15 , 18 , 20 and 23 represent a common point and are only separated for the purposes of this illustration.
- the output of said inverted Schmitt trigger 24 is connected to the input terminal of a switching element 26 , such as a MOSFET, and is additionally connected to the other terminal of voltage controlled current sink 4 forming junction point 25 .
- a waveform as in FIG. 2C is developed at junction point 25 .
- the first output terminal of switching element 26 is connected to the dotted terminal of the primary winding of transformer 28 forming junction point 27 where a waveform as in FIG. 2D is developed.
- V SPIKE denotes the maximum voltage point across switching element 26 which will decay to the reflected voltage value, V REFLECTED .
- Transformer 28 further comprises a secondary winding and a bias winding.
- the other terminal of said primary winding of transformer 28 is connected to the positive terminal of the converter's DC supply 7 , a power source typically derived from rectified and filtered AC mains, the other terminal of said feed forward current source 5 , a terminal of voltage controlled current source 34 , and a terminal of startup resistor 32 .
- the negative terminal of said DC supply 7 is connected to common ground 20 .
- the second output terminal of switching element 26 is connected to a terminal of sensing resistor 14 and the a terminal of a current sample feed resistor 13 forming junction point 22 .
- a waveform as in FIG. 2A is developed at junction point 22 .
- the remaining terminal of said current sample feed resistor 13 is connected to the negative input of current sense comparator 11 , a terminal of voltage controlled current source 3 , and the remaining terminal of voltage controlled current source 34 .
- the remaining terminal of sensing resistor 14 is connected to common ground 23 .
- the positive input of said current sense comparator 11 forms voltage reference point 9 .
- a terminal of the secondary winding of transformer 28 is connected to a terminal of output capacitor 8 and a terminal of load 10 forming the negative output of the converter.
- the dotted terminal of the secondary winding of transformer 28 is connected the anode of rectifier 6 .
- the cathode of said rectifier 6 is connected to the remaining terminals of output capacitor 8 and load 10 forming the positive output of the converter.
- the output of said current sense comparator 11 is connected to the input of switching element 17 , typically a transistor.
- An output terminal of said switching element 17 is connected to the remaining terminal of switched current source 1 .
- the other output terminal of switching element 17 is connected to the output terminal of a typical under-voltage lockout circuit with hysteresis 33 , the other terminal of voltage controlled current source 3 , the other terminal of voltage controlled current source with gated threshold 2 , and the cathode of bias rectifier 30 forming junction point 31 .
- the input terminal of said under-voltage lockout circuit with hysteresis 33 is connected to the remaining terminal of startup resistor 32 and a terminal of storage capacitor 19 .
- the remaining terminal of said storage capacitor 19 and the ground terminal of said under-voltage lockout circuit with hysteresis 33 are connected to common ground 18 .
- Said voltage controlled current sources with gated threshold 2 and voltage controlled current source 3 are both controlled by the signal developed at feedback point 12 .
- Feed forward current source 5 and voltage controlled current source 34 are controlled by DC supply 7 .
- the anode of said bias rectifier 30 is connected to a terminal of bias resistor 29 .
- the other terminal of bias resistor 29 is connected to the dotted terminal of the bias winding of transformer 28 .
- the other terminal of the bias winding of transformer 28 is connected to common ground 20 .
- Said on time is defined as the time required for the current to ramp up to the current sense threshold as demonstrated by the voltage waveform arising at junction point 22 , as shown in FIG. 2A , which is proportional to the current through current sense resistor 14 .
- the proportionality factor is the resistance of current sense resistor 14 .
- the voltage appearing at junction 22 is combined at the negative input of current sense comparator 11 with the feedback signal provided via voltage controlled current source 3 therein reducing the current sense threshold in response to a load reduction and an increase in the supply voltage sample.
- the current sense comparator turns switching element 17 on, thereby allowing switched current source 1 to rapidly charge timing capacitor 16 to above the upper threshold, V H , of inverted Schmitt trigger 24 .
- the on time of switching element 26 will be terminated and timing capacitor 16 will be discharged by the sum of the currents of voltage controlled current sink 4 , voltage controlled current source with gated threshold 2 , and feed forward current source 5 until the voltage reaches V L again thus initiating a new cycle.
- V L ⁇ i ⁇ t
- V is the voltage at DC supply 7 and L is the magnetic inductance of the primary winding of said transformer 28 .
- the net effect will be a drop in frequency which in turn will decrease switching losses at high line and conduction losses at low line.
- voltage controlled current source 34 Since the sensed peak current through the magnetizing winding of transformer 28 varies with changes in supply voltage due to the turn off delay between junction 22 and junction 25 , thereby resulting in increased sensed current error with increased supply voltage, voltage controlled current source 34 is used to compensate for this error. Thus, voltage controlled current source 34 can be designed to keep the peak of the sensed current relatively constant with respect to supply voltage variation.
- the signal at feedback point 12 initially modifies (reduces) current sense threshold in response to a load current decrease and thereby reduces the on time.
- voltage controlled current source with gated threshold 2 When said feedback signal reaches a predetermined level, voltage controlled current source with gated threshold 2 will be activated as well and a simultaneous on time reduction and off time increase will be achieved resulting in high light load efficiencies.
- Voltage controlled current source with gated threshold 2 is typically set to be activated when the signal at feedback point 12 exceeds the lower threshold, V L , of inverted Schmitt trigger 24 .
- the voltage waveform at junction 21 across timing capacitor 16 is shown in FIG. 2B and the typical voltage waveform at junction 27 is shown in FIG. 2D .
- FIG. 3A shows the control waveform of switching element 26 and the non-ideal current response is shown in FIG. 3B wherein the leading edge of the current waveform contains a spike 35 due to the input capacitance of switching element 26 .
- This current spike 35 which easily reaches above the current sense threshold, V TCS , would reset the inverted Schmitt trigger 24 if this was not counteracted by the integrating effect of timing capacitor 16 and switched current source 1 .
- the actual effect of the spike 35 of the waveform at junction 21 , the input of inverted Schmitt trigger 24 is shown in FIG.
- FIG. 3C further shows an off time discharge pattern typical to the implementation of a resistor in place of voltage controlled current sink 4 .
- Bias rectifier 30 can be chosen to have a limited but sufficiently large reverse recovery time such that bias rectifier 30 in conjunction with bias resistor 29 will be average responding. Therefore, under overload condition, the bias voltage at junction 31 can be made to collapse sufficiently with the output voltage across load 10 to disable the operation of the converter by means of typical under-voltage lockout circuitry 33 .
- Yet another feature of the operation of the present invention is related to the no load condition.
- a low frequency load hunting operation of the under-voltage lockout circuitry 33 will be invoked, one cycle of which will be described herein.
- the above mentioned rectification scheme of the bias voltage, utilizing bias rectifier 30 and bias resistor 29 is chosen such that at loads approaching 1% of the nominal full load value, said bias voltage average will be sufficiently small to trip the lockout feature of said under-voltage lockout circuit with hysteresis 33 whereby the converter is disabled for the duration required for startup resistor 32 to charge storage capacitor 19 to the positive going threshold, V H UVLO of under-voltage lockout circuitry 33 lasting several hundred milliseconds.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
Description
- 1. Field of the Invention
- The present invention generally relates to power converters. Specifically, the present invention relates to power converters operating in flyback mode and more specifically those that maintain high efficiency despite a wide range of line and load variations, have very low idle power consumption, and are low cost. Wherein, the ratio of high line to low line can be greater than 3 to 1.
- 2. Description of the Prior Art
- Prior art embodiments customarily use DCM (Discontinuous Conduction Mode) operation for low power and CCM (Continuous Conduction Mode) operation for medium power conversion for wide range input AC to DC adapters. Employing purely CCM operation inherently produces high switching losses at high line whereas DCM operation for low power produces undesirably high conduction losses at low line input voltages. DCM operation allows for the minimization of the transformer size but increases conduction losses whereas CCM operation increases the transformer size requirement and switching losses.
- The present invention exploits the advantages of flyback operation while not suffering from the disadvantages of this mode of operation which include its tendency toward reduced efficiency at high and low line conditions. It adapts to changes in line condition thereby reducing the drop in efficiency due to conductive losses at low line and switching losses at high line. Further, the present invention is practical for applications wherein reduced size, cost, and idle power consumption are desirable thus providing a superior alternative to the prior art.
-
FIG. 1 is a schematic diagram of the preferred embodiment of the present invention. -
FIG. 2 is an illustration of voltage waveforms developed under operation at junction points as referenced inFIG. 1 essential to the understanding of the present invention. -
FIG. 3 is another illustration of voltage waveforms developed under operation at junction points as referenced inFIG. 1 essential to the understanding of the present invention. - In order to better understand the embodiment of the present invention, a wide supply range flyback converter will be described with reference to
FIG. 1 . One terminal of atiming capacitor 16 is connected to a voltage controlledcurrent sink 4 as inFIG. 1 formingjunction 21. Voltage controlled current source withgated threshold 2 and feed forwardcurrent source 5 are further connected to said junction point. Switchedcurrent source 1 is additionally connected to this junction. This junction also forms the input of inverted Schmitt trigger 24. A waveform as inFIG. 2B is developed atjunction point 21. The other terminal of saidtiming capacitor 16 is connected tocommon ground 15.Ground points trigger 24 is connected to the input terminal of aswitching element 26, such as a MOSFET, and is additionally connected to the other terminal of voltage controlledcurrent sink 4 formingjunction point 25. A waveform as inFIG. 2C is developed atjunction point 25. The first output terminal ofswitching element 26 is connected to the dotted terminal of the primary winding oftransformer 28 formingjunction point 27 where a waveform as inFIG. 2D is developed. InFIG. 2D , VSPIKE denotes the maximum voltage point acrossswitching element 26 which will decay to the reflected voltage value, VREFLECTED. Transformer 28 further comprises a secondary winding and a bias winding. The other terminal of said primary winding oftransformer 28 is connected to the positive terminal of the converter'sDC supply 7, a power source typically derived from rectified and filtered AC mains, the other terminal of said feed forwardcurrent source 5, a terminal of voltage controlledcurrent source 34, and a terminal ofstartup resistor 32. The negative terminal of said DCsupply 7 is connected tocommon ground 20. - The second output terminal of
switching element 26 is connected to a terminal ofsensing resistor 14 and the a terminal of a currentsample feed resistor 13 formingjunction point 22. A waveform as inFIG. 2A is developed atjunction point 22. The remaining terminal of said currentsample feed resistor 13 is connected to the negative input ofcurrent sense comparator 11, a terminal of voltage controlledcurrent source 3, and the remaining terminal of voltage controlledcurrent source 34. The remaining terminal ofsensing resistor 14 is connected tocommon ground 23. The positive input of saidcurrent sense comparator 11 formsvoltage reference point 9. - A terminal of the secondary winding of
transformer 28 is connected to a terminal ofoutput capacitor 8 and a terminal ofload 10 forming the negative output of the converter. The dotted terminal of the secondary winding oftransformer 28 is connected the anode ofrectifier 6. The cathode ofsaid rectifier 6 is connected to the remaining terminals ofoutput capacitor 8 andload 10 forming the positive output of the converter. - The output of said
current sense comparator 11 is connected to the input ofswitching element 17, typically a transistor. An output terminal of saidswitching element 17 is connected to the remaining terminal of switchedcurrent source 1. The other output terminal ofswitching element 17 is connected to the output terminal of a typical under-voltage lockout circuit withhysteresis 33, the other terminal of voltage controlledcurrent source 3, the other terminal of voltage controlled current source withgated threshold 2, and the cathode ofbias rectifier 30 formingjunction point 31. The input terminal of said under-voltage lockout circuit withhysteresis 33 is connected to the remaining terminal ofstartup resistor 32 and a terminal ofstorage capacitor 19. The remaining terminal of saidstorage capacitor 19 and the ground terminal of said under-voltage lockout circuit withhysteresis 33 are connected tocommon ground 18. - Said voltage controlled current sources with
gated threshold 2 and voltage controlledcurrent source 3 are both controlled by the signal developed atfeedback point 12. Feed forwardcurrent source 5 and voltage controlledcurrent source 34 are controlled byDC supply 7. - The anode of said
bias rectifier 30 is connected to a terminal ofbias resistor 29. The other terminal ofbias resistor 29 is connected to the dotted terminal of the bias winding oftransformer 28. The other terminal of the bias winding oftransformer 28 is connected tocommon ground 20. - In order to better understand the present invention, typical operation will be described with reference to the waveforms developed as shown in
FIGS. 2 and 3 . For the purposes of this explanation, t=0 will be defined as the moment when the voltage ontiming capacitor 16 crosses the lower threshold, VL, of inverted Schmitt trigger 24 thus turning switchingelement 26 on, wherein the control waveform atjunction point 25, as shown inFIG. 2C , is produced and lasts for the duration of the on time. Said on time is defined as the time required for the current to ramp up to the current sense threshold as demonstrated by the voltage waveform arising atjunction point 22, as shown inFIG. 2A , which is proportional to the current throughcurrent sense resistor 14. The proportionality factor is the resistance ofcurrent sense resistor 14. The voltage appearing atjunction 22 is combined at the negative input ofcurrent sense comparator 11 with the feedback signal provided via voltage controlledcurrent source 3 therein reducing the current sense threshold in response to a load reduction and an increase in the supply voltage sample. When this combination exceeds the value of the reference atvoltage reference point 9, the current sense comparator turns switchingelement 17 on, thereby allowing switchedcurrent source 1 to rapidly chargetiming capacitor 16 to above the upper threshold, VH, of inverted Schmitttrigger 24. At this point, the on time of switchingelement 26 will be terminated andtiming capacitor 16 will be discharged by the sum of the currents of voltage controlledcurrent sink 4, voltage controlled current source withgated threshold 2, and feed forwardcurrent source 5 until the voltage reaches VL again thus initiating a new cycle. - Since the discharge value of voltage controlled
current sink 4 is reduced by feed forwardcurrent source 5, proportional toDC supply 7 voltage, VS, power supply rejection is greatly improved together with the overload condition when high line voltage is applied. This is achieved by increasing off time at a rate faster than on time is decreased due to the current slope increase through switchingelement 26 as per -
- where V is the voltage at
DC supply 7 and L is the magnetic inductance of the primary winding of saidtransformer 28. The net effect will be a drop in frequency which in turn will decrease switching losses at high line and conduction losses at low line. - Since the sensed peak current through the magnetizing winding of
transformer 28 varies with changes in supply voltage due to the turn off delay betweenjunction 22 andjunction 25, thereby resulting in increased sensed current error with increased supply voltage, voltage controlledcurrent source 34 is used to compensate for this error. Thus, voltage controlledcurrent source 34 can be designed to keep the peak of the sensed current relatively constant with respect to supply voltage variation. - The signal at
feedback point 12 initially modifies (reduces) current sense threshold in response to a load current decrease and thereby reduces the on time. When said feedback signal reaches a predetermined level, voltage controlled current source withgated threshold 2 will be activated as well and a simultaneous on time reduction and off time increase will be achieved resulting in high light load efficiencies. Voltage controlled current source withgated threshold 2 is typically set to be activated when the signal atfeedback point 12 exceeds the lower threshold, VL, of invertedSchmitt trigger 24. The voltage waveform atjunction 21 across timingcapacitor 16 is shown inFIG. 2B and the typical voltage waveform atjunction 27 is shown inFIG. 2D . - Another important feature of the operation of the present invention is the inherent noise filtration of the current waveform. The typical current waveform appearing at
junction 22 is not nearly as ideal as that depicted inFIG. 2A .FIG. 3A shows the control waveform of switchingelement 26 and the non-ideal current response is shown inFIG. 3B wherein the leading edge of the current waveform contains aspike 35 due to the input capacitance of switchingelement 26. Thiscurrent spike 35, which easily reaches above the current sense threshold, VTCS, would reset the inverted Schmitt trigger 24 if this was not counteracted by the integrating effect of timingcapacitor 16 and switchedcurrent source 1. The actual effect of thespike 35 of the waveform atjunction 21, the input of invertedSchmitt trigger 24, is shown inFIG. 3C wherein a voltage increase of dV is not sufficient to trip said inverted Schmitt trigger 24 to the off condition. Therein, the integrator formed by timingcapacitor 16 and switchedcurrent source 1 greatly reduces chances of false triggering.FIG. 3C further shows an off time discharge pattern typical to the implementation of a resistor in place of voltage controlledcurrent sink 4. - Yet another feature of the operation of the present invention is related to the overload condition.
Bias rectifier 30 can be chosen to have a limited but sufficiently large reverse recovery time such thatbias rectifier 30 in conjunction withbias resistor 29 will be average responding. Therefore, under overload condition, the bias voltage atjunction 31 can be made to collapse sufficiently with the output voltage acrossload 10 to disable the operation of the converter by means of typical under-voltage lockout circuitry 33. - Yet another feature of the operation of the present invention is related to the no load condition. Therein, a low frequency load hunting operation of the under-
voltage lockout circuitry 33 will be invoked, one cycle of which will be described herein. In order to achieve low power consumption under no load condition, the above mentioned rectification scheme of the bias voltage, utilizingbias rectifier 30 andbias resistor 29, is chosen such that at loads approaching 1% of the nominal full load value, said bias voltage average will be sufficiently small to trip the lockout feature of said under-voltage lockout circuit withhysteresis 33 whereby the converter is disabled for the duration required forstartup resistor 32 to chargestorage capacitor 19 to the positive going threshold, VHUVLO of under-voltage lockout circuitry 33 lasting several hundred milliseconds. When said positive going threshold has been reached, the converter turns on for a few milliseconds and in the absence of loads greater than 1% of the nominal full load value, the voltage oncapacitor 19 will drop again below the level of the negative going threshold, VLUVLO , of under-voltage lockout circuitry 33 thereby initiating a new cycle. - Although the present invention has been described in relation to particular embodiments thereof, many other variations, modifications, and other uses will become apparent to those skilled in the art. Therefore, the present invention should be limited not by specific disclosures herein, but only by the appended claim.
Claims (18)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA002591521A CA2591521A1 (en) | 2007-05-31 | 2007-05-31 | Wide supply range flyback converter |
CA2591521 | 2007-05-31 | ||
PCT/CA2008/000990 WO2008144894A1 (en) | 2007-05-31 | 2008-05-26 | Wide supply range flyback converter |
Publications (2)
Publication Number | Publication Date |
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US20100226148A1 true US20100226148A1 (en) | 2010-09-09 |
US8036002B2 US8036002B2 (en) | 2011-10-11 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US12/733,587 Expired - Fee Related US8036002B2 (en) | 2007-05-31 | 2008-05-26 | Wide supply range flyback converter |
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US (1) | US8036002B2 (en) |
CA (1) | CA2591521A1 (en) |
WO (1) | WO2008144894A1 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105446408A (en) * | 2015-12-27 | 2016-03-30 | 北京易艾斯德科技有限公司 | Self-inspection 4-20 mA output circuit with high precision |
US20180082991A1 (en) * | 2015-04-22 | 2018-03-22 | Renesas Electronics Corporation | Semiconductor device |
CN111431414A (en) * | 2017-06-20 | 2020-07-17 | 英飞凌科技奥地利有限公司 | Flyback converter and operation method thereof |
CN113472208A (en) * | 2021-06-21 | 2021-10-01 | 深圳欣锐科技股份有限公司 | Auxiliary circuit and power supply |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AT508969B1 (en) * | 2009-10-22 | 2011-07-15 | Lunatone Ind Elektronik Gmbh | LED POWER SUPPLY |
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US4847742A (en) * | 1987-02-12 | 1989-07-11 | Hitachi Video Engineering, Inc. | Multi-channel inverter circuit |
US6026005A (en) * | 1997-06-11 | 2000-02-15 | International Rectifier Corp. | Single ended forward converter with synchronous rectification and delay circuit in phase-locked loop |
US6940733B2 (en) * | 2002-08-22 | 2005-09-06 | Supertex, Inc. | Optimal control of wide conversion ratio switching converters |
US6972969B1 (en) * | 2004-08-19 | 2005-12-06 | Iwatt, Inc. | System and method for controlling current limit with primary side sensing |
US7310251B2 (en) * | 2006-02-24 | 2007-12-18 | System General Corp. | Control circuit having two-level under voltage lockout threshold to improve the protection of power supply |
US7710745B2 (en) * | 2004-08-06 | 2010-05-04 | Lhv Power Corporation | Bipolar power supply system |
Family Cites Families (1)
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US5305192A (en) * | 1991-11-01 | 1994-04-19 | Linear Technology Corporation | Switching regulator circuit using magnetic flux-sensing |
-
2007
- 2007-05-31 CA CA002591521A patent/CA2591521A1/en not_active Abandoned
-
2008
- 2008-05-26 WO PCT/CA2008/000990 patent/WO2008144894A1/en active Application Filing
- 2008-05-26 US US12/733,587 patent/US8036002B2/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4847742A (en) * | 1987-02-12 | 1989-07-11 | Hitachi Video Engineering, Inc. | Multi-channel inverter circuit |
US6026005A (en) * | 1997-06-11 | 2000-02-15 | International Rectifier Corp. | Single ended forward converter with synchronous rectification and delay circuit in phase-locked loop |
US6940733B2 (en) * | 2002-08-22 | 2005-09-06 | Supertex, Inc. | Optimal control of wide conversion ratio switching converters |
US7710745B2 (en) * | 2004-08-06 | 2010-05-04 | Lhv Power Corporation | Bipolar power supply system |
US6972969B1 (en) * | 2004-08-19 | 2005-12-06 | Iwatt, Inc. | System and method for controlling current limit with primary side sensing |
US7310251B2 (en) * | 2006-02-24 | 2007-12-18 | System General Corp. | Control circuit having two-level under voltage lockout threshold to improve the protection of power supply |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20180082991A1 (en) * | 2015-04-22 | 2018-03-22 | Renesas Electronics Corporation | Semiconductor device |
US10854588B2 (en) * | 2015-04-22 | 2020-12-01 | Renesas Electronics Corporation | Semiconductor device |
CN105446408A (en) * | 2015-12-27 | 2016-03-30 | 北京易艾斯德科技有限公司 | Self-inspection 4-20 mA output circuit with high precision |
CN111431414A (en) * | 2017-06-20 | 2020-07-17 | 英飞凌科技奥地利有限公司 | Flyback converter and operation method thereof |
CN113472208A (en) * | 2021-06-21 | 2021-10-01 | 深圳欣锐科技股份有限公司 | Auxiliary circuit and power supply |
Also Published As
Publication number | Publication date |
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US8036002B2 (en) | 2011-10-11 |
CA2591521A1 (en) | 2008-11-30 |
WO2008144894A1 (en) | 2008-12-04 |
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