US20100009483A1 - Method for fabricating a nitride-based semiconductor light emitting device - Google Patents
Method for fabricating a nitride-based semiconductor light emitting device Download PDFInfo
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- US20100009483A1 US20100009483A1 US12/561,237 US56123709A US2010009483A1 US 20100009483 A1 US20100009483 A1 US 20100009483A1 US 56123709 A US56123709 A US 56123709A US 2010009483 A1 US2010009483 A1 US 2010009483A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/16—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
Definitions
- the present disclosure generally relates to methods for fabricating a nitride-based semiconductor light emitting device with relatively low cost and high light extraction efficiency.
- nitride-based semiconductor light emitting devices such as gallium nitride light emitting diodes (LEDs) have the advantages of low power consumption and long life span, etc, and thus are widely used for display, backlighting, outdoor illumination, automobile illumination, etc.
- LEDs gallium nitride light emitting diodes
- an improvement of the light extraction efficiency of the conventional nitride-based LEDs is required.
- Kao et al. have published a paper in IEEE photonics technology letters, vol. 19, No. 11, pages 849-851 (June, 2007), entitled “light-output enhancement of nano-roughened GaN laser lift-off light-emitting diodes formed by ICP dry etching,” the disclosure of which is fully incorporated herein by reference.
- Kao et al. have proposed an approach for the improvement of the light extraction efficiency of the GaN LED, by way of roughening a light-emitting region of the GaN LED via an ICP-RIE (i.e., inductively coupled plasma-reactive ion etching) dry etching process.
- ICP-RIE i.e., inductively coupled plasma-reactive ion etching
- a GaN-based layer structure is epitaxially grown on a c-face sapphire substrate.
- the GaN-based layer structure is then placed into a vacuum chamber which is fed with chlorine and argon for ICP-RIE dry etching. Consequently, a light-emitting region of the GaN-based layer structure is given a nano-roughened surface which facilitates improvement of the light extraction efficiency of the GaN LED.
- the use of the c-face sapphire substrate would force the epitaxial growth of the GaN-based layer structure to be oriented along a c-axis ⁇ 0001> crystal orientation.
- the surface atoms of the resultant GaN-based layer structure are entirely gallium metal atoms.
- Such configuration of the surface atoms results in the GaN-based layer structure exhibiting a very strong polarity defect.
- Such polarity defect is liable to cause at least the following two difficulties.
- a quantum well structure in the GaN-based layer structure which is oriented along the c-axis ⁇ 0001> crystal orientation is liable to encounter a significantly strong quantum-confined stark effect (QCSE), so that an internal quantum efficiency of the GaN LED is lowered and thus the light extraction efficiency is reduced.
- QCSE quantum-confined stark effect
- FIG. 1 is a cross-sectional view of a nitride-base semiconductor light emitting device manufactured in accordance with an exemplary embodiment of a method of the present invention.
- FIG. 2 is a schematic, cross-sectional view of a single crystal plate used in the method of the exemplary embodiment.
- FIG. 3 shows a nitride-based multi-layered structure epitaxially formed on the single crystal plate of FIG. 2 .
- FIG. 4 shows the multi-layered structure of FIG. 3 having been patterned to form a mesa structure.
- FIG. 5 shows an N-type electrode and a P-type electrode formed on the patterned multi-layered structure of FIG. 4 .
- FIG. 6 is a photograph of the multi-layered structure of FIG. 5 after it has been treated by a wet etching process, the photograph obtained by a Scanning Electron Microscope (SEM).
- SEM Scanning Electron Microscope
- a nitride-based semiconductor light emitting device 20 in accordance with a present embodiment, is shown.
- the nitride-based semiconductor light emitting device 20 can for example be a gallium nitride light emitting diode (GaN LED).
- the nitride-based semiconductor light emitting device 20 includes a substrate 22 , a nitride-based multi-layered structure 24 epitaxially formed on the substrate 22 , an N-type electrode 26 , and a P-type electrode 28 .
- the substrate 22 beneficially is a single crystal plate, and can be made from material selected from the group consisting of sapphire, silicon carbide (SiC), silicon (Si), gallium arsenide (GaAs), lithium aluminate (LiAlO 2 ), magnesium oxide (MgO), zinc oxide (ZnO), GaN, aluminum nitride (AlN), indium nitride (InN), etc.
- the substrate 22 has a crystal face 222 , which facilitates the epitaxial growth of the multi-layered structure 24 thereon. A crystal orientation of the crystal face 222 matches with a crystal growth orientation of the multi-layered structure 24 .
- the multi-layered structure 24 includes an N-type layer 241 , an active layer 242 and a P-type layer 243 arranged in that order one on top of the other along a direction away from substrate 22 . That is, the active layer 242 is sandwiched between the N-type layer 241 and the P-type layer 243 .
- the N-type layer 241 is made of semiconductor material in which charge is carried by electrons
- the P-type layer 243 is made of semiconductor material in which charge is carried by holes.
- Each of the N-type layer 241 , the active layer 242 and the P-type layer 243 can be a single layer structure or a multi-layered structure, and each of the N-type layer 241 , the active layer 242 and the P-type layer 243 can suitably made from group III-nitride compound materials.
- the group III element can be aluminum (Al), gallium (Ga), indium (In), and so on.
- the N-type layer 241 , the active layer 242 and the P-type layer 243 are an N-type GaN layer, an InGaN layer and a P-type GaN layer, respectively.
- the multi-layered structure 24 has a crystal growth orientation intersecting with a ⁇ 0001> crystal orientation thereof. That is, crystal growth orientations of the N-type layer 241 , the active layer 242 and the P-type layer 243 respectively intersect with respective ⁇ 0001> crystal orientations thereof. Beneficially, the multi-layered structure 24 has a crystal growth orientation such as a ⁇ 11 2 0> crystal orientation or a ⁇ 10 1 0> crystal orientation substantially perpendicular to the ⁇ 0001> crystal orientation thereof.
- the multi-layered structure 24 includes a developed mesa structure 244 .
- the N-type layer 241 is stepped at a side thereof facing away from the substrate 22 . Thereby, the N-type layer 241 defines an exposed portion 245 thereof.
- the bottom of the mesa structure 244 terminates at a plane as denoted by the broken line in FIG. 1 .
- the mesa structure 244 includes but is not limited to the P-type layer 243 , the active layer 242 and a top portion of the N-type layer 241 .
- the mesa structure 244 has a top surface 247 and a plurality of side surfaces 246 adjoining the top surface 247 .
- the side surfaces 246 are located generally between the top surface 247 and the exposed portion 245 .
- the top surface 247 and the side surfaces 246 are roughened surfaces and include a plurality of recesses (or pits) 248 formed therein.
- the roughened surfaces are microstructure in form. The roughened surfaces can help transmit light emitted from the active layer 242 through the side surfaces 246 , so as to provide the nitride-based semiconductor light emitting device 20 with an improved light field distribution. That is, the divergence angle of light emitted from the nitride-based semiconductor light emitting device 20 is widened.
- the N-type electrode 26 is formed on the exposed portion 245 , so as to electrically connect with (e.g., ohmically contact) the N-type layer 241 .
- the N-type electrode 26 usually includes at least one metallic layer which is in ohmic contact with the N-type layer 241 .
- the P-type electrode 28 is formed on the top surface 247 of the mesa structure 244 so as to electrically connect with (e.g., ohmically contact) the P-type layer 243 .
- the P-type electrode 28 can be a single metallic layer or a multi-layered structure. When the P-type electrode 28 is a multi-layered structure, it essentially includes a metallic layer and a transparent conductive film.
- FIGS. 2 through 6 an exemplary method for fabricating the nitride-based semiconductor light emitting device 20 will be described in detail, with reference to the accompanying drawings.
- the substrate 12 is a single crystal plate and can be made from sapphire, SiC, Si, GaAs, LiAlO 2 , MgO, ZnO, GaN, AlN, InN, etc.
- the single crystal substrate 12 has a crystal face 122 , which facilitates a nitride-based multi-layered structure 14 being epitaxially grown thereon (see FIG. 3 ).
- a crystal orientation of the crystal face 122 matches with a crystal growth orientation of the multi-layered structure 14 epitaxially grown on the substrate 12 .
- the crystal face 122 can be a non-polar face or a semi-polar face.
- the non-polar face is a type of crystal face having a crystal orientation substantially perpendicular to the ⁇ 0001> crystal orientation of the crystal face 122 .
- the semi-polar face is a type of crystal face having a crystal orientation obliquely intersecting the ⁇ 0001> crystal orientation of the crystal face 122 .
- the multi-layered structure 14 is epitaxially formed on the crystal face 122 of the single crystal substrate 12 .
- the multi-layered structure 14 includes an N-type layer 141 , an active layer 142 and a P-type layer 143 arranged one on top of the other in that order along a direction away from the single crystal substrate 12 . That is, the active layer 142 is sandwiched between the N-type layer 141 and the P-type layer 143 .
- the N-type layer 141 is made of semiconductor material in which charge is carried by electrons
- the P-type layer 143 is made of semiconductor material in which charge is carried by holes.
- the N-type layer 141 , the active layer 142 and the P-type layer 143 are suitably made from group III-nitride compound materials.
- the N-type layer 141 , the active layer 142 and the P-type layer 143 are an N-type GaN layer, an InGaN layer and a P-type GaN layer, respectively.
- the multi-layered structure 14 has a crystal growth orientation such as a ⁇ 11 2 0> crystal orientation or a ⁇ 10 1 0> crystal orientation, which intersects with a ⁇ 0001> crystal orientation of the multi-layered structure 14 .
- surface atoms of the N-type layer 141 , the active layer 142 and the P-type layer 143 are not entirely metal atoms. That is, the surface atoms include metal atoms and nitrogen atoms. Due to the presence of the nitrogen atoms, the very strong polarity defect found in conventional multi-layered structures can be effectively minimized or even eliminated. Accordingly, a wet etching process is feasible for carrying out roughening of the surfaces of the multi-layered structure 14 .
- the multi-layered structure 14 is patterned and developed to form a mesa structure 144 .
- a top surface (not labeled) of the N-type layer 141 is partially exposed to form an exposed portion 145 .
- a hard mask layer (not shown), for example a patterned nickel layer, is firstly disposed on the multi-layered structure 14 .
- a dry etching operation such as an RIE etching process is then implemented to remove part of the P-type layer 143 , part of the active layer 142 , and a top surface portion of the N-type layer 141 .
- an exposed portion 145 of the N-type layer 141 is formed.
- the hard mask layer is then removed so that the mesa structure 144 formed on the multi-layered structure 14 is obtained.
- the mesa structure 144 at least includes but is not limited to the P-type layer 143 , the active layer 142 and a top portion of the N-type layer 141 .
- a bottom of the mesa structure 144 terminates at a plane as denoted by the broken line of FIG. 4 .
- the mesa structure 144 includes a top surface 147 facing away from the substrate 12 , and a plurality of side surfaces 146 adjoining the top surface 147 .
- the side surfaces 146 are located generally between the top surface 147 and the exposed portion 145 .
- an N-type electrode 16 and a P-type electrode 18 are respectively formed on and electrically (ohmically) contact the N-type layer 141 and the P-type layer 143 .
- the N-type electrode 16 is formed on the exposed portion 145 of the N-type layer 141
- the P-type electrode 18 is formed on the top surface 147 of the mesa structure 144 .
- a wet etching process is carried out for roughening the top surface 147 and the side surfaces 146 of the mesa structure 144 .
- the patterned multi-layered structure 14 is dipped or immersed into an acid etching solution, such as a solution containing a mixture of phosphoric acid and sulfuric acid.
- an acid etching solution such as a solution containing a mixture of phosphoric acid and sulfuric acid.
- a molar ratio of the phosphoric acid to the sulfuric acid is 1:1, and an etching temperature is above 150 degrees Celsius.
- the wet etching process is only applied to one of the top surfaces and the side surfaces at a time, with all the other surfaces being suitably protected from etching at that time.
- the etching rate, the etching selectivity and the roughness of each etched surface can be controlled by adjusting any one or more of the etching temperature, the composition of the etching solution, and the concentration of the etching solution.
- a nitride-based semiconductor light emitting device 20 as illustrated in FIG. 1 , is obtained.
- An SEM photograph of the multi-layered structure 14 after treatment with the wet etching process is shown in FIG. 6 .
- electromagnetic waves having a predetermined energy can be employed to irradiate etching areas such as the side surfaces 146 .
- the energy of the electromagnetic waves generally is higher than an energy gap of the nitride-based semiconductor material being etched, so that the nitride-based semiconductor material can absorb the energy of the electromagnetic waves. It is understood that the irradiation using the electromagnetic waves not only can accelerate the etching rate, but also can be utilized to reduce the etching temperature.
- the chemical etching solution is not limited to an acid etching solution.
- Other etching solutions such as an alkaline etching solution containing potassium hydroxide (KOH) can be employed, as long as the same or a similar etching effect is achieved.
- KOH potassium hydroxide
- the N-type layer 141 , 241 is instead a P-type layer
- the N-type electrode 16 , 26 is instead a P-type electrode
- the P-type layer 143 , 243 is instead an N-type layer
- the P-type electrode 18 , 28 is instead an N-type electrode.
Abstract
An exemplary method includes the following steps. First, a substrate is provided. Second, a nitride-based multi-layered structure is epitaxially grown on the substrate. The multi-layered structure includes a first-type layer, an active layer, and a second-type layer arranged one on the other in that order along a direction away from the substrate. A crystal growth orientation of the multi-layered structure intersects with a <0001> crystal orientation thereof. Thirdly, the multi-layered structure is patterned to form a mesa structure thereof, wherein the first-type layer is partially exposed to form an exposed portion. The mesa structure has a top surface facing away from the substrate, and side surfaces adjacent to the top surface. Fourthly, a first-type electrode and a second-type electrode are formed in ohmic contact with the first-type layer and the second-type layer, respectively. Finally, the top and side surfaces of the patterned multi-layered structure are wet etched.
Description
- The present application claims foreign priority based on Chinese Patent Application No. 200710201125.0, filed in China on Jul. 19, 2007; and the present application is a divisional application of U.S. patent application Ser. No. 12/102,617, filed on Apr. 14, 2008. The entire contents of the aforementioned related applications are incorporated by reference herein.
- 1. Technical Field
- The present disclosure generally relates to methods for fabricating a nitride-based semiconductor light emitting device with relatively low cost and high light extraction efficiency.
- 2. Description of Related Art
- Nowadays, nitride-based semiconductor light emitting devices such as gallium nitride light emitting diodes (LEDs) have the advantages of low power consumption and long life span, etc, and thus are widely used for display, backlighting, outdoor illumination, automobile illumination, etc. However, in order to achieve high luminous brightness, an improvement of the light extraction efficiency of the conventional nitride-based LEDs is required.
- Kao et al. have published a paper in IEEE photonics technology letters, vol. 19, No. 11, pages 849-851 (June, 2007), entitled “light-output enhancement of nano-roughened GaN laser lift-off light-emitting diodes formed by ICP dry etching,” the disclosure of which is fully incorporated herein by reference. Kao et al. have proposed an approach for the improvement of the light extraction efficiency of the GaN LED, by way of roughening a light-emitting region of the GaN LED via an ICP-RIE (i.e., inductively coupled plasma-reactive ion etching) dry etching process. In particular, firstly, a GaN-based layer structure is epitaxially grown on a c-face sapphire substrate. The GaN-based layer structure is then placed into a vacuum chamber which is fed with chlorine and argon for ICP-RIE dry etching. Consequently, a light-emitting region of the GaN-based layer structure is given a nano-roughened surface which facilitates improvement of the light extraction efficiency of the GaN LED.
- However, the use of the c-face sapphire substrate would force the epitaxial growth of the GaN-based layer structure to be oriented along a c-axis <0001> crystal orientation. As a result, the surface atoms of the resultant GaN-based layer structure are entirely gallium metal atoms. Such configuration of the surface atoms results in the GaN-based layer structure exhibiting a very strong polarity defect. Such polarity defect is liable to cause at least the following two difficulties. First, a quantum well structure in the GaN-based layer structure which is oriented along the c-axis <0001> crystal orientation is liable to encounter a significantly strong quantum-confined stark effect (QCSE), so that an internal quantum efficiency of the GaN LED is lowered and thus the light extraction efficiency is reduced. Second, in order to roughen the surface of the light-emitting region, a relatively high cost dry etching process with strong etching capability (e.g., an ICP-RIE etching process) is needed. Furthermore, due to the inherent selective etching characteristic of the dry etching process, it is difficult to roughen sidewalls of the GaN-based layer structure. Therefore further improvement of the light extraction efficiency of the GaN LED is limited.
- Accordingly, what is needed is an inexpensive method for fabricating a nitride-based semiconductor light emitting device with high extraction efficiency.
- Many aspects of the disclosure can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the disclosure. Moreover, in the drawings, all the views are schematic, and like reference numerals designate corresponding parts throughout the several views.
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FIG. 1 is a cross-sectional view of a nitride-base semiconductor light emitting device manufactured in accordance with an exemplary embodiment of a method of the present invention. -
FIG. 2 is a schematic, cross-sectional view of a single crystal plate used in the method of the exemplary embodiment. -
FIG. 3 shows a nitride-based multi-layered structure epitaxially formed on the single crystal plate ofFIG. 2 . -
FIG. 4 shows the multi-layered structure ofFIG. 3 having been patterned to form a mesa structure. -
FIG. 5 shows an N-type electrode and a P-type electrode formed on the patterned multi-layered structure ofFIG. 4 . -
FIG. 6 is a photograph of the multi-layered structure ofFIG. 5 after it has been treated by a wet etching process, the photograph obtained by a Scanning Electron Microscope (SEM). - The exemplifications set out herein illustrate various exemplary and preferred embodiments, in various forms, and such exemplifications are not to be construed as limiting the scope of the present method in any manner.
- Referring to
FIG. 1 , a nitride-based semiconductorlight emitting device 20, in accordance with a present embodiment, is shown. The nitride-based semiconductorlight emitting device 20 can for example be a gallium nitride light emitting diode (GaN LED). The nitride-based semiconductorlight emitting device 20 includes asubstrate 22, a nitride-basedmulti-layered structure 24 epitaxially formed on thesubstrate 22, an N-type electrode 26, and a P-type electrode 28. - The
substrate 22 beneficially is a single crystal plate, and can be made from material selected from the group consisting of sapphire, silicon carbide (SiC), silicon (Si), gallium arsenide (GaAs), lithium aluminate (LiAlO2), magnesium oxide (MgO), zinc oxide (ZnO), GaN, aluminum nitride (AlN), indium nitride (InN), etc. Thesubstrate 22 has acrystal face 222, which facilitates the epitaxial growth of themulti-layered structure 24 thereon. A crystal orientation of thecrystal face 222 matches with a crystal growth orientation of themulti-layered structure 24. - The
multi-layered structure 24 includes an N-type layer 241, anactive layer 242 and a P-type layer 243 arranged in that order one on top of the other along a direction away fromsubstrate 22. That is, theactive layer 242 is sandwiched between the N-type layer 241 and the P-type layer 243. The N-type layer 241 is made of semiconductor material in which charge is carried by electrons, and the P-type layer 243 is made of semiconductor material in which charge is carried by holes. Each of the N-type layer 241, theactive layer 242 and the P-type layer 243 can be a single layer structure or a multi-layered structure, and each of the N-type layer 241, theactive layer 242 and the P-type layer 243 can suitably made from group III-nitride compound materials. The group III element can be aluminum (Al), gallium (Ga), indium (In), and so on. For illustration purposes, the N-type layer 241, theactive layer 242 and the P-type layer 243 are an N-type GaN layer, an InGaN layer and a P-type GaN layer, respectively. - The
multi-layered structure 24 has a crystal growth orientation intersecting with a <0001> crystal orientation thereof. That is, crystal growth orientations of the N-type layer 241, theactive layer 242 and the P-type layer 243 respectively intersect with respective <0001> crystal orientations thereof. Beneficially, themulti-layered structure 24 has a crystal growth orientation such as a <112 0> crystal orientation or a <101 0> crystal orientation substantially perpendicular to the <0001> crystal orientation thereof. - The
multi-layered structure 24 includes adeveloped mesa structure 244. At a bottom of themesa structure 244, the N-type layer 241 is stepped at a side thereof facing away from thesubstrate 22. Thereby, the N-type layer 241 defines an exposedportion 245 thereof. The bottom of themesa structure 244 terminates at a plane as denoted by the broken line inFIG. 1 . Themesa structure 244 includes but is not limited to the P-type layer 243, theactive layer 242 and a top portion of the N-type layer 241. Themesa structure 244 has atop surface 247 and a plurality ofside surfaces 246 adjoining thetop surface 247. Theside surfaces 246 are located generally between thetop surface 247 and the exposedportion 245. Thetop surface 247 and theside surfaces 246 are roughened surfaces and include a plurality of recesses (or pits) 248 formed therein. The roughened surfaces are microstructure in form. The roughened surfaces can help transmit light emitted from theactive layer 242 through theside surfaces 246, so as to provide the nitride-based semiconductorlight emitting device 20 with an improved light field distribution. That is, the divergence angle of light emitted from the nitride-based semiconductorlight emitting device 20 is widened. - The N-
type electrode 26 is formed on the exposedportion 245, so as to electrically connect with (e.g., ohmically contact) the N-type layer 241. The N-type electrode 26 usually includes at least one metallic layer which is in ohmic contact with the N-type layer 241. - The P-
type electrode 28 is formed on thetop surface 247 of themesa structure 244 so as to electrically connect with (e.g., ohmically contact) the P-type layer 243. The P-type electrode 28 can be a single metallic layer or a multi-layered structure. When the P-type electrode 28 is a multi-layered structure, it essentially includes a metallic layer and a transparent conductive film. - Referring to
FIGS. 2 through 6 , an exemplary method for fabricating the nitride-based semiconductorlight emitting device 20 will be described in detail, with reference to the accompanying drawings. - As illustrated in
FIG. 2 , asubstrate 12 is provided. Thesubstrate 12 is a single crystal plate and can be made from sapphire, SiC, Si, GaAs, LiAlO2, MgO, ZnO, GaN, AlN, InN, etc. Thesingle crystal substrate 12 has acrystal face 122, which facilitates a nitride-basedmulti-layered structure 14 being epitaxially grown thereon (seeFIG. 3 ). A crystal orientation of thecrystal face 122 matches with a crystal growth orientation of themulti-layered structure 14 epitaxially grown on thesubstrate 12. Thecrystal face 122 can be a non-polar face or a semi-polar face. In particular, the non-polar face is a type of crystal face having a crystal orientation substantially perpendicular to the <0001> crystal orientation of thecrystal face 122. The semi-polar face is a type of crystal face having a crystal orientation obliquely intersecting the <0001> crystal orientation of thecrystal face 122. - Referring to
FIG. 3 , themulti-layered structure 14 is epitaxially formed on thecrystal face 122 of thesingle crystal substrate 12. Themulti-layered structure 14 includes an N-type layer 141, anactive layer 142 and a P-type layer 143 arranged one on top of the other in that order along a direction away from thesingle crystal substrate 12. That is, theactive layer 142 is sandwiched between the N-type layer 141 and the P-type layer 143. The N-type layer 141 is made of semiconductor material in which charge is carried by electrons, and the P-type layer 143 is made of semiconductor material in which charge is carried by holes. In the illustrated embodiment, the N-type layer 141, theactive layer 142 and the P-type layer 143 are suitably made from group III-nitride compound materials. For the purpose of illustration, the N-type layer 141, theactive layer 142 and the P-type layer 143 are an N-type GaN layer, an InGaN layer and a P-type GaN layer, respectively. - The
multi-layered structure 14 has a crystal growth orientation such as a <112 0> crystal orientation or a <101 0> crystal orientation, which intersects with a <0001> crystal orientation of themulti-layered structure 14. As such, surface atoms of the N-type layer 141, theactive layer 142 and the P-type layer 143 are not entirely metal atoms. That is, the surface atoms include metal atoms and nitrogen atoms. Due to the presence of the nitrogen atoms, the very strong polarity defect found in conventional multi-layered structures can be effectively minimized or even eliminated. Accordingly, a wet etching process is feasible for carrying out roughening of the surfaces of themulti-layered structure 14. - Referring to
FIG. 4 , themulti-layered structure 14 is patterned and developed to form amesa structure 144. In particular, a top surface (not labeled) of the N-type layer 141 is partially exposed to form an exposedportion 145. In detail, a hard mask layer (not shown), for example a patterned nickel layer, is firstly disposed on themulti-layered structure 14. A dry etching operation such as an RIE etching process is then implemented to remove part of the P-type layer 143, part of theactive layer 142, and a top surface portion of the N-type layer 141. Thus, an exposedportion 145 of the N-type layer 141 is formed. The hard mask layer is then removed so that themesa structure 144 formed on themulti-layered structure 14 is obtained. Themesa structure 144 at least includes but is not limited to the P-type layer 143, theactive layer 142 and a top portion of the N-type layer 141. A bottom of themesa structure 144 terminates at a plane as denoted by the broken line ofFIG. 4 . Themesa structure 144 includes atop surface 147 facing away from thesubstrate 12, and a plurality of side surfaces 146 adjoining thetop surface 147. The side surfaces 146 are located generally between thetop surface 147 and the exposedportion 145. - Referring to
FIG. 5 , an N-type electrode 16 and a P-type electrode 18 are respectively formed on and electrically (ohmically) contact the N-type layer 141 and the P-type layer 143. In particular, the N-type electrode 16 is formed on the exposedportion 145 of the N-type layer 141, and the P-type electrode 18 is formed on thetop surface 147 of themesa structure 144. - After the formation of the N-
type electrode 16 and the P-type electrode 18, a wet etching process is carried out for roughening thetop surface 147 and the side surfaces 146 of themesa structure 144. In particular, the patternedmulti-layered structure 14 is dipped or immersed into an acid etching solution, such as a solution containing a mixture of phosphoric acid and sulfuric acid. A molar ratio of the phosphoric acid to the sulfuric acid is 1:1, and an etching temperature is above 150 degrees Celsius. In one embodiment, the wet etching process is only applied to one of the top surfaces and the side surfaces at a time, with all the other surfaces being suitably protected from etching at that time. The etching rate, the etching selectivity and the roughness of each etched surface can be controlled by adjusting any one or more of the etching temperature, the composition of the etching solution, and the concentration of the etching solution. As a result of the wet etching process, a nitride-based semiconductorlight emitting device 20, as illustrated inFIG. 1 , is obtained. An SEM photograph of themulti-layered structure 14 after treatment with the wet etching process is shown inFIG. 6 . - Advantageously, in order to accelerate the etching rate of the wet etching process, electromagnetic waves having a predetermined energy can be employed to irradiate etching areas such as the side surfaces 146. The energy of the electromagnetic waves generally is higher than an energy gap of the nitride-based semiconductor material being etched, so that the nitride-based semiconductor material can absorb the energy of the electromagnetic waves. It is understood that the irradiation using the electromagnetic waves not only can accelerate the etching rate, but also can be utilized to reduce the etching temperature.
- The chemical etching solution is not limited to an acid etching solution. Other etching solutions such as an alkaline etching solution containing potassium hydroxide (KOH) can be employed, as long as the same or a similar etching effect is achieved.
- In addition, a person skilled in the art can perform various changes within the spirit of the present embodiments. For example, any of the material of the
substrates multi-layered structure type layer type electrode type layer type electrode - It is believed that the present embodiments and their advantages will be understood from the foregoing description, and it will be apparent that various changes may be made thereto without departing from the spirit and scope of the invention or sacrificing all of its material advantages, the examples hereinbefore described merely being preferred or exemplary embodiments of the present invention.
Claims (10)
1. A method for fabricating a nitride-based semiconductor light emitting device, the method comprising:
providing a substrate;
epitaxially growing a nitride-based multi-layered structure on the substrate, the multi-layered structure comprising a first-type layer, an active layer and a second-type layer arranged in that order along a direction away from the substrate, wherein a crystal growth orientation of the multi-layered structure intersects with a <0001> crystal orientation of the multi-layered structure;
patterning the multi-layered structure to form a mesa structure thereof, wherein the first-type layer is partially exposed to form an exposed portion, and the mesa structure has a top surface facing away from the substrate and a plurality of side surfaces adjacent to the top surface;
forming a first-type electrode and a second-type electrode on the exposed portion and the top surface, respectively, wherein the first-type electrode is in ohmic contact with the first-type layer and the second-type electrode is in ohmic contact with the second-type layer; and
wet etching the patterned multi-layered structure to roughen the top surface and the side surfaces of the mesa structure.
2. The method of claim 1 , wherein the substrate is a single crystal plate, the single crystal plate has a crystal face on which the multi-layered is epitaxially grown, and the crystal growth orientation of the multi-layered structure matches a crystal orientation of the crystal face.
3. The method of claim 1 , wherein the first-type layer, the active layer and the second-type layer are made from one or more group III-nitride compound materials.
4. The method of claim 3 , further comprising irradiating the mesa structure with electromagnetic waves during the wet etching, wherein an energy of the electromagnetic waves is equal to or higher than an energy gap of at least one group III-nitride compound material which is etched.
5. The method of claim 1 , wherein the crystal growth orientation of the multi-layered structure is substantially perpendicular to the <0001> crystal orientation of the multi-layered structure.
6. The method of claim 1 , wherein the wet etching is performed by one of an acid etching solution containing phosphoric acid and sulfuric acid, and an alkaline etching solution containing potassium hydroxide.
7. The method of claim 1 , wherein an etching temperature during the wet etching is higher than 150 degrees Celsius.
8. A method for fabricating a nitride-based semiconductor light emitting device, the method comprising:
providing a single crystal substrate having a crystal face, wherein the crystal face is one of a non-polar face and a semi-polar face;
epitaxially growing a nitride-based multi-layered structure on the crystal face, wherein a crystal growth orientation of the multi-layered structure matches a crystal orientation of the crystal face, and the multi-layered structure includes an N-type layer and a P-type layer;
treating the multi-layered structure to form a mesa structure thereof;
forming a pair of electrodes on the multi-layered structure, the electrodes being electrically connected with the N-type layer and the P-type layer, respectively; and
wet etching the multi-layered structure to roughen at least one surface selected from the group consisting of a top surface and side surfaces of the mesa structure.
9. The method of claim 8 , further comprising irradiating the mesa structure with electromagnetic waves during the wet etching, wherein the multi-layered structure is made from one or more group III-nitride compound materials, and an energy of the electromagnetic waves is equal to or higher than an energy gap of at least one group III-nitride compound material which is etched.
10. The method of claim 8 , wherein the top surface faces away from the single crystal substrate, the side surfaces are adjacent to the top surface, and the top surface and all the side surfaces are roughened during the wet etching.
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CN200710201125A CN100583475C (en) | 2007-07-19 | 2007-07-19 | Nitride semiconductor light emitting element and method for fabricating the same |
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US12/561,237 Abandoned US20100009483A1 (en) | 2007-07-19 | 2009-09-16 | Method for fabricating a nitride-based semiconductor light emitting device |
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Also Published As
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CN100583475C (en) | 2010-01-20 |
US20090020781A1 (en) | 2009-01-22 |
CN101350389A (en) | 2009-01-21 |
US7595514B2 (en) | 2009-09-29 |
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