US20090098790A1 - Field emission display (FED) and method of manufacture thereof - Google Patents
Field emission display (FED) and method of manufacture thereof Download PDFInfo
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- US20090098790A1 US20090098790A1 US12/232,858 US23285808A US2009098790A1 US 20090098790 A1 US20090098790 A1 US 20090098790A1 US 23285808 A US23285808 A US 23285808A US 2009098790 A1 US2009098790 A1 US 2009098790A1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J1/00—Details of electrodes, of magnetic control means, of screens, or of the mounting or spacing thereof, common to two or more basic types of discharge tubes or lamps
- H01J1/02—Main electrodes
- H01J1/30—Cold cathodes, e.g. field-emissive cathode
- H01J1/304—Field-emissive cathodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J9/00—Apparatus or processes specially adapted for the manufacture, installation, removal, maintenance of electric discharge tubes, discharge lamps, or parts thereof; Recovery of material from discharge tubes or lamps
- H01J9/02—Manufacture of electrodes or electrode systems
- H01J9/022—Manufacture of electrodes or electrode systems of cold cathodes
- H01J9/025—Manufacture of electrodes or electrode systems of cold cathodes of field emission cathodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J29/00—Details of cathode-ray tubes or of electron-beam tubes of the types covered by group H01J31/00
- H01J29/02—Electrodes; Screens; Mounting, supporting, spacing or insulating thereof
- H01J29/06—Screens for shielding; Masks interposed in the electron stream
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J29/00—Details of cathode-ray tubes or of electron-beam tubes of the types covered by group H01J31/00
- H01J29/46—Arrangements of electrodes and associated parts for generating or controlling the ray or beam, e.g. electron-optical arrangement
- H01J29/48—Electron guns
- H01J29/481—Electron guns using field-emission, photo-emission, or secondary-emission electron source
Definitions
- the present invention relates to a Field Emission Display (FED) and a method of manufacture thereof, and more particularly, to an FED in which the focusing effect of electron beams can be improved and a driving voltage can be reduced, and a method of manufacturing the FED.
- FED Field Emission Display
- a display which is an important part of a conventional information transmission medium, includes a PC monitor and a television (TV).
- the display can be a Cathode Ray Tube (CRT) using high-speed thermal electron emission and a flat panel display that has been recently developed.
- the flat panel display includes a Liquid Crystal Display (LCD), a Plasma Display Panel (PDP), and a Field Emission Display (FED).
- LCD Liquid Crystal Display
- PDP Plasma Display Panel
- FED Field Emission Display
- the Field Emission Display supplies a strong electric field between an emitter disposed on a cathode electrode and a gate electrode, thereby emitting electrons from the emitter, the electrons colliding with a fluorescent material on an anode layer, and emitting light. Since the FED is a thin display having an entire thickness of several centimeters and has the advantages of a wide viewing angle, low power, and low cost, the FED is considered to be a next generation display with LCDs and PDPs.
- the FED uses a physical principle similar to that of the CRT. That is, if electrons emitted from a cathode electrode are accelerated and collide with an anode electrode, a fluorescent layer coated on the anode electrode is excited so that light having a predetermined color is emitted.
- the emitter of the FED is formed of a cold cathode material, unlike in the CRT.
- a structure of an FED includes a lower substrate and an upper substrate, which are separated from each other.
- the lower substrate and the upper substrate are maintained at a predetermined distance by a spacer placed therebetween.
- a cathode electrode is formed on a top surface of the lower substrate, and an insulating layer and a gate electrode for electron extraction are sequentially stacked on the cathode electrode.
- a cavity through which a portion of the cathode electrode is exposed is formed on the insulating layer, and an emitter is formed in the cavity.
- An anode electrode is formed on a bottom surface of the upper substrate, and a fluorescent layer is coated on the anode electrode.
- the trajectories of the electron beams need to be controlled so that electrons emitted from an emitter are correctly transferred to a desired position of the anode electrode on which the fluorescent layer is coated.
- the present invention provides a field emission display (FED) in which the structure of an emitter is improved to improve the focusing effect of electron beams and to reduce a driving voltage, and a method of manufacturing the same.
- FED field emission display
- a Field Emission Display comprising: a substrate; a plurality of under-gate electrodes arranged parallel to one another on a top surface of the substrate; a plurality of cathode electrodes arranged perpendicular to the under-gate electrodes on an upper portion of the under-gate electrodes, the plurality of cathode electrodes having cathode holes arranged in portions of the cathode electrodes that intersect with the under-gate electrodes; a plurality of emitters arranged symmetrically with respect to centers of the cathode holes on the cathode electrodes; and a plurality of gate electrodes electrically connected to the under-gate electrodes in central portions of the cathode holes.
- FED Field Emission Display
- the emitters preferably comprise a ring shape along peripheries of the cathode holes.
- the emitters preferably comprise at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines.
- CNTs Carbon Nano-Tubes
- amorphous carbon nano-diamonds
- nano-metallic lines nano-oxidation metallic lines.
- the FED preferably further comprises: a first insulating layer arranged between the under-gate electrodes and the cathode electrodes: and first cavities arranged in the first insulating layer and communicating with the cathode holes.
- the FED preferably further comprises: a second insulating layer arranged on top surfaces of the cathode electrodes; and second cavities arranged in the second insulating layer and communicating with the cathode holes.
- the FED preferably further comprises a focusing electrode arranged on a top surface of the second insulating layer.
- the gate electrodes preferably protrude from bottom central portions of the first cavities.
- the FED preferably further comprises protrusions of an insulating material arranged in the gate electrodes.
- a top portion of each of the gate electrodes is preferably at the same height as the height of the cathode electrodes.
- a top portion of each of the gate electrodes is preferably at a height between that of the cathode electrodes and that of the focusing electrode.
- the FED preferably further comprises a mask layer for backward exposure arranged on top surfaces of the under-gate electrodes.
- the mask layer for backward exposure preferably comprises an amorphous silicon or a metallic thin film.
- the under-gate electrodes preferably comprise transparent electrodes.
- a Field Emission Display comprising: a substrate; a plurality of under-gate electrodes arranged parallel to one another on a top surface of the substrate; a plurality of cathode electrodes arranged perpendicular to the under-gate electrodes on an upper portion of the under-gate electrodes, the plurality of cathode electrodes having cathode holes arranged in portions of the cathode electrodes that intersect with the under-gate electrodes; and a plurality of emitters arranged symmetrically with respect to centers of the cathode holes on the cathode electrodes.
- FED Field Emission Display
- the emitters preferably comprise a ring shape along peripheries of the cathode holes.
- the emitters preferably comprise at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines.
- CNTs Carbon Nano-Tubes
- amorphous carbon nano-diamonds
- nano-metallic lines nano-oxidation metallic lines.
- the FED preferably further comprises: a first insulating layer arranged between the under-gate electrodes and the cathode electrodes; and first cavities communicating with the cathode holes and arranged in the first insulating layer.
- the FED preferably further comprises: a second insulating layer arranged on top surfaces of the cathode electrodes; and second cavities communicating with the cathode holes and arranged in the second insulating layer.
- the FED preferably further comprises a focusing electrode arranged on a top surface of the second insulating layer.
- the FED preferably further comprises a mask layer for backward exposure arranged on top surfaces of the under-gate electrodes.
- the mask layer for backward exposure preferably comprises amorphous silicon or a metallic thin film.
- the under-gate electrodes preferably comprise transparent electrodes.
- a Field Emission Display comprising: a lower substrate and an upper substrate arranged opposite to each other at a distance; a plurality of under-gate electrodes arranged parallel to one another on a top surface of the lower substrate; a plurality of cathode electrodes arranged perpendicular to the under-gate electrodes on an upper portion of the under-gate electrodes, the plurality of cathode electrodes having cathode holes arranged in portions of the cathode electrodes that intersect with the under-gate electrodes; an electron emission source having a plurality of emitters arranged symmetrically with respect to centers of the cathode holes on the cathode electrodes; an anode cathode arranged on a bottom surface of the upper substrate; and a fluorescent layer arranged on a bottom surface of the anode electrode; wherein the electron emission source includes a plurality of emitter arrays, each emitter array including at least one emitter and corresponding to each of sub-
- the fluorescent layer preferably comprises a plurality of sub-pixel areas corresponding to the emitter arrays and wherein the adjacent sub-pixel areas cross one another.
- the emitters preferably comprise a ring shape along peripheries of the cathode holes.
- the FED preferably further comprises a focusing electrode arranged on the cathode electrodes.
- the FED preferably further comprises a plurality of gate electrodes electrically connected to the under-gate electrodes, the plurality of gate electrodes being arranged in central portions of the cathode holes.
- a method of manufacturing a Field Emission Display comprising: forming a plurality of under-gate electrodes parallel to one another on a top surface of a substrate; forming a first insulating layer, having first cavities through which a portion of the under-gate electrodes is exposed, on the top surface of the substrate; forming a plurality of cathode electrodes, having cathode holes communicating with the first cavities, perpendicular to the under-gate electrodes on a top surface of the first insulating layer; forming a second insulating layer, having second cavities communicating with the cathode holes, on top surfaces of the cathode electrodes; forming a focusing electrode on a top surface of the second insulating layer; forming a plurality of gate electrodes protruding from bottom central portions of the first cavities; and forming a plurality of emitters symmetrical with centers of the gate electrodes on the cathode electrodes.
- FED Field Emission Display
- Forming the under-gate electrodes preferably comprises forming transparent electrodes.
- Forming the gate electrodes preferably comprises: forming protrusions protruding from the bottom central portions of the first cavities; and forming the gate electrodes on external surfaces of the protrusions.
- the protrusions and the second insulating layer are preferably simultaneously formed.
- the gate electrodes and the focusing electrode are preferably simultaneously formed.
- Forming the emitters preferably comprises: forming a mask layer for backward exposure on top surfaces of the under-gate electrode before forming the first insulating layer, the mask layer patterned in a shape corresponding to the emitters; coating an electron emission material on the cathode electrodes exposed through the second cavities; and patterning the electron emission material with a backward exposure photolithography process using the mask layer for backward exposure as a photo-mask to form the emitters.
- Forming the mask layer for backward exposure preferably comprises forming a layer of amorphous silicon or a metallic thin film.
- the emitters are preferably formed to have a ring shape along peripheries of the cathode holes.
- the emitters are preferably formed of at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines.
- CNTs Carbon Nano-Tubes
- amorphous carbon nano-diamonds
- nano-metallic lines nano-oxidation metallic lines.
- a method of manufacturing a Field Emission Display comprising: forming a plurality of under-gate electrodes parallel to one another on a top surface of a substrate; forming a first insulating layer, first cavities through which a portion of the under-gate electrodes is exposed, on the top surface of the substrate; forming a plurality of cathode electrodes, having cathode holes communicating with the first cavities, perpendicular to the under-gate electrodes on a top surface of the first insulating layer; forming a plurality of gate electrodes protruding from bottom central portions of the first cavities; forming a second insulating layer, having second cavities communicating with the cathode holes, on top surfaces of the cathode electrodes; forming a focusing electrode on a top surface of the second insulating layer; and forming a plurality of emitters symmetrical with centers of the gate electrodes on the cathode electrodes.
- FED Field Emission Display
- Forming the gate electrodes preferably comprises: forming protrusions protruding from the bottom central portions of the first cavities; and forming the gate electrodes on external surfaces of the protrusions.
- the protrusions and the first insulating layer are preferably simultaneously formed.
- the gate electrodes and the cathode electrodes are preferably simultaneously formed.
- Forming the emitters preferably comprises: forming a mask layer for backward exposure on top surfaces of the under-gate electrode before forming the first insulating layer, the mask layer patterned in a shape corresponding to the emitters; coating an electron emission material on the cathode electrodes exposed through the second cavities; and patterning the electron emission material with a backward exposure photolithography process using the mask layer for backward exposure as a photo-mask to form the emitters.
- Forming the mask layer for backward exposure preferably comprises forming a layer of amorphous silicon or a metallic thin film.
- the emitters are preferably formed to have a ring shape along peripheries of the cathode holes.
- a method of manufacturing a Field Emission Display comprising: forming a plurality of under-gate electrodes parallel to one another on a top surface of a substrate; forming a first insulating layer, first cavities through which a portion of the under-gate electrodes is exposed, on the top surface of the substrate; forming a plurality of cathode electrodes, having cathode holes communicating with the first cavities, perpendicular to the under-gate electrodes on a top surface of the first insulating layer; forming a second insulating layer, having second cavities communicating with the cathode holes, on top surfaces of the cathode electrodes; forming a focusing electrode on a top surface of the second insulating layer; and forming a plurality of emitters symmetrical with centers of the gate electrodes on the cathode electrodes.
- FED Field Emission Display
- Forming the emitters preferably comprises: forming a mask layer for backward exposure on top surfaces of the under-gate electrode before forming the first insulating layer, the mask layer patterned in a shape corresponding to the emitters; coating an electron emission material on the cathode electrodes exposed through the second cavities; and patterning the electron emission material with a backward exposure photolithography process using the mask layer for backward exposure as a photo-mask to form the emitters.
- Forming the mask layer for backward exposure preferably comprises forming a layer of amorphous silicon or a metallic thin film.
- the emitters are preferably formed to have a ring shape along peripheries of the cathode holes.
- FIG. 1 is a cross-sectional view of a Field Emission Display (FED);
- FED Field Emission Display
- FIG. 2 is a cross-sectional view of a portion of an FED according to an embodiment of the present invention.
- FIG. 3 is a perspective view of a cut important portion of the FED of FIG. 2 ;
- FIG. 4 is a cross-sectional view of the structure of the FED of FIG. 2 ;
- FIG. 5 is a plane view of an example of the arrangement of emitter arrays in the FED according to the embodiment of the present invention.
- FIG. 6 is a plane view of another example of the arrangement of emitter arrays in the FED according to the embodiment of the present invention.
- FIG. 7 is a plane view of an example of the arrangement of sub-pixel areas of a fluorescent layer in the FED according to the embodiment of the present invention.
- FIGS. 8A and 8B are views of areas in which the electron beams emitted from the emitter arrays of FIGS. 5 and 6 reach sub-pixel areas formed on a fluorescent layer;
- FIG. 9 is a cross-sectional view of a portion of a FED according to another embodiment of the present invention.
- FIG. 10 is a cross-sectional view of a portion of a FED according to still another embodiment of the present invention.
- FIGS. 11A through 11C are views of the result of a simulation performed on electron beam emission in the FED of FIG. 9 ;
- FIGS. 12A through 12C are views of the result of a simulation performed on electron beam emission in the FED of FIG. 10 ;
- FIGS. 13A through 19 are views of a method of manufacturing the FED of FIG. 4 ;
- FIGS. 20 through 24 are views of a method of manufacturing the FED of FIG. 9 ;
- FIGS. 25 through 29 are views of a method of manufacturing the FED of FIG. 10 .
- FIG. 1 A structure of an FED is shown in FIG. 1 .
- the FED of FIG. 1 includes a lower substrate 10 and an upper substrate 20 , which are separated from each other.
- the lower substrate 10 and the upper substrate 20 are maintained at a predetermined distance by a spacer (not shown) placed therebetween.
- a cathode electrode 12 is formed on a top surface of the lower substrate 10 , and an insulating layer 14 and a gate electrode 16 for electron extraction are sequentially stacked on the cathode electrode 12 .
- a cavity through which a portion of the cathode electrode 12 is exposed is formed on the insulating layer 14 , and an emitter 30 is formed in the cavity.
- An anode electrode 22 is formed on a bottom surface of the upper substrate 20 , and a fluorescent layer 24 is coated on the anode electrode 22 .
- the trajectories of the electron beams need to be controlled so that electrons emitted from an emitter 30 are correctly transferred to a desired position of the anode electrode 22 on which the fluorescent layer 24 is coated.
- FIG. 2 is a cross-sectional view of a portion of an FED according to an embodiment of the present invention
- FIG. 3 is a perspective view of a cut important portion of the FED of FIG. 2
- FIG. 4 is a cross-sectional view of the structure of the FED of FIG. 2 .
- the FED includes a lower substrate 110 and an upper substrate 120 , which are opposite to each other. A distance between the lower substrate 110 and the upper substrate 120 is maintained by a spacer (not shown) placed therebetween. A glass substrate is generally used as the lower substrate 110 and the upper substrate 120 .
- a plurality of under-gate electrodes 115 are formed parallel to one another in a striped form on the top surface of the lower substrate 110 .
- the under-gate electrodes 115 are formed of Indium Tin Oxide (ITO) which is a transparent conductive material.
- ITO Indium Tin Oxide
- a mask layer 113 for backward exposure patterned in a predetermined shape is formed on top surfaces of the under-gate electrodes 115 .
- the mask layer 113 for backward exposure is formed of amorphous silicon (a-Si) or a metallic thin film so that the under-gate electrodes 115 and gate electrodes 116 are electrically connected to one another.
- the mask layer 113 for backward exposure serves as a photomask for forming emitters 130 through a photolithography process using backward exposure and a resistive layer in a method of manufacturing the FED that will be described later.
- a first insulating layer 114 is formed on the top surface of the mask layer 113 for backward exposure to a predetermined thickness. First cavities 114 a through which the mask layer 113 for backward exposure is exposed are formed in the first insulating layer 114 .
- a plurality of cathode electrodes 112 are formed perpendicular to the under-gate electrodes 115 on the top surface of the first insulating layer 114 .
- the cathode electrodes 112 can be formed of a conductive metallic material or ITO which is a transparent conductive material.
- Each of cathode holes 112 a is formed in each of the cathode electrodes 112 that intersect with the under-gate electrodes 115 .
- Each of the cathode holes 112 a has a circular cross-section and communicates with each of the first cavities 114 a.
- a plurality of emitters 130 are formed on the cathode electrodes 112 in the vicinity of the cathode holes 112 a .
- Each emitter 130 is symmetrical with respect to the center of each cathode hole 112 a .
- Each emitter 130 can have a ring shape along the inside of each cathode hole 112 a , as shown in FIG. 3 .
- the emitters 130 can have a variety of shapes in which each emitter 130 is symmetrical with respect to the center of each cathode hole 112 a .
- the emitters 130 can be formed of a material by which electrons are easily emitted.
- the emitters 130 can be formed of at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines.
- CNTs Carbon Nano-Tubes
- amorphous carbon nano-diamonds
- nano-metallic lines nano-oxidation metallic lines.
- a second insulating layer 118 is formed on top surfaces of the cathode electrodes 112 a to a predetermined thickness. Second cavities 118 a which communicate with the cathode holes 112 a are formed in the second insulating layer 118 .
- a focusing electrode 140 is formed on the top surface of the second insulating layer 118 .
- the focusing electrode 140 controls the trajectories of electron beams emitted from the emitters 130 .
- the focusing electrode 140 can be formed of a conductive metallic material or ITO which is a transparent conductive material.
- the gate electrodes 116 are formed in central portions of the cathode holes 112 a . That is, each of the gate electrodes 116 is formed in a space formed by each of the first cavities 114 a , the cathode hole 112 a , and the second cavity 118 a .
- the gate electrodes 116 protrude from bottom central portions of the first cavities 114 a , and protrusions 117 formed of an insulating material are formed in the gate electrodes 116 .
- the gate electrodes 116 can be formed as one body and protrude from the bottom central portions of the first cavities 114 a .
- the gate electrodes 116 are formed so that the top portion thereof is at a height between the cathode electrode 112 and the focusing electrode 140 .
- the protrusions 117 can be formed at the same height as the thickness of the second insulating layer 118 .
- the gate electrodes 116 can be formed of a conductive metallic material or ITO which is a transparent conductive material, as in the focusing electrode 140 .
- An anode electrode 122 is formed on the bottom surface of the upper substrate 120 , and fluorescent layers 124 , in which Red (R), Green (G), and Blue (B) fluorescent materials are sequentially arranged, are formed on the bottom surface of the anode electrode 122 .
- the anode electrode 122 can be formed of ITO which is a transparent conductive material, so that visible light emitted from the fluorescent layers 124 is transmitted therethrough.
- a black matrix can be formed on the bottom surface of the upper substrate 120 and between the fluorescent layers 124 for contrast improvement.
- a structure of the FED according to the present embodiment in which the emitters 130 are arranged is described below with reference to FIGS. 5 and 6 .
- Emitter arrays 130 A constitute an electron emission source.
- Each of the emitter arrays 130 A corresponds to each of sub-pixels which are elements of one pixel in the FED.
- the adjacent emitter arrays 130 A cross one another, as shown in FIG. 5 .
- one emitter array 130 A is formed of five emitters 130 that are arranged in a line as shown in FIG. 5 , six or more emitters 130 or five or less emitters 130 that are arranged in a line and constitute one emitter array 130 A.
- the emitters 130 can have the structure of FIG. 6 . Referring to FIG. 6 , eight emitters 130 that are arranged in two lines constitute one emitter array 130 B. As described above, the adjacent emitter arrays 130 B cross one another. The number of emitters 130 of the emitter arrays 130 B can be different from the number of the emitters 130 of FIG. 6 .
- sub-pixel areas 124 R, 124 G, and 124 B of a fluorescent layer formed on the upper substrate 120 are arranged to have the structure of FIG. 7 .
- each of the sub-pixel areas 124 R, 124 G, and 124 B corresponds to each of the emitter arrays 130 A and 130 B.
- the adjacent sub-pixel areas 124 R, 124 G, and 124 B cross one another.
- Each of the sub-pixel areas 124 R, 124 G, and 124 B is formed to include all of areas in which electron beams emitted from the emitter arrays 130 A and 130 B reach the sub-pixel areas 124 R, 124 G, and 124 B.
- FIGS. 8A and 8B illustrate areas 50 and 50 ′ in which the electron beams emitted from the emitter arrays 130 A and 130 B of FIGS. 5 and 6 reach sub-pixel areas 24 R, 24 G, and 24 B formed on a fluorescent layer. Referring to FIGS. 8A and 8B , a portion of the electron beams emitted from the emitter arrays 130 A and 130 B reaches beyond the sub-pixel areas 24 R, 24 G, and 24 B.
- a predetermined voltage is supplied to the cathode electrode 112 and the gate electrode 116 .
- a voltage is supplied to the gate electrode 116 via the under-gate electrode 115 .
- electrons start to be emitted from the emitter 130 formed on the cathode electrode 112 .
- the emitted electrons causes the fluorescent layers 124 coated on the anode electrode 122 to which the positive voltage is supplied to excite and emit visible light.
- the trajectories of the electrons emitted from the emitter 130 are controlled by the focusing electrode 140 to which a predetermined voltage is supplied so that the electrons reach desired positions of the fluorescent layers 124 .
- FIG. 9 is a cross-sectional view of a portion of an FED according to another embodiment of the present invention. Differences between the above-described embodiment and the present embodiment are as follows.
- a plurality of under-gate electrodes 215 are formed parallel to one another on the top surface of a lower substrate 210 , and a mask layer 213 for backward exposure is formed on top surfaces of the under-gate electrodes 215 .
- a first insulating layer 214 having first cavities 214 a through which a portion of the mask layer 213 for backward exposure is exposed, is formed on the top surface of the mask layer 213 for backward exposure.
- a plurality of cathode electrodes 212 are formed perpendicular to the under-gate electrodes 215 on the top surface of the first insulating layer 214 .
- Cathode holes 212 a are formed in the cathode electrodes 212 that intersect with the under-gate electrodes 215 .
- the cathode holes 212 a communicate with the first cavities 214 a.
- a plurality of emitters 230 are formed on the cathode electrodes 212 in the vicinity of the cathode holes 212 a .
- Each emitter 230 has a ring shape along the inside of each cathode hole 212 a .
- the emitters 230 can be formed of at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines.
- a second insulating layer 218 having second cavities 218 a communicating with the cathode holes 212 a , is formed on top surfaces of the cathode electrodes 212 .
- a focusing electrode 240 is formed on the top surface of the second insulating layer 218 .
- Gate electrodes 216 are formed in central portions of the cathode holes 212 a .
- the gate electrodes 216 protrude from bottom central portions of the first cavities 214 a , and protrusions 217 of an insulating material are formed in the gate electrodes 216 .
- the gate electrodes 216 are formed so that the top portion thereof is placed at the same height as the height of the cathode electrode 212 .
- the protrusions 217 are formed at the same height as the thickness of the first insulating layer 214 .
- the gate electrodes 216 can be formed of a conductive metallic material or ITO which is a transparent conductive material, as in the cathode electrodes 212 .
- the gate electrode 216 can be formed as one body and protrude from the bottom central portions of the first cavities 214 a.
- FIG. 10 is a cross-sectional view of a portion of an FED according to still another embodiment of the present invention. Differences between the above-described embodiments and the present embodiment are as follows.
- a plurality of under-gate electrodes 315 are formed parallel to one another on the top surface of a lower substrate 310 , and a mask layer 313 for backward exposure is formed on top surfaces of the under-gate electrodes 315 .
- a first insulating layer 314 having first cavities 314 a through which a portion of the mask layer 313 for backward exposure is exposed, is formed on the top surface of the mask layer 313 for backward exposure.
- a plurality of cathode electrodes 312 are formed perpendicular to the under-gate electrodes 315 on the top surface of the first insulating layer 314 .
- Cathode holes 312 a are formed in the cathode electrodes 312 that intersect with the under-gate electrodes 315 .
- the cathode holes 312 a communicate with the first cavities 314 a.
- a plurality of emitters 330 are formed on the cathode electrodes 312 in the vicinity of the cathode holes 312 a .
- Each emitter 330 has a ring shape along the inside of each cathode hole 312 a.
- a second insulating layer 318 having second cavities 318 a communicating with the cathode holes 312 a , is formed on top surfaces of the cathode electrodes 312 .
- a focusing electrode 340 is formed on the top surface of the second insulating layer 318 .
- the under-gate electrodes 315 have the same roles as those of the gate electrodes 116 and 216 in the above-described embodiments. That is, when a predetermined voltage is supplied to each of the cathode electrodes 312 and the under-gate electrodes 315 , electrons are emitted from the emitters 330 formed on the cathode electrodes 312 .
- FIGS. 11A through 11C are views of the result of a simulation performed on electron beam emission in the FED of FIG. 9 .
- This simulation is performed under the following conditions.
- a voltage of 3000V is supplied to an anode electrode
- a voltage of 0V is supplied to a gate electrode
- a voltage of ⁇ 20V is supplied to a cathode electrode
- a voltage of ⁇ 20V is supplied to a focusing electrode so that brightness is about 300 cd/m2 which is an appropriate value.
- FIG. 11A illustrates the trajectories of electron beams emitted from an emitter
- FIG. 11B is an expanded view of the peripheries of the emitter
- FIG. 11C illustrates current density.
- the width of electron beams that reach a fluorescent layer is about 200-300 ⁇ m and the focusing effect of the electron beams is improved.
- the FED according to the present invention can achieve resolution appropriate for a picture quality of a 32′′ HD TV.
- the FED can be driven.
- the FED can be driven at a driving voltage lower than a prior-art driving voltage.
- FIGS. 12A through 12C are views of the result of a simulation performed on electron beam emission in the FED of FIG. 10 .
- This simulation is performed under the following conditions.
- a voltage of 3000V is supplied to an anode electrode
- a voltage of 0V is supplied to a gate electrode
- a voltage of ⁇ 20V is supplied to a cathode electrode
- a voltage of ⁇ 20V is supplied to a focusing electrode, as described above.
- FIG. 12A illustrates the trajectories of electron beams emitted from an emitter
- FIG. 12B is an expanded view of the peripheries of the emitter
- FIG. 12C illustrates current density.
- the width of electron beams that reach a fluorescent layer is about 200-300 ⁇ m, the focusing effect of electron beams is improved and the FED can be driven at a low driving voltage, as described above.
- FIGS. 13A through 19 are views of a method of manufacturing the FED of FIG. 4 .
- a plurality of under-gate electrodes 115 are formed parallel to one another on the top surface of a lower substrate 110 in a striped shape.
- a glass substrate is generally used as the lower substrate 110 , and the under-gate electrodes 115 can be formed by coating a transparent conductive material such as Indium Tin Oxide (ITO) on the top surface of the lower substrate 110 and by patterning the conductive material.
- ITO Indium Tin Oxide
- FIG. 14A is an enlarged view of a portion A of FIG. 14A
- FIG. 14C is a cross-sectional view of a unit structure taken along a line B-B′ of FIG. 14B .
- the mask layer 113 for backward exposure can be formed of amorphous silicon (a-Si) or a metallic thin film on the top surface of the lower substrate 110 and by patterning the a-Si or metallic thin film.
- the mask layer 113 for backward exposure serves as a photo-mask for forming emitters ( 130 of FIG. 19 ) through a photolithography process using backward exposure and a resistive layer in a process that will be described later.
- the mask layer 113 for backward exposure is patterned in a shape corresponding to the emitters ( 130 of FIG. 9 ).
- a first insulating layer 114 in which first cavities 114 a are formed is formed on the top surface of the mask layer 113 for backward exposure.
- the first insulating layer 114 can be formed by coating a predetermined insulating material on the top surface of the mask layer 113 for backward exposure, by patterning the insulating material, and by forming the first cavities 114 a through which a portion of the mask layer 113 for backward exposure is exposed.
- a plurality of cathode electrodes 112 are formed perpendicular to the under-gate electrodes 115 on the top surface of the first insulating layer 114 .
- each of cathode holes 112 a which communicate with the first cavities 114 a , is formed in each of the cathode electrodes 112 that intersect with the under-gate electrodes 115 .
- the cathode electrodes 112 can be formed by coating a conductive metallic material or transparent conductive material such as ITO, on the entire surface of a resultant of FIG. 15 and by patterning the material.
- the protrusions 117 are placed in a central portion of each cathode hole 112 a .
- the second insulating layer 118 and the protrusions 117 can be formed by coating a predetermined insulating material on the entire surface of a resultant of FIG. 16 and by patterning the insulating material. As such, the protrusions 117 are formed at the same height as the thickness of the second insulating layer 118 .
- the second insulating layer 118 and the protrusions 117 can be sequentially formed.
- a focusing electrode 140 is formed on the top surface of the second insulating layer 118 , and gate electrodes 116 are formed on external surfaces of the protrusions 117 .
- the focusing electrode 140 and the gate electrodes 116 can be simultaneously formed by coating a conductive material or transparent conductive material such as ITO on the entire surface of a resultant of FIG. 17 and by patterning the material.
- the focusing electrode 140 and the gate electrodes 116 can be sequentially formed.
- a plurality of emitters 130 are formed in a ring shape along insides of the cathode holes 112 a .
- Each of the emitters 130 is symmetrical with respect to the center of each cathode hole 112 a .
- the emitters 130 can be formed by coating a predetermined electron emission material on the entire surface of a resultant of FIG. 18 and by patterning the electron emission material through a photolithography process using backward exposure by using the mask layer 113 for backward exposure as a photo-mask.
- the electron emission material can be at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines.
- the emitters 130 can be formed by a photolithography process using a forward exposure. In this case, the mask layer 113 for backward exposure is not required.
- the emitters 130 can have a variety of shapes in which each emitter 130 is symmetrical with respect to the center of each cathode hole 112 a.
- an upper substrate ( 120 of FIG. 2 ) on which an anode electrode ( 122 of FIG. 2 ) and fluorescent layers ( 124 of FIG. 2 ) are formed are combined with a resultant of FIG. 19 to complete the FED.
- FIGS. 20 through 24 are views of a method of manufacturing the FED of FIG. 9 .
- a first insulating layer 214 in which first cavities 214 a are formed, and protrusions 217 that protrude from bottom central portions of the first cavities 214 a are formed on the top surface of a mask layer 213 for backward exposure.
- a process of forming a plurality of under-gate electrodes 215 on the top surface of a lower substrate 210 and forming the mask layer 213 for backward exposure on top surfaces of the under-gate electrodes 215 is the same as the process of FIGS. 13A through 14C , and accordingly, detailed descriptions thereof have been omitted.
- the first insulating layer 214 and the protrusions 217 can be simultaneously formed by coating a predetermined insulating material on the top surface of the mask layer 213 for backward exposure and by patterning the insulating material. As such, the protrusions 217 are formed at the same height as the thickness of the first insulating layer 214 .
- the first insulating layer 214 and the protrusions 217 can be sequentially formed.
- a plurality of cathode electrodes 212 are formed perpendicular to the under-gate electrodes 215 on the top surface of the first insulating layer 214 .
- Gate electrodes 216 are formed on external surfaces of the protrusions 217 .
- Each of cathode holes 212 a which communicate with the first cavities 214 a is formed in each of the cathode electrodes 212 that intersect with the under-gate electrodes 215 .
- the cathode electrodes 212 and the gate electrodes 216 can be simultaneously formed by coating a conductive metallic material or transparent conductive material such as ITO on the entire surface of a resultant of FIG. 20 and by patterning the material.
- the cathode electrodes 212 and the gate electrodes 216 can be sequentially formed.
- a second insulating layer 218 having second cavities 218 a communicating with the cathode holes 212 a , is formed on top surfaces of the cathode electrodes 212 .
- the second insulating layer 218 can be formed by coating a predetermined insulating material on the entire surface of a resultant of FIG. 21 and by patterning the insulating material.
- a focusing electrode 240 is formed on the top surface of the second insulating layer 218 .
- the focusing electrode 240 can be formed by coating a conductive metallic material or transparent conductive material such as ITO on the entire surface of a resultant of FIG. 22 and by patterning the material.
- a plurality of emitters 230 are formed in a ring shape along insides of the cathode holes 212 a .
- each of the emitters 230 is symmetrical with respect to the center of each cathode hole 212 a .
- the emitters 230 can be formed by coating a predetermined electron emission material on the entire surface of a resultant of FIG. 23 and by patterning the electron emission material through a photolithography process using backward exposure by using the mask layer 213 for backward exposure as a photo-mask.
- the electron emission material can be at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines.
- CNTs Carbon Nano-Tubes
- the emitters 230 can be formed by a photolithography process using a forward exposure. In this case, the mask layer 213 for backward exposure is not required.
- the emitters 230 can have a variety of shapes in which each emitter 230 is symmetrical with respect to the center of each cathode hole 212 a.
- An upper substrate ( 120 of FIG. 2 ) on which an anode electrode ( 122 of FIG. 2 ) and fluorescent layers ( 124 of FIG. 2 ) are formed are combined with a resultant of FIG. 24 to complete the FED.
- FIGS. 25 through 29 are views of a method of manufacturing the FED of FIG. 10 .
- a first insulating layer 314 having first cavities 314 a , is formed on the top surface of a mask layer 313 for backward exposure.
- a process of forming a plurality of under-gate electrodes 315 on the top surface of a lower substrate 310 and forming the mask layer 313 for backward exposure on top surfaces of the under-gate electrodes 315 is the same as the process of FIGS. 13A through 14C , and accordingly, a detailed descriptions thereof has been omitted.
- the first insulating layer 314 can be formed by coating a predetermined insulating material on the top surface of the mask layer 313 for backward exposure and by patterning the insulating material.
- a plurality of cathode electrodes 312 are formed perpendicular to the under-gate electrodes 315 on the top surface of the first insulating layer 314 .
- Each of cathode holes 312 a which communicate with the first cavities 314 a is formed in each of the cathode electrodes 312 that intersect with the under-gate electrodes 315 .
- the cathode electrodes 312 can be formed by coating a conductive metallic material or transparent conductive material such as ITO on the entire surface of a resultant of FIG. 25 and by patterning the material.
- a second insulating layer 318 having second cavities 318 a communicating with the cathode holes 312 a , is formed on top surfaces of the cathode electrodes 312 .
- the second insulating layer 318 can be formed by coating a predetermined insulating material on the entire surface of a resultant of FIG. 26 and by patterning the insulating material.
- a focusing electrode 340 is formed on the top surface of the second insulating layer 318 .
- the focusing electrode 340 can be formed by coating a conductive metallic material or transparent conductive material such as ITO on the entire surface of a resultant of FIG. 27 and by patterning the material.
- a plurality of emitters 330 are formed in a ring shape along insides of the cathode holes 312 a .
- Each of the emitters 330 is symmetrical with respect to the center of each cathode hole 312 a .
- the emitters 330 can be formed by coating a predetermined electron emission material on the entire surface of a resultant of FIG. 28 and by patterning the electron emission material through a photolithography process using backward exposure by using the mask layer 313 for backward exposure as a photo-mask.
- the electron emission material can be at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines.
- CNTs Carbon Nano-Tubes
- the emitters 330 can be formed by a photolithography process using a forward exposure. In this case, the mask layer 313 for backward exposure is not required.
- the emitters 330 can have a variety of shapes in which each emitter 330 is symmetrical with respect to the center of each cathode hole 312 a.
- An upper substrate ( 120 of FIG. 2 ) on which an anode electrode ( 122 of FIG. 2 ) and fluorescent layers ( 124 of FIG. 2 ) are formed are combined with a resultant of FIG. 29 to complete the FED.
- the FED and the method of manufacturing the FED according to the present invention have the following effects.
- the emitter structure is improved such that the area of electron emission of the emitter is increased and a luminance efficiency is improved.
- the focusing effect of the electron beams can be improved, and a driving voltage can be reduced.
- a process of manufacturing the FED according to the present invention is compatible with a conventional processes of manufacturing the FED such that the occurrence of additional costs are avoided.
Abstract
A Field Emission Display (FED) and a method of manufacturing the FED are provided. The FED includes a substrate; a plurality of under-gate electrodes formed parallel to one another on a top surface of a substrate; a plurality of cathode electrodes formed perpendicular to the under-gate electrodes on an upper portion of the under-gate electrode, each of cathode holes being formed in portions of the cathode electrodes that intersect with the under-gate electrodes; a plurality of emitters formed symmetrical with respect to centers of the cathode holes on the cathode electrodes; and a plurality of gate electrodes formed to be electrically connected to the under-gate electrodes in central portions of the cathode holes.
Description
- This application makes reference to, incorporates the same herein, and claims all benefits accruing under 35 U.S.C. §119 from an application for FIELD EMISSION DISPLAY AND METHOD OF MANUFACTURING THE SAME earlier filed in the Korean Intellectual Property Office on May, 22, 2004 and thereby duly assigned Serial No. 10-2004-0036670.
- 1. Field of the Invention
- The present invention relates to a Field Emission Display (FED) and a method of manufacture thereof, and more particularly, to an FED in which the focusing effect of electron beams can be improved and a driving voltage can be reduced, and a method of manufacturing the FED.
- 2. Description of the Related Art
- A display, which is an important part of a conventional information transmission medium, includes a PC monitor and a television (TV). The display can be a Cathode Ray Tube (CRT) using high-speed thermal electron emission and a flat panel display that has been recently developed. The flat panel display includes a Liquid Crystal Display (LCD), a Plasma Display Panel (PDP), and a Field Emission Display (FED).
- The Field Emission Display (FED) supplies a strong electric field between an emitter disposed on a cathode electrode and a gate electrode, thereby emitting electrons from the emitter, the electrons colliding with a fluorescent material on an anode layer, and emitting light. Since the FED is a thin display having an entire thickness of several centimeters and has the advantages of a wide viewing angle, low power, and low cost, the FED is considered to be a next generation display with LCDs and PDPs.
- The FED uses a physical principle similar to that of the CRT. That is, if electrons emitted from a cathode electrode are accelerated and collide with an anode electrode, a fluorescent layer coated on the anode electrode is excited so that light having a predetermined color is emitted. However, the emitter of the FED is formed of a cold cathode material, unlike in the CRT.
- A structure of an FED includes a lower substrate and an upper substrate, which are separated from each other. The lower substrate and the upper substrate are maintained at a predetermined distance by a spacer placed therebetween. A cathode electrode is formed on a top surface of the lower substrate, and an insulating layer and a gate electrode for electron extraction are sequentially stacked on the cathode electrode. A cavity through which a portion of the cathode electrode is exposed is formed on the insulating layer, and an emitter is formed in the cavity. An anode electrode is formed on a bottom surface of the upper substrate, and a fluorescent layer is coated on the anode electrode.
- In the FED having the above structure, when trajectories of electron beams are not correctly controlled, a desired color cannot be correctly represented in a desired pixel. Thus, the trajectories of the electron beams need to be controlled so that electrons emitted from an emitter are correctly transferred to a desired position of the anode electrode on which the fluorescent layer is coated.
- The present invention provides a field emission display (FED) in which the structure of an emitter is improved to improve the focusing effect of electron beams and to reduce a driving voltage, and a method of manufacturing the same.
- According to one aspect of the present invention, a Field Emission Display (FED) is provided comprising: a substrate; a plurality of under-gate electrodes arranged parallel to one another on a top surface of the substrate; a plurality of cathode electrodes arranged perpendicular to the under-gate electrodes on an upper portion of the under-gate electrodes, the plurality of cathode electrodes having cathode holes arranged in portions of the cathode electrodes that intersect with the under-gate electrodes; a plurality of emitters arranged symmetrically with respect to centers of the cathode holes on the cathode electrodes; and a plurality of gate electrodes electrically connected to the under-gate electrodes in central portions of the cathode holes.
- The emitters preferably comprise a ring shape along peripheries of the cathode holes.
- The emitters preferably comprise at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines.
- The FED preferably further comprises: a first insulating layer arranged between the under-gate electrodes and the cathode electrodes: and first cavities arranged in the first insulating layer and communicating with the cathode holes.
- The FED preferably further comprises: a second insulating layer arranged on top surfaces of the cathode electrodes; and second cavities arranged in the second insulating layer and communicating with the cathode holes.
- The FED preferably further comprises a focusing electrode arranged on a top surface of the second insulating layer.
- The gate electrodes preferably protrude from bottom central portions of the first cavities.
- The FED preferably further comprises protrusions of an insulating material arranged in the gate electrodes.
- A top portion of each of the gate electrodes is preferably at the same height as the height of the cathode electrodes.
- A top portion of each of the gate electrodes is preferably at a height between that of the cathode electrodes and that of the focusing electrode.
- The FED preferably further comprises a mask layer for backward exposure arranged on top surfaces of the under-gate electrodes.
- The mask layer for backward exposure preferably comprises an amorphous silicon or a metallic thin film.
- The under-gate electrodes preferably comprise transparent electrodes.
- According to another aspect of the present invention, a Field Emission Display (FED) is provided comprising: a substrate; a plurality of under-gate electrodes arranged parallel to one another on a top surface of the substrate; a plurality of cathode electrodes arranged perpendicular to the under-gate electrodes on an upper portion of the under-gate electrodes, the plurality of cathode electrodes having cathode holes arranged in portions of the cathode electrodes that intersect with the under-gate electrodes; and a plurality of emitters arranged symmetrically with respect to centers of the cathode holes on the cathode electrodes.
- The emitters preferably comprise a ring shape along peripheries of the cathode holes.
- The emitters preferably comprise at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines.
- The FED preferably further comprises: a first insulating layer arranged between the under-gate electrodes and the cathode electrodes; and first cavities communicating with the cathode holes and arranged in the first insulating layer.
- The FED preferably further comprises: a second insulating layer arranged on top surfaces of the cathode electrodes; and second cavities communicating with the cathode holes and arranged in the second insulating layer.
- The FED preferably further comprises a focusing electrode arranged on a top surface of the second insulating layer.
- The FED preferably further comprises a mask layer for backward exposure arranged on top surfaces of the under-gate electrodes.
- The mask layer for backward exposure preferably comprises amorphous silicon or a metallic thin film.
- The under-gate electrodes preferably comprise transparent electrodes.
- According to still another aspect of the present invention, a Field Emission Display (FED) is provided comprising: a lower substrate and an upper substrate arranged opposite to each other at a distance; a plurality of under-gate electrodes arranged parallel to one another on a top surface of the lower substrate; a plurality of cathode electrodes arranged perpendicular to the under-gate electrodes on an upper portion of the under-gate electrodes, the plurality of cathode electrodes having cathode holes arranged in portions of the cathode electrodes that intersect with the under-gate electrodes; an electron emission source having a plurality of emitters arranged symmetrically with respect to centers of the cathode holes on the cathode electrodes; an anode cathode arranged on a bottom surface of the upper substrate; and a fluorescent layer arranged on a bottom surface of the anode electrode; wherein the electron emission source includes a plurality of emitter arrays, each emitter array including at least one emitter and corresponding to each of sub-pixels of a pixel; and wherein adjacent emitter arrays cross one another.
- The fluorescent layer preferably comprises a plurality of sub-pixel areas corresponding to the emitter arrays and wherein the adjacent sub-pixel areas cross one another.
- The emitters preferably comprise a ring shape along peripheries of the cathode holes.
- The FED preferably further comprises a focusing electrode arranged on the cathode electrodes.
- The FED preferably further comprises a plurality of gate electrodes electrically connected to the under-gate electrodes, the plurality of gate electrodes being arranged in central portions of the cathode holes.
- According to yet another aspect of the present invention, a method of manufacturing a Field Emission Display (FED) is provided, the method comprising: forming a plurality of under-gate electrodes parallel to one another on a top surface of a substrate; forming a first insulating layer, having first cavities through which a portion of the under-gate electrodes is exposed, on the top surface of the substrate; forming a plurality of cathode electrodes, having cathode holes communicating with the first cavities, perpendicular to the under-gate electrodes on a top surface of the first insulating layer; forming a second insulating layer, having second cavities communicating with the cathode holes, on top surfaces of the cathode electrodes; forming a focusing electrode on a top surface of the second insulating layer; forming a plurality of gate electrodes protruding from bottom central portions of the first cavities; and forming a plurality of emitters symmetrical with centers of the gate electrodes on the cathode electrodes.
- Forming the under-gate electrodes preferably comprises forming transparent electrodes.
- Forming the gate electrodes preferably comprises: forming protrusions protruding from the bottom central portions of the first cavities; and forming the gate electrodes on external surfaces of the protrusions.
- The protrusions and the second insulating layer are preferably simultaneously formed.
- The gate electrodes and the focusing electrode are preferably simultaneously formed.
- Forming the emitters preferably comprises: forming a mask layer for backward exposure on top surfaces of the under-gate electrode before forming the first insulating layer, the mask layer patterned in a shape corresponding to the emitters; coating an electron emission material on the cathode electrodes exposed through the second cavities; and patterning the electron emission material with a backward exposure photolithography process using the mask layer for backward exposure as a photo-mask to form the emitters.
- Forming the mask layer for backward exposure preferably comprises forming a layer of amorphous silicon or a metallic thin film.
- The emitters are preferably formed to have a ring shape along peripheries of the cathode holes.
- The emitters are preferably formed of at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines.
- According to a further aspect of the present invention, a method of manufacturing a Field Emission Display (FED) is provided, the method comprising: forming a plurality of under-gate electrodes parallel to one another on a top surface of a substrate; forming a first insulating layer, first cavities through which a portion of the under-gate electrodes is exposed, on the top surface of the substrate; forming a plurality of cathode electrodes, having cathode holes communicating with the first cavities, perpendicular to the under-gate electrodes on a top surface of the first insulating layer; forming a plurality of gate electrodes protruding from bottom central portions of the first cavities; forming a second insulating layer, having second cavities communicating with the cathode holes, on top surfaces of the cathode electrodes; forming a focusing electrode on a top surface of the second insulating layer; and forming a plurality of emitters symmetrical with centers of the gate electrodes on the cathode electrodes.
- Forming the gate electrodes preferably comprises: forming protrusions protruding from the bottom central portions of the first cavities; and forming the gate electrodes on external surfaces of the protrusions.
- The protrusions and the first insulating layer are preferably simultaneously formed.
- The gate electrodes and the cathode electrodes are preferably simultaneously formed.
- Forming the emitters preferably comprises: forming a mask layer for backward exposure on top surfaces of the under-gate electrode before forming the first insulating layer, the mask layer patterned in a shape corresponding to the emitters; coating an electron emission material on the cathode electrodes exposed through the second cavities; and patterning the electron emission material with a backward exposure photolithography process using the mask layer for backward exposure as a photo-mask to form the emitters.
- Forming the mask layer for backward exposure preferably comprises forming a layer of amorphous silicon or a metallic thin film.
- The emitters are preferably formed to have a ring shape along peripheries of the cathode holes.
- According to yet a further aspect of the present invention, a method of manufacturing a Field Emission Display (FED) is provided, the method comprising: forming a plurality of under-gate electrodes parallel to one another on a top surface of a substrate; forming a first insulating layer, first cavities through which a portion of the under-gate electrodes is exposed, on the top surface of the substrate; forming a plurality of cathode electrodes, having cathode holes communicating with the first cavities, perpendicular to the under-gate electrodes on a top surface of the first insulating layer; forming a second insulating layer, having second cavities communicating with the cathode holes, on top surfaces of the cathode electrodes; forming a focusing electrode on a top surface of the second insulating layer; and forming a plurality of emitters symmetrical with centers of the gate electrodes on the cathode electrodes.
- Forming the emitters preferably comprises: forming a mask layer for backward exposure on top surfaces of the under-gate electrode before forming the first insulating layer, the mask layer patterned in a shape corresponding to the emitters; coating an electron emission material on the cathode electrodes exposed through the second cavities; and patterning the electron emission material with a backward exposure photolithography process using the mask layer for backward exposure as a photo-mask to form the emitters.
- Forming the mask layer for backward exposure preferably comprises forming a layer of amorphous silicon or a metallic thin film.
- The emitters are preferably formed to have a ring shape along peripheries of the cathode holes.
- A more complete appreciation of the present invention, and many of the attendant advantages thereof, will be readily apparent as the present invention becomes better understood by reference to the following detailed description when considered in conjunction with the accompanying drawings in which like reference symbols indicate same or similar components, wherein:
-
FIG. 1 is a cross-sectional view of a Field Emission Display (FED); -
FIG. 2 is a cross-sectional view of a portion of an FED according to an embodiment of the present invention; -
FIG. 3 is a perspective view of a cut important portion of the FED ofFIG. 2 ; -
FIG. 4 is a cross-sectional view of the structure of the FED ofFIG. 2 ; -
FIG. 5 is a plane view of an example of the arrangement of emitter arrays in the FED according to the embodiment of the present invention; -
FIG. 6 is a plane view of another example of the arrangement of emitter arrays in the FED according to the embodiment of the present invention; -
FIG. 7 is a plane view of an example of the arrangement of sub-pixel areas of a fluorescent layer in the FED according to the embodiment of the present invention; -
FIGS. 8A and 8B are views of areas in which the electron beams emitted from the emitter arrays ofFIGS. 5 and 6 reach sub-pixel areas formed on a fluorescent layer; -
FIG. 9 is a cross-sectional view of a portion of a FED according to another embodiment of the present invention; -
FIG. 10 is a cross-sectional view of a portion of a FED according to still another embodiment of the present invention; -
FIGS. 11A through 11C are views of the result of a simulation performed on electron beam emission in the FED ofFIG. 9 ; -
FIGS. 12A through 12C are views of the result of a simulation performed on electron beam emission in the FED ofFIG. 10 ; -
FIGS. 13A through 19 are views of a method of manufacturing the FED ofFIG. 4 ; -
FIGS. 20 through 24 are views of a method of manufacturing the FED ofFIG. 9 ; and -
FIGS. 25 through 29 are views of a method of manufacturing the FED ofFIG. 10 . - A structure of an FED is shown in
FIG. 1 . The FED ofFIG. 1 includes alower substrate 10 and anupper substrate 20, which are separated from each other. Thelower substrate 10 and theupper substrate 20 are maintained at a predetermined distance by a spacer (not shown) placed therebetween. Acathode electrode 12 is formed on a top surface of thelower substrate 10, and an insulatinglayer 14 and agate electrode 16 for electron extraction are sequentially stacked on thecathode electrode 12. A cavity through which a portion of thecathode electrode 12 is exposed is formed on the insulatinglayer 14, and anemitter 30 is formed in the cavity. Ananode electrode 22 is formed on a bottom surface of theupper substrate 20, and afluorescent layer 24 is coated on theanode electrode 22. - In the FED having the above structure, when trajectories of electron beams are not correctly controlled, a desired color cannot be correctly represented in a desired pixel. Thus, the trajectories of the electron beams need to be controlled so that electrons emitted from an
emitter 30 are correctly transferred to a desired position of theanode electrode 22 on which thefluorescent layer 24 is coated. - Hereinafter, exemplary embodiments of an FED and a method of manufacturing the FED according to the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals refer to like elements throughout the drawings.
-
FIG. 2 is a cross-sectional view of a portion of an FED according to an embodiment of the present invention,FIG. 3 is a perspective view of a cut important portion of the FED ofFIG. 2 , andFIG. 4 is a cross-sectional view of the structure of the FED ofFIG. 2 . - Referring to
FIGS. 2 through 4 , the FED includes alower substrate 110 and anupper substrate 120, which are opposite to each other. A distance between thelower substrate 110 and theupper substrate 120 is maintained by a spacer (not shown) placed therebetween. A glass substrate is generally used as thelower substrate 110 and theupper substrate 120. - A plurality of
under-gate electrodes 115 are formed parallel to one another in a striped form on the top surface of thelower substrate 110. Theunder-gate electrodes 115 are formed of Indium Tin Oxide (ITO) which is a transparent conductive material. Amask layer 113 for backward exposure patterned in a predetermined shape is formed on top surfaces of theunder-gate electrodes 115. Themask layer 113 for backward exposure is formed of amorphous silicon (a-Si) or a metallic thin film so that theunder-gate electrodes 115 andgate electrodes 116 are electrically connected to one another. Themask layer 113 for backward exposure serves as a photomask for formingemitters 130 through a photolithography process using backward exposure and a resistive layer in a method of manufacturing the FED that will be described later. - A first insulating
layer 114 is formed on the top surface of themask layer 113 for backward exposure to a predetermined thickness.First cavities 114 a through which themask layer 113 for backward exposure is exposed are formed in the first insulatinglayer 114. - A plurality of
cathode electrodes 112 are formed perpendicular to theunder-gate electrodes 115 on the top surface of the first insulatinglayer 114. Thecathode electrodes 112 can be formed of a conductive metallic material or ITO which is a transparent conductive material. Each ofcathode holes 112 a is formed in each of thecathode electrodes 112 that intersect with theunder-gate electrodes 115. Each of the cathode holes 112 a has a circular cross-section and communicates with each of thefirst cavities 114 a. - A plurality of
emitters 130 are formed on thecathode electrodes 112 in the vicinity of the cathode holes 112 a. Eachemitter 130 is symmetrical with respect to the center of eachcathode hole 112 a. Eachemitter 130 can have a ring shape along the inside of eachcathode hole 112 a, as shown inFIG. 3 . When eachemitter 130 is symmetrical with respect to the center of eachcathode hole 112 a, the area of electron emission by theemitters 130 is increased. In the present embodiment, theemitters 130 can have a variety of shapes in which eachemitter 130 is symmetrical with respect to the center of eachcathode hole 112 a. Theemitters 130 can be formed of a material by which electrons are easily emitted. Thus, theemitters 130 can be formed of at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines. - A second insulating
layer 118 is formed on top surfaces of thecathode electrodes 112 a to a predetermined thickness.Second cavities 118 a which communicate with the cathode holes 112 a are formed in the second insulatinglayer 118. - A focusing
electrode 140 is formed on the top surface of the second insulatinglayer 118. The focusingelectrode 140 controls the trajectories of electron beams emitted from theemitters 130. The focusingelectrode 140 can be formed of a conductive metallic material or ITO which is a transparent conductive material. - The
gate electrodes 116 are formed in central portions of the cathode holes 112 a. That is, each of thegate electrodes 116 is formed in a space formed by each of thefirst cavities 114 a, thecathode hole 112 a, and thesecond cavity 118 a. Thegate electrodes 116 protrude from bottom central portions of thefirst cavities 114 a, andprotrusions 117 formed of an insulating material are formed in thegate electrodes 116. Thegate electrodes 116 can be formed as one body and protrude from the bottom central portions of thefirst cavities 114 a. Thegate electrodes 116 are formed so that the top portion thereof is at a height between thecathode electrode 112 and the focusingelectrode 140. In this case, theprotrusions 117 can be formed at the same height as the thickness of the second insulatinglayer 118. Thegate electrodes 116 can be formed of a conductive metallic material or ITO which is a transparent conductive material, as in the focusingelectrode 140. - An
anode electrode 122 is formed on the bottom surface of theupper substrate 120, andfluorescent layers 124, in which Red (R), Green (G), and Blue (B) fluorescent materials are sequentially arranged, are formed on the bottom surface of theanode electrode 122. Theanode electrode 122 can be formed of ITO which is a transparent conductive material, so that visible light emitted from the fluorescent layers 124 is transmitted therethrough. A black matrix can be formed on the bottom surface of theupper substrate 120 and between thefluorescent layers 124 for contrast improvement. - A structure of the FED according to the present embodiment in which the
emitters 130 are arranged is described below with reference toFIGS. 5 and 6 . - First, referring to
FIG. 5 , fiveemitters 130 are arranged in a line and constitute oneemitter array 130A.Emitter arrays 130A constitute an electron emission source. Each of theemitter arrays 130A corresponds to each of sub-pixels which are elements of one pixel in the FED. Theadjacent emitter arrays 130A cross one another, as shown inFIG. 5 . Although oneemitter array 130A is formed of fiveemitters 130 that are arranged in a line as shown inFIG. 5 , six ormore emitters 130 or five orless emitters 130 that are arranged in a line and constitute oneemitter array 130A. - The
emitters 130 can have the structure ofFIG. 6 . Referring toFIG. 6 , eightemitters 130 that are arranged in two lines constitute oneemitter array 130B. As described above, theadjacent emitter arrays 130B cross one another. The number ofemitters 130 of theemitter arrays 130B can be different from the number of theemitters 130 ofFIG. 6 . - As the
emitter arrays lower substrate 110 to have the above structure,sub-pixel areas upper substrate 120 are arranged to have the structure ofFIG. 7 . Referring toFIG. 7 , each of thesub-pixel areas emitter arrays sub-pixel areas sub-pixel areas emitter arrays sub-pixel areas FIGS. 8A and 8B illustrateareas emitter arrays FIGS. 5 and 6 reach sub-pixel areas FIGS. 8A and 8B , a portion of the electron beams emitted from theemitter arrays sub-pixel areas sub-pixel areas FIG. 7 , electron beams emitted from theemitter arrays sub-pixel areas - The operation of the FED having the above structure is as follows. First, a predetermined voltage is supplied to the
cathode electrode 112 and thegate electrode 116. In this case, a voltage is supplied to thegate electrode 116 via theunder-gate electrode 115. Specifically, when a negative voltage is supplied to thecathode electrode 112 and a positive voltage is supplied to thegate electrode 116, electrons start to be emitted from theemitter 130 formed on thecathode electrode 112. The emitted electrons causes the fluorescent layers 124 coated on theanode electrode 122 to which the positive voltage is supplied to excite and emit visible light. The trajectories of the electrons emitted from theemitter 130 are controlled by the focusingelectrode 140 to which a predetermined voltage is supplied so that the electrons reach desired positions of the fluorescent layers 124. -
FIG. 9 is a cross-sectional view of a portion of an FED according to another embodiment of the present invention. Differences between the above-described embodiment and the present embodiment are as follows. - A plurality of
under-gate electrodes 215 are formed parallel to one another on the top surface of alower substrate 210, and amask layer 213 for backward exposure is formed on top surfaces of theunder-gate electrodes 215. A first insulatinglayer 214, havingfirst cavities 214 a through which a portion of themask layer 213 for backward exposure is exposed, is formed on the top surface of themask layer 213 for backward exposure. - A plurality of
cathode electrodes 212 are formed perpendicular to theunder-gate electrodes 215 on the top surface of the first insulatinglayer 214. Cathode holes 212 a are formed in thecathode electrodes 212 that intersect with theunder-gate electrodes 215. The cathode holes 212 a communicate with thefirst cavities 214 a. - A plurality of
emitters 230 are formed on thecathode electrodes 212 in the vicinity of the cathode holes 212 a. Eachemitter 230 has a ring shape along the inside of eachcathode hole 212 a. Theemitters 230 can be formed of at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines. - A second insulating
layer 218, havingsecond cavities 218 a communicating with the cathode holes 212 a, is formed on top surfaces of thecathode electrodes 212. A focusingelectrode 240 is formed on the top surface of the second insulatinglayer 218. -
Gate electrodes 216 are formed in central portions of the cathode holes 212 a. Thegate electrodes 216 protrude from bottom central portions of thefirst cavities 214 a, andprotrusions 217 of an insulating material are formed in thegate electrodes 216. Thegate electrodes 216 are formed so that the top portion thereof is placed at the same height as the height of thecathode electrode 212. As such, theprotrusions 217 are formed at the same height as the thickness of the first insulatinglayer 214. Thegate electrodes 216 can be formed of a conductive metallic material or ITO which is a transparent conductive material, as in thecathode electrodes 212. Thegate electrode 216 can be formed as one body and protrude from the bottom central portions of thefirst cavities 214 a. -
FIG. 10 is a cross-sectional view of a portion of an FED according to still another embodiment of the present invention. Differences between the above-described embodiments and the present embodiment are as follows. - A plurality of
under-gate electrodes 315 are formed parallel to one another on the top surface of alower substrate 310, and amask layer 313 for backward exposure is formed on top surfaces of theunder-gate electrodes 315. A first insulatinglayer 314, havingfirst cavities 314 a through which a portion of themask layer 313 for backward exposure is exposed, is formed on the top surface of themask layer 313 for backward exposure. - A plurality of
cathode electrodes 312 are formed perpendicular to theunder-gate electrodes 315 on the top surface of the first insulatinglayer 314. Cathode holes 312 a are formed in thecathode electrodes 312 that intersect with theunder-gate electrodes 315. The cathode holes 312 a communicate with thefirst cavities 314 a. - A plurality of
emitters 330 are formed on thecathode electrodes 312 in the vicinity of the cathode holes 312 a. Eachemitter 330 has a ring shape along the inside of eachcathode hole 312 a. - A second insulating
layer 318, havingsecond cavities 318 a communicating with the cathode holes 312 a, is formed on top surfaces of thecathode electrodes 312. A focusingelectrode 340 is formed on the top surface of the second insulatinglayer 318. - In the FED having the above structure, the
under-gate electrodes 315 have the same roles as those of thegate electrodes cathode electrodes 312 and theunder-gate electrodes 315, electrons are emitted from theemitters 330 formed on thecathode electrodes 312. - The result of a simulation performed on electron beam emission in the FED according to the present invention is described below with reference to
FIGS. 11A through 11C andFIGS. 12A through 12C . -
FIGS. 11A through 11C are views of the result of a simulation performed on electron beam emission in the FED ofFIG. 9 . This simulation is performed under the following conditions. A voltage of 3000V is supplied to an anode electrode, a voltage of 0V is supplied to a gate electrode, a voltage of −20V is supplied to a cathode electrode, and a voltage of −20V is supplied to a focusing electrode so that brightness is about 300 cd/m2 which is an appropriate value. Specifically,FIG. 11A illustrates the trajectories of electron beams emitted from an emitter,FIG. 11B is an expanded view of the peripheries of the emitter, andFIG. 11C illustrates current density. - Referring to
FIGS. 11A through 11C , it has been found that the width of electron beams that reach a fluorescent layer is about 200-300 μm and the focusing effect of the electron beams is improved. Thus, the FED according to the present invention can achieve resolution appropriate for a picture quality of a 32″ HD TV. In addition, even when a voltage of −20V is supplied to the cathode electrode, the FED can be driven. Thus, it has also been found that the FED can be driven at a driving voltage lower than a prior-art driving voltage. -
FIGS. 12A through 12C are views of the result of a simulation performed on electron beam emission in the FED ofFIG. 10 . This simulation is performed under the following conditions. A voltage of 3000V is supplied to an anode electrode, a voltage of 0V is supplied to a gate electrode, a voltage of −20V is supplied to a cathode electrode, and a voltage of −20V is supplied to a focusing electrode, as described above. Specifically,FIG. 12A illustrates the trajectories of electron beams emitted from an emitter,FIG. 12B is an expanded view of the peripheries of the emitter, andFIG. 12C illustrates current density. - Referring to
FIGS. 12A through 12C , it has been found that the width of electron beams that reach a fluorescent layer is about 200-300 μm, the focusing effect of electron beams is improved and the FED can be driven at a low driving voltage, as described above. - A method of manufacturing an FED according to the present invention is described below with reference to the accompanying drawings.
-
FIGS. 13A through 19 are views of a method of manufacturing the FED ofFIG. 4 . First, as shown inFIGS. 13A and 13B , a plurality ofunder-gate electrodes 115 are formed parallel to one another on the top surface of alower substrate 110 in a striped shape. A glass substrate is generally used as thelower substrate 110, and theunder-gate electrodes 115 can be formed by coating a transparent conductive material such as Indium Tin Oxide (ITO) on the top surface of thelower substrate 110 and by patterning the conductive material. - Next, as shown in
FIG. 14A , amask layer 113 for backward exposure is formed on the top surface of thelower substrate 110 to cover theunder-gate electrodes 115.FIG. 14B is an enlarged view of a portion A ofFIG. 14A , andFIG. 14C is a cross-sectional view of a unit structure taken along a line B-B′ ofFIG. 14B . - Only the cross-section of a unit structure of the FED will now be described with reference to the following drawings.
- The
mask layer 113 for backward exposure can be formed of amorphous silicon (a-Si) or a metallic thin film on the top surface of thelower substrate 110 and by patterning the a-Si or metallic thin film. Themask layer 113 for backward exposure serves as a photo-mask for forming emitters (130 ofFIG. 19 ) through a photolithography process using backward exposure and a resistive layer in a process that will be described later. Thus, themask layer 113 for backward exposure is patterned in a shape corresponding to the emitters (130 ofFIG. 9 ). By forming the emitters (130 ofFIG. 19 ) through the photolithography process using a forward exposure, the above-described operation of forming themask layer 113 for backward exposure can be omitted. - Subsequently, as shown in
FIG. 15 , a first insulatinglayer 114 in whichfirst cavities 114 a are formed, is formed on the top surface of themask layer 113 for backward exposure. The first insulatinglayer 114 can be formed by coating a predetermined insulating material on the top surface of themask layer 113 for backward exposure, by patterning the insulating material, and by forming thefirst cavities 114 a through which a portion of themask layer 113 for backward exposure is exposed. - As shown in
FIG. 16 , a plurality ofcathode electrodes 112 are formed perpendicular to theunder-gate electrodes 115 on the top surface of the first insulatinglayer 114. In this case, each ofcathode holes 112 a which communicate with thefirst cavities 114 a, is formed in each of thecathode electrodes 112 that intersect with theunder-gate electrodes 115. Thecathode electrodes 112 can be formed by coating a conductive metallic material or transparent conductive material such as ITO, on the entire surface of a resultant ofFIG. 15 and by patterning the material. - Subsequently, as shown in
FIG. 17 , a second insulatinglayer 118 in whichsecond cavities 118 a which communicate with the cathode holes 112 a are formed, andprotrusions 117 that protrude from a bottom central portion of eachfirst cavity 114 a are formed on top surfaces of thecathode electrodes 112 a. Theprotrusions 117 are placed in a central portion of eachcathode hole 112 a. The secondinsulating layer 118 and theprotrusions 117 can be formed by coating a predetermined insulating material on the entire surface of a resultant ofFIG. 16 and by patterning the insulating material. As such, theprotrusions 117 are formed at the same height as the thickness of the second insulatinglayer 118. The secondinsulating layer 118 and theprotrusions 117 can be sequentially formed. - As shown in
FIG. 18 , a focusingelectrode 140 is formed on the top surface of the second insulatinglayer 118, andgate electrodes 116 are formed on external surfaces of theprotrusions 117. The focusingelectrode 140 and thegate electrodes 116 can be simultaneously formed by coating a conductive material or transparent conductive material such as ITO on the entire surface of a resultant ofFIG. 17 and by patterning the material. The focusingelectrode 140 and thegate electrodes 116 can be sequentially formed. - As shown in
FIG. 19 , a plurality ofemitters 130 are formed in a ring shape along insides of the cathode holes 112 a. Each of theemitters 130 is symmetrical with respect to the center of eachcathode hole 112 a. Theemitters 130 can be formed by coating a predetermined electron emission material on the entire surface of a resultant ofFIG. 18 and by patterning the electron emission material through a photolithography process using backward exposure by using themask layer 113 for backward exposure as a photo-mask. The electron emission material can be at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines. Theemitters 130 can be formed by a photolithography process using a forward exposure. In this case, themask layer 113 for backward exposure is not required. Theemitters 130 can have a variety of shapes in which eachemitter 130 is symmetrical with respect to the center of eachcathode hole 112 a. - Last, an upper substrate (120 of
FIG. 2 ) on which an anode electrode (122 ofFIG. 2 ) and fluorescent layers (124 ofFIG. 2 ) are formed are combined with a resultant ofFIG. 19 to complete the FED. -
FIGS. 20 through 24 are views of a method of manufacturing the FED ofFIG. 9 . - As shown in
FIG. 20 , a first insulatinglayer 214 in whichfirst cavities 214 a are formed, andprotrusions 217 that protrude from bottom central portions of thefirst cavities 214 a are formed on the top surface of amask layer 213 for backward exposure. A process of forming a plurality ofunder-gate electrodes 215 on the top surface of alower substrate 210 and forming themask layer 213 for backward exposure on top surfaces of theunder-gate electrodes 215 is the same as the process ofFIGS. 13A through 14C , and accordingly, detailed descriptions thereof have been omitted. The first insulatinglayer 214 and theprotrusions 217 can be simultaneously formed by coating a predetermined insulating material on the top surface of themask layer 213 for backward exposure and by patterning the insulating material. As such, theprotrusions 217 are formed at the same height as the thickness of the first insulatinglayer 214. The first insulatinglayer 214 and theprotrusions 217 can be sequentially formed. - As shown in
FIG. 21 , a plurality ofcathode electrodes 212 are formed perpendicular to theunder-gate electrodes 215 on the top surface of the first insulatinglayer 214.Gate electrodes 216 are formed on external surfaces of theprotrusions 217. Each ofcathode holes 212 a which communicate with thefirst cavities 214 a, is formed in each of thecathode electrodes 212 that intersect with theunder-gate electrodes 215. Thecathode electrodes 212 and thegate electrodes 216 can be simultaneously formed by coating a conductive metallic material or transparent conductive material such as ITO on the entire surface of a resultant ofFIG. 20 and by patterning the material. Thecathode electrodes 212 and thegate electrodes 216 can be sequentially formed. - As shown in
FIG. 22 , a second insulatinglayer 218, havingsecond cavities 218 a communicating with the cathode holes 212 a, is formed on top surfaces of thecathode electrodes 212. The secondinsulating layer 218 can be formed by coating a predetermined insulating material on the entire surface of a resultant ofFIG. 21 and by patterning the insulating material. - As shown in
FIG. 23 , a focusingelectrode 240 is formed on the top surface of the second insulatinglayer 218. The focusingelectrode 240 can be formed by coating a conductive metallic material or transparent conductive material such as ITO on the entire surface of a resultant ofFIG. 22 and by patterning the material. - As shown in
FIG. 24 , a plurality ofemitters 230 are formed in a ring shape along insides of the cathode holes 212 a. Thus, each of theemitters 230 is symmetrical with respect to the center of eachcathode hole 212 a. Theemitters 230 can be formed by coating a predetermined electron emission material on the entire surface of a resultant ofFIG. 23 and by patterning the electron emission material through a photolithography process using backward exposure by using themask layer 213 for backward exposure as a photo-mask. The electron emission material can be at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines. Theemitters 230 can be formed by a photolithography process using a forward exposure. In this case, themask layer 213 for backward exposure is not required. Theemitters 230 can have a variety of shapes in which eachemitter 230 is symmetrical with respect to the center of eachcathode hole 212 a. - An upper substrate (120 of
FIG. 2 ) on which an anode electrode (122 ofFIG. 2 ) and fluorescent layers (124 ofFIG. 2 ) are formed are combined with a resultant ofFIG. 24 to complete the FED. -
FIGS. 25 through 29 are views of a method of manufacturing the FED ofFIG. 10 . - As shown in
FIG. 25 , a first insulatinglayer 314, havingfirst cavities 314 a, is formed on the top surface of amask layer 313 for backward exposure. A process of forming a plurality ofunder-gate electrodes 315 on the top surface of alower substrate 310 and forming themask layer 313 for backward exposure on top surfaces of theunder-gate electrodes 315 is the same as the process ofFIGS. 13A through 14C , and accordingly, a detailed descriptions thereof has been omitted. The first insulatinglayer 314 can be formed by coating a predetermined insulating material on the top surface of themask layer 313 for backward exposure and by patterning the insulating material. - As shown in
FIG. 26 , a plurality ofcathode electrodes 312 are formed perpendicular to theunder-gate electrodes 315 on the top surface of the first insulatinglayer 314. Each ofcathode holes 312 a which communicate with thefirst cavities 314 a, is formed in each of thecathode electrodes 312 that intersect with theunder-gate electrodes 315. Thecathode electrodes 312 can be formed by coating a conductive metallic material or transparent conductive material such as ITO on the entire surface of a resultant ofFIG. 25 and by patterning the material. - As shown in
FIG. 27 , a second insulatinglayer 318, havingsecond cavities 318 a communicating with the cathode holes 312 a, is formed on top surfaces of thecathode electrodes 312. The secondinsulating layer 318 can be formed by coating a predetermined insulating material on the entire surface of a resultant ofFIG. 26 and by patterning the insulating material. - As shown in
FIG. 28 , a focusingelectrode 340 is formed on the top surface of the second insulatinglayer 318. The focusingelectrode 340 can be formed by coating a conductive metallic material or transparent conductive material such as ITO on the entire surface of a resultant ofFIG. 27 and by patterning the material. - As shown in
FIG. 29 , a plurality ofemitters 330 are formed in a ring shape along insides of the cathode holes 312 a. Each of theemitters 330 is symmetrical with respect to the center of eachcathode hole 312 a. Theemitters 330 can be formed by coating a predetermined electron emission material on the entire surface of a resultant ofFIG. 28 and by patterning the electron emission material through a photolithography process using backward exposure by using themask layer 313 for backward exposure as a photo-mask. The electron emission material can be at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines. Theemitters 330 can be formed by a photolithography process using a forward exposure. In this case, themask layer 313 for backward exposure is not required. Theemitters 330 can have a variety of shapes in which eachemitter 330 is symmetrical with respect to the center of eachcathode hole 312 a. - An upper substrate (120 of
FIG. 2 ) on which an anode electrode (122 ofFIG. 2 ) and fluorescent layers (124 ofFIG. 2 ) are formed are combined with a resultant ofFIG. 29 to complete the FED. - As described above, the FED and the method of manufacturing the FED according to the present invention have the following effects.
- The emitter structure is improved such that the area of electron emission of the emitter is increased and a luminance efficiency is improved. In addition, the focusing effect of the electron beams can be improved, and a driving voltage can be reduced. Furthermore, a process of manufacturing the FED according to the present invention is compatible with a conventional processes of manufacturing the FED such that the occurrence of additional costs are avoided.
- While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various modifications in form and detail can be made therein without departing from the spirit and scope thereof as defined by the appended claims.
Claims (21)
1-27. (canceled)
28. A method of manufacturing a Field Emission Display (FED), the method comprising:
forming a plurality of under-gate electrodes parallel to one another on a top surface of a substrate;
forming a first insulating layer, having first cavities through which a portion of the under-gate electrodes is exposed, on the top surface of the substrate;
forming a plurality of cathode electrodes, having cathode holes communicating with the first cavities, perpendicular to the under-gate electrodes on a top surface of the first insulating layer;
forming a second insulating layer, having second cavities communicating with the cathode holes, on top surfaces of the cathode electrodes;
forming a focusing electrode on a top surface of the second insulating layer;
forming a plurality of gate electrodes protruding from bottom central portions of the first cavities; and
forming a plurality of emitters symmetrical with centers of the gate electrodes on the cathode electrodes.
29. The method of claim 28 , wherein forming the under-gate electrodes comprises forming transparent electrodes.
30. The method of claim 28 , wherein forming the gate electrodes comprises:
forming protrusions protruding from the bottom central portions of the first cavities; and
forming the gate electrodes on external surfaces of the protrusions.
31. The method of claim 30 , wherein the protrusions and the second insulating layer are simultaneously formed.
32. The method of claim 30 , wherein the gate electrodes and the focusing electrode are simultaneously formed.
33. The method of claim 28 , wherein forming the emitters comprises:
forming a mask layer for backward exposure on top surfaces of the under-gate electrode before forming the first insulating layer, the mask layer patterned in a shape corresponding to the emitters;
coating an electron emission material on the cathode electrodes exposed through the second cavities; and
patterning the electron emission material with a backward exposure photolithography process using the mask layer for backward exposure as a photo-mask to form the emitters.
34. The method of claim 33 , wherein forming the mask layer for backward exposure comprises forming a layer of amorphous silicon or a metallic thin film.
35. The method of claim 33 , wherein the emitters are formed to have a ring shape along peripheries of the cathode holes.
36. The method of claim 28 , wherein the emitters are formed of at least one material selected from the group consisting of Carbon Nano-Tubes (CNTs), amorphous carbon, nano-diamonds, nano-metallic lines, and nano-oxidation metallic lines.
37. A method of manufacturing a Field Emission Display (FED), the method comprising:
forming a plurality of under-gate electrodes parallel to one another on a top surface of a substrate;
forming a first insulating layer, first cavities through which a portion of the under-gate electrodes is exposed, on the top surface of the substrate;
forming a plurality of cathode electrodes, having cathode holes communicating with the first cavities, perpendicular to the under-gate electrodes on a top surface of the first insulating layer;
forming a plurality of gate electrodes protruding from bottom central portions of the first cavities;
forming a second insulating layer, having second cavities communicating with the cathode holes, on top surfaces of the cathode electrodes;
forming a focusing electrode on a top surface of the second insulating layer; and
forming a plurality of emitters symmetrical with centers of the gate electrodes on the cathode electrodes.
38. The method of claim 37 , wherein forming the gate electrodes comprises:
forming protrusions protruding from the bottom central portions of the first cavities; and
forming the gate electrodes on external surfaces of the protrusions.
39. The method of claim 38 , wherein the protrusions and the first insulating layer are simultaneously formed.
40. The method of claim 38 , wherein the gate electrodes and the cathode electrodes are simultaneously formed.
41. The method of claim 37 , wherein forming the emitters comprises:
forming a mask layer for backward exposure on top surfaces of the under-gate electrode before forming the first insulating layer, the mask layer patterned in a shape corresponding to the emitters;
coating an electron emission material on the cathode electrodes exposed through the second cavities; and
patterning the electron emission material with a backward exposure photolithography process using the mask layer for backward exposure as a photo-mask to form the emitters.
42. The method of claim 41 , wherein forming the mask layer for backward exposure comprises forming a layer of amorphous silicon or a metallic thin film.
43. The method of claim 41 , wherein the emitters are formed to have a ring shape along peripheries of the cathode holes.
44. A method of manufacturing a Field Emission Display (FED), the method comprising:
forming a plurality of under-gate electrodes parallel to one another on a top surface of a substrate;
forming a first insulating layer, first cavities through which a portion of the under-gate electrodes is exposed, on the top surface of the substrate;
forming a plurality of cathode electrodes, having cathode holes communicating with the first cavities, perpendicular to the under-gate electrodes on a top surface of the first insulating layer;
forming a second insulating layer, having second cavities communicating with the cathode holes, on top surfaces of the cathode electrodes;
forming a focusing electrode on a top surface of the second insulating layer; and
forming a plurality of emitters symmetrical with centers of the gate electrodes on the cathode electrodes.
45. The method of claim 44 , wherein forming the emitters comprises:
forming a mask layer for backward exposure on top surfaces of the under-gate electrode before forming the first insulating layer, the mask layer patterned in a shape corresponding to the emitters;
coating an electron emission material on the cathode electrodes exposed through the second cavities; and
patterning the electron emission material with a backward exposure photolithography process using the mask layer for backward exposure as a photo-mask to form the emitters.
46. The method of claim 45 , wherein forming the mask layer for backward exposure comprises forming a layer of amorphous silicon or a metallic thin film.
47. The method of claim 45 , wherein the emitters are formed to have a ring shape along peripheries of the cathode holes.
Priority Applications (1)
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US12/232,858 US20090098790A1 (en) | 2004-05-22 | 2008-09-25 | Field emission display (FED) and method of manufacture thereof |
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KR10-2004-0036670 | 2004-05-22 | ||
KR1020040036670A KR20050111706A (en) | 2004-05-22 | 2004-05-22 | Field emission display and method for manufacturing the same |
US11/131,222 US7495377B2 (en) | 2004-05-22 | 2005-05-18 | Field emission display (FED) and method of manufacture thereof |
US12/232,858 US20090098790A1 (en) | 2004-05-22 | 2008-09-25 | Field emission display (FED) and method of manufacture thereof |
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US11/131,222 Division US7495377B2 (en) | 2004-05-22 | 2005-05-18 | Field emission display (FED) and method of manufacture thereof |
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US11/131,222 Expired - Fee Related US7495377B2 (en) | 2004-05-22 | 2005-05-18 | Field emission display (FED) and method of manufacture thereof |
US12/232,858 Abandoned US20090098790A1 (en) | 2004-05-22 | 2008-09-25 | Field emission display (FED) and method of manufacture thereof |
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US (2) | US7495377B2 (en) |
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US20140097741A1 (en) * | 2012-10-10 | 2014-04-10 | Hon Hai Precision Industry Co., Ltd. | Field emission electron source and field emission device |
US20150035428A1 (en) * | 2013-08-02 | 2015-02-05 | Yonghai SUN | Nanostructure field emission cathode structure and method for making |
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KR20050062742A (en) * | 2003-12-22 | 2005-06-27 | 삼성에스디아이 주식회사 | Field emission device, display adopting the same and and method of manufacturing the same |
KR20060024565A (en) * | 2004-09-14 | 2006-03-17 | 삼성에스디아이 주식회사 | Field emission device and method for manufacturing the same |
KR20070013873A (en) * | 2005-07-27 | 2007-01-31 | 삼성에스디아이 주식회사 | Electron emission type backlight unit and flat panel display apparatus |
KR20070019836A (en) * | 2005-08-11 | 2007-02-15 | 삼성에스디아이 주식회사 | Electron emission device |
KR100803207B1 (en) * | 2005-12-21 | 2008-02-14 | 삼성전자주식회사 | Surface electron emission device and display unit having the same |
KR20070083113A (en) | 2006-02-20 | 2007-08-23 | 삼성에스디아이 주식회사 | Electron emission device and electron emission display device using the same |
JP2007329014A (en) * | 2006-06-08 | 2007-12-20 | Ulvac Japan Ltd | Cathode substrate for fed |
US20080111463A1 (en) * | 2006-11-14 | 2008-05-15 | Chih-Che Kuo | Backlight Source Structure Of Field Emission Type LCD |
FR2946456A1 (en) * | 2009-06-05 | 2010-12-10 | Thales Sa | COLLIMATE ELECTRONIC BEAM SOURCE WITH COLD CATHODE |
CN102074440B (en) * | 2010-12-15 | 2012-08-29 | 清华大学 | Field-emission cathode device and field-emission display |
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KR20050111706A (en) | 2005-11-28 |
US20050258729A1 (en) | 2005-11-24 |
JP2005340193A (en) | 2005-12-08 |
US7495377B2 (en) | 2009-02-24 |
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