US20060158280A1 - High frequency and wide band impedance matching via - Google Patents

High frequency and wide band impedance matching via Download PDF

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Publication number
US20060158280A1
US20060158280A1 US11/246,112 US24611205A US2006158280A1 US 20060158280 A1 US20060158280 A1 US 20060158280A1 US 24611205 A US24611205 A US 24611205A US 2006158280 A1 US2006158280 A1 US 2006158280A1
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Prior art keywords
ground
signal transmission
signal
vias
impedance matching
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US11/246,112
Inventor
Uei-Ming Jow
Ching-Liang Weng
Ying-Jiunn Lai
Chang-Sheng Chen
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Industrial Technology Research Institute ITRI
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Industrial Technology Research Institute ITRI
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Assigned to INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE reassignment INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHEN, CHANG-SHENG, JOW, UEI-MING, LAI, YING-JIUNN, WENG, CHING-LIANG
Publication of US20060158280A1 publication Critical patent/US20060158280A1/en
Priority to US12/801,673 priority Critical patent/US8058956B2/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0251—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00—Coupling devices of the waveguide type
    • H01P5/02—Coupling devices of the waveguide type with invariable factor of coupling
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • H05K1/0222—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors for shielding around a single via or around a group of vias, e.g. coaxial vias or vias surrounded by a grounded via fence
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6605—High-frequency electrical connections
    • H01L2223/6616—Vertical connections, e.g. vias
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6605—High-frequency electrical connections
    • H01L2223/6638—Differential pair signal lines
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0245—Lay-out of balanced signal pairs, e.g. differential lines or twisted lines
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09236—Parallel layout
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09454—Inner lands, i.e. lands around via or plated through-hole in internal layer of multilayer PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09618—Via fence, i.e. one-dimensional array of vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09627—Special connections between adjacent vias, not for grounding vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09809—Coaxial layout
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09845—Stepped hole, via, edge, bump or conductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers

Definitions

  • the invention relates to a conductive via to be applied to several substrates, such as multi-layer circuit boards, low temperature co-fired ceramics (LTCCs), integrated circuits (ICs), thick-film ceramics, thin-film ceramics or silicon-on-glass substrate processes, and more particular, to a high frequency and wide band impedance matching via.
  • substrates such as multi-layer circuit boards, low temperature co-fired ceramics (LTCCs), integrated circuits (ICs), thick-film ceramics, thin-film ceramics or silicon-on-glass substrate processes, and more particular, to a high frequency and wide band impedance matching via.
  • the printed circuit board which supports electronic components generally, is a plan substrate which was made up of glass fibers and on which conductive circuitry was printed.
  • the development of the PCB is inclined to the one with a small-bore diameter, high density, multi-layer and thin circuit.
  • An excellent scheme of increasing the density of the circuit is the multi-layer circuit board.
  • the circuitry design for the PCB is aimed at its width and distance of the signal transmission lines, further, at setting up the balanced impedance design.
  • the circuitry design for the conventional PCB is chiefly and simply aimed at the signal transmission in a plane and not aimed at the signal transmission in a perpendicular.
  • a difficult point of the circuitry design for the multi-layer circuit board is the signal transmission between the different layers in a perpendicular direction, so it will avoid vertically transmitting the signals over the vias between the layers in a perpendicular direction in many high-frequency circuitry designs.
  • a multilayer printed board is introduced. It has first and second signal transmission lines and first and second ground layers.
  • a signal via is connected between the first and second transmission lines.
  • Ground vias are connected between the first and second ground layers, and they are near to the signal via but not connected with it.
  • the end of the first ground layer protrudes with respect to the second ground layer and extends nearer to the signal via than the second ground layer.
  • the first and second ground layers are interlaced, so that it is procured to control the characteristic impedance effectively.
  • this circuitry design is complicated, so that flexibility in circuit application is decreasing and precision control of its PCB is not easy.
  • the present invention is directed to a high frequency and wide band impedance matching via, to substantially solve the problems in the prior art.
  • signal transmission traces sited on the different circuit layers are connected by vertical signal transmission vias, and vertical ground vias corresponding to the vertical signal transmission vias are sited to stabilize the characteristic impedance of the signal transmission traces, so that electrical signals having high frequency and high speed are completely transmitted in three-dimensional space.
  • a high frequency and wide band impedance matching via which is applied to each substrate, comprises a first signal transmission trace, a second signal transmission trace, a signal via, a first ground layer, a second ground layer and a ground via, wherein the signal and the ground vias are substantially perpendicular to the first and the second signal transmission traces and the first and the second ground layers.
  • the first and the second signal transmission traces are sited on different surface of the circuit layer respectively.
  • the first signal transmission trace is connected to the second signal transmission trace by the signal via, which is sited within the substrate, and the ground via is sited adjacent to the signal via.
  • first and the second ground layers are opposite to the first and the second signal transmission traces, respectively, and connected by the ground via.
  • the impedance is controlled by adjusting the distance between the ground via and the signal via, thereby enabling the signal transmission of the signal via, to have matching impedance. More preferably, the length of the signal via is similar to that of the ground via.
  • the structure has two ground vias, which are symmetrically sited around the signal via to be similar to a coplanar waveguide, and further, the structure has at least two ground vias which are symmetrically sited around the signal via to be similar to a coaxial cable. Furthermore, each ground via is connected to another by a conductor portion, thereby promoting electric characteristics of the structure.
  • the structure comprises a first signal transmission differential pair, a second signal transmission differential pair, a pair of signal vias, plane conductor traces and several ground vias, wherein the pair of ground vias are substantially perpendicular to the first and the second signal transmission differential pairs.
  • the first and the second signal transmission differential pairs are respectively sited on two surfaces of the substrate, and the first and the second signal transmission differential pairs are connected by the pair of signal vias.
  • the ground vias are connected to each other, and they are adjacent to the signal vias at a distance and are symmetrically sited in the insulation layer to match the signal vias. More preferably, the length of the signal via is similar to that of the ground via.
  • FIG. 1A and FIG. 1B are schematic views showing cross-sections of first and second embodiments according to the invention, respectively;
  • FIG. 2 is a schematic view showing a cross-section of a third embodiment according to the invention.
  • FIG. 3A , FIG. 3B , FG. 3 C and FIG. 3D are perspectives showing three-dimensional structures of fourth, fifth, sixth and seventh embodiments according to the invention, respectively;
  • FIG. 4A is a schematic view showing a three-dimensional structure of a eighth embodiment according to the invention.
  • FIG. 4B is a chart showing the measurements of impedance distribution of the three-dimensional structure in FIG. 4A ;
  • FIG. 5A and FIG. 5B are schematic views showing a three-dimensional structure of ninth and tenth embodiments according to the invention, respectively;
  • FIG. 5C and FIG. 5D are perspectives showing a three-dimensional structure of eleventh and twelfth embodiments according to the invention, respectively;
  • FIG. 6A is a schematic view showing a three-dimensional structure of an thirteenth embodiment according to the invention.
  • FIG. 6B are perspectives showing a three-dimensional structure of a fourteenth embodiment according to the invention.
  • a conductive through-via according to the invention is applied to all kinds of substrates, such as multi-layer circuit boards, low temperature co-fired ceramics (LTCCs), integrated circuits (ICs), thick-film ceramics, thin-film ceramics or silicon-on-glass substrate processes, and has ground vias sited around signal vias, thereby enabling the signal transmission of the signal vias to have impedance match.
  • substrates such as multi-layer circuit boards, low temperature co-fired ceramics (LTCCs), integrated circuits (ICs), thick-film ceramics, thin-film ceramics or silicon-on-glass substrate processes, and has ground vias sited around signal vias, thereby enabling the signal transmission of the signal vias to have impedance match.
  • LTCCs low temperature co-fired ceramics
  • ICs integrated circuits
  • thick-film ceramics thick-film ceramics
  • thin-film ceramics or silicon-on-glass substrate processes and has ground vias sited around signal vias, thereby enabling the signal transmission of the signal vias
  • the structure of the multi-layer printed circuit board is a combination of insulation layers and circuit layers, which are stacked in repeating order of each other, in where circuit layers are electrically connected to another one by vertical signal vias, and vertical ground vias are sited appropriately, to enable the signal transmission of the signal vias to achieve impedance match.
  • the multi-layer printed circuit board is a combination of several insulation layers and several circuit layers, which are stacked staggeredly.
  • FIG. 1A is a cross-section of a first embodiment according to the invention.
  • a six-layer printed circuit board for example, has six circuit layers 110 , which are separated by insulation layers 120 .
  • the circuit layer 110 may be a signal transmission trace or a ground layer.
  • the signal and the ground vias 113 , 114 are substantially perpendicular to first and second signal transmission traces 111 , 112 , and first and second ground layers 115 , 116 .
  • the first signal transmission trace 111 is sited on the bottom circuit layer 110 , as a first surface of the substrate, the second signal transmission trace 112 is sited on the top circuit layer 110 , as a second surface of the substrate, and the several insulation layers 120 separate them.
  • the first signal transmission trace 111 is connected to the second signal transmission trace 112 by the signal via 113 , and the ground via 114 sited adjacent to the signal via 113 runs through internal circuit layers and is at a distance D from the signal via 113 .
  • the ground via 114 connects the first ground layer 115 with the second ground layer 116 .
  • the first signal transmission trace 111 is opposite to the first ground layers 115
  • the second signal transmission trace 112 is opposite to the second ground layers 116
  • the signal via 113 is opposite to the ground via 114 .
  • the impedance is controlled through adjusting the distance D, so that the signal transmission of the signal vial 13 has impedance match.
  • the length of the ground via 114 is similar to that of the signal via 113 , and the ground via 114 is not connected to the first and second signal transmission traces 111 , 112 , as shown in FIG. 1B .
  • FIG. 2 illustrates a cross-section of a structure according to a third embodiment.
  • a six-layer printed circuit board for example, has six circuit layers 110 , which are separated by insulation layers 120 , where the circuit layer 110 may be a signal transmission trace or a ground layer.
  • the structure according to the second embodiment of the invention comprises a first signal transmission trace 111 , a second signal transmission trace 112 , a signal via 113 and two ground vias 114 , wherein the signal and the ground vias 113 , 114 are substantially perpendicular to the first and the second signal transmission traces 111 , 112 , and first and second ground layers 115 , 116 .
  • the first and the second signal transmission trace 111 , 112 are respectively sited on the bottom and top circuit layer 110 , and the several insulation layers 120 separate them.
  • the first signal transmission trace 111 is connected to the second signal transmission trace 112 by the signal via 113 , and the ground vias 114 sited adjacent and symmetrical to the signal via 113 run through internal circuit layers 110 and are at a distance D from the signal via 113 .
  • the ground vias 114 connect the first ground layer 115 with the second ground layer 116 .
  • the first signal transmission trace 111 is opposite to the first ground layer 115
  • the second signal transmission trace 112 is opposite to the second ground layer 116
  • the signal via 113 is opposite to the ground vias 114 .
  • the impedance is controlled thought adjusting the distance D, so that the signal transmission of the signal via 113 has impedance match.
  • the structure further comprises at least one conductor portion (not showed in the drawing).
  • the ground vias are connected by the conductor portion sited around the signal via 113 and are separated from the signal via 113 .
  • the conductor portion is the cambered conductor portion or a hollow conductor portion.
  • the form of the hollow conductor portion is circular, such as a substantial circular form, a rectangle, etc.
  • the number of ground vias is two. However, it can be more than two according to the invention. More preferably, the length of the signal via is also similar to that of the ground via (not shown to conveniently illustrate).
  • the structure according to the invention is applied in the signal transmission for differential pairs.
  • FIG. 3A is three-dimensional structures of a fourth embodiment according to the invention.
  • the structure comprises a first signal transmission differential pair 311 , a second signal transmission differential pair 312 , a pair of signal vias, several ground vias 314 and a conductor portion.
  • the conductor portion is a hollow conductor portion 316 .
  • the pair of ground vias 314 is substantially perpendicular to the first and the second signal transmission differential pairs 311 , 312 .
  • the first and the second signal transmission differential pairs 311 , 312 are separated with an insulation layer 320 , and the first and the second signal transmission differential pairs 311 , 312 are connected by several signal vias.
  • the signal vias comprise several vertical signal vias 313 and several plane conductor traces 315 .
  • the vertical signal vias 313 are intersected in the insulation layer 320 , to form a vertically electrical connection, and the plane conductor traces 315 are connected to the vertical signal vias 313 to form an electrical connection in the plane.
  • the ground vias 314 are adjacent to the signal vias and are symmetrically sited in an opposite position of the signal vias and in the insulation layer 320 , to match the vertical signal vias 313 .
  • the ground vias 314 are electrically connected by the hollow conductor portion 316 .
  • the hollow conductor portion 316 surrounds the vertical signal vias 313 , as shown in FIG. 3A ; and further, the conductor portion 317 is a cambered conductor portion sited in one side of the vertical signal vias 313 , as shown in FIG. 3B .
  • the signal via 313 is opposite to the ground via 314 , and the length of the signal via 313 is preferably similar to that of the ground via 314 .
  • first signal transmission differential pair 311 may be opposite to the first ground layer 317
  • second signal transmission differential pair 312 may be opposite to the second ground layer 318
  • first and second ground layers 317 , 318 are connected to the hollow conductor portion 316 , as shown in FIG. 3C and FIG. 3D . That is, the first and second ground layers 317 , 318 are connected to each other by the ground vias 314 .
  • the first and second ground layers 317 , 318 are traces in FIG. 3C and FIG. 3D , they may be whole planes according to actual requirement for circuit design.
  • the structure comprises a first signal transmission trace 411 , a second signal transmission trace 412 , a signal via 413 , and two ground vias 414 .
  • the signal and the ground vias 413 , 414 are substantially perpendicular to the first and the second signal transmission traces 411 , 412 .
  • the first and the second signal transmission traces 411 , 412 are separated with an insulation layer (not shown to conveniently illustrate), and the first and the second signal transmission traces 411 , 412 are connected by the signal via 413 .
  • the ground vias 414 are sited adjacent to the signal via 413 at a distance D and are symmetrically sited on the side of the signal via 413 .
  • first ground layer 416 is opposite to the first signal transmission trace 411 , e.g. above the first signal transmission trace 411 , and it is connected to the ground vias 414 .
  • second ground layer 417 is opposite to the second signal transmission trace 412 , e.g. under the second signal transmission trace 412 , and it is connected to the ground vias 414 .
  • the signal vias 413 is opposite to the ground vias 414 , and the length of the signal via 413 is preferably similar to that of the ground vias 414 .
  • FIG. 4B is a schematic view of impedance distribution of the stimulated result, wherein the transverse axis represents impedance (Z) and vertical axis represents time (T).
  • Line 1 represents the 50 ohm transmission line
  • Line 2 represents the impedance transmission when the first ground layer opposite to the first signal transmission trace is not connected to the second ground layer is opposite to the second signal transmission trace
  • Line 3 represents the impedance transmission when the connection between the first ground layer opposite to the first signal transmission trace and the second ground layer is opposite to the second signal transmission trace is at a distant place
  • Line 4 represents the impedance transmission when there is a ground via opposite to the signal via and the ground via connects the first ground layer with the second ground layer
  • Line 5 represents the impedance transmission when there are a pair of the ground vias opposite to and symmetrically around the signal via and the ground vias connect the first ground layer with the second ground layer
  • Line 6 represents the impedance transmission when there are a pair of the ground vias opposite to and symmetric
  • the structure without ground vias has the most dis-matching impedance and its maximum discrepancy is 40.1%.
  • the ground vias are connected to each other by conductor portions.
  • the structure comprises a first signal transmission trace 411 , a second signal transmission trace 412 , a signal via 413 , two ground vias 414 and two circular conductor portions 415 .
  • the signal and the ground vias 413 , 414 are substantially perpendicular to the first and the second signal transmission traces 411 , 412 .
  • the first and the second signal transmission traces 411 , 412 are separated with an insulation layer (not shown to conveniently illustrate), and the first and the second signal transmission traces 411 , 412 are connected by the signal via 413 .
  • the ground vias 414 are sited adjacent to the signal via 413 and symmetrically sited on the side of the signal via 413 . Moreover, the ground vias 414 are electrically connected by the circular conductor portions 415 .
  • the structure which is similar to a coaxial cable, has a plurality of ground vias 414 symmetrically sited around the signal via 413 , as shown in FIG. 5B .
  • first ground layer 416 is opposite to the first signal transmission trace 411 , e.g. above the first signal transmission trace 411 , and it is connected to the ground vias 414 .
  • second ground layer 417 is opposite to the second signal transmission trace 412 , e.g.
  • each of the first and second ground layers 416 , 417 may be connected to the circular conductor portion 415 , as shown in FIG. 5E .
  • the length of the signal via 13 is preferably similar to that of the ground vias 414 .
  • the first and second ground layers 416 , 417 are whole planes in FIG. 5C and FIG. 5D , they may be traces according to actual requirement for circuit design.
  • the conductor portions are semicircular, as shown in FIG. 6A .
  • the structure comprises a first signal transmission trace 411 , a second signal transmission trace 412 , a signal via 413 , two ground vias 414 , two circular conductor portions 415 and two semicircular conductor portions 416 .
  • the signal and the ground vias 413 , 414 are substantially perpendicular to the first and the second signal transmission traces 411 , 412 .
  • the first and the second signal transmission traces 411 , 412 are separated by an insulation layer (not shown to conveniently illustrate), and the first and the second signal transmission traces 411 , 412 are connected by the signal via 413 .
  • the ground vias 414 are sited adjacent to the signal via 413 and symmetrically sited on the side of the signal via 413 .
  • the ground vias 414 are electrically connected by the circular conductor portions 415 .
  • the tops and the bottoms of the ground vias 414 are electrically connected by the semicircular conductor portions 416 respectively.
  • first ground layer 416 is opposite to the first signal transmission trace 411 , e.g. above the first signal transmission trace 411 , and it is connected to the ground vias 414 .
  • second ground layer 417 is opposite to the second signal transmission trace 412 , e.g. under the second signal transmission trace 412 , and it is connected to the ground vias 414 , as shown in FIG. 6B .
  • first and second ground layers 416 , 417 are whole planes in FIG. 6B , they may be traces according to actual requirement for circuit design, and each of they may be connected to the circular conductor portion connecting the ground vias. Furthermore, the length of the signal via 13 is preferably similar to that of the ground vias 414 .

Abstract

A high frequency and wide band impedance matching via is provided. As an application to multi-layer printed circuit boards, for example, the multi-layer circuit board has several signal transmission traces, several ground layers, signal transmission vias and ground vias. The signal transmission traces and the ground layers are sited on different circuit layers, and each signal transmission trace is opposite to one of the ground layers. The signal transmission vias are connected between the signal transmission traces. The ground vias are connected between the ground layers. The ground vias are opposite to the signal transmission vias, and the ground vias corresponding to the signal transmission vias are sited to stabilize the characteristic impedance of the transmission traces.

Description

    BACKGROUND
  • This Non-provisional application claims priority under 35 U.S.C. § 119(a) on Patent Application No(s). 94101223 filed in Taiwan on Jan. 14, 2005, the entire contents of which are hereby incorporated by reference.
    • FIELD OF INVENTION
  • The invention relates to a conductive via to be applied to several substrates, such as multi-layer circuit boards, low temperature co-fired ceramics (LTCCs), integrated circuits (ICs), thick-film ceramics, thin-film ceramics or silicon-on-glass substrate processes, and more particular, to a high frequency and wide band impedance matching via.
    • DESCRIPTION OF THE RELATED ART
  • In products related to electronic systems, such as the multi-layer circuit boards, LTCCs, ICs, thick-film ceramics, thin-film ceramics and silicon-on-glass substrate processes, the printed circuit board (PCB), which supports electronic components generally, is a plan substrate which was made up of glass fibers and on which conductive circuitry was printed. With the prevailing trend in electronic products being ‘slim type’ and ‘mini size’, the development of the PCB is inclined to the one with a small-bore diameter, high density, multi-layer and thin circuit. An excellent scheme of increasing the density of the circuit is the multi-layer circuit board.
  • Once the number of layers of the PCB is increased, it results such serious interference that signal transmission lines must be through each layer. Further, since the prevailing trend in electronic products is high frequency, high transmission speed and a higher requirement for accuracy of the transmission impedance and efficiency of the signal transmission, the impedance dis-matching results in the signal bounce to cause many problems. In light cases, the system will work unstable, and in serious cases, the system will be damaged. In consequence, the circuitry design for the PCB is aimed at its width and distance of the signal transmission lines, further, at setting up the balanced impedance design. However, the circuitry design for the conventional PCB is chiefly and simply aimed at the signal transmission in a plane and not aimed at the signal transmission in a perpendicular. A difficult point of the circuitry design for the multi-layer circuit board is the signal transmission between the different layers in a perpendicular direction, so it will avoid vertically transmitting the signals over the vias between the layers in a perpendicular direction in many high-frequency circuitry designs.
  • In the U.S. patent application of publication No. 2004/0053014, a multilayer printed board is introduced. It has first and second signal transmission lines and first and second ground layers. A signal via is connected between the first and second transmission lines. Ground vias are connected between the first and second ground layers, and they are near to the signal via but not connected with it. The end of the first ground layer protrudes with respect to the second ground layer and extends nearer to the signal via than the second ground layer. Thus, it is possible to stabilize the characteristic impedance of the first transmission line. Further, the first and second ground layers are interlaced, so that it is procured to control the characteristic impedance effectively. However, this circuitry design is complicated, so that flexibility in circuit application is decreasing and precision control of its PCB is not easy.
    • SUMMARY
  • Accordingly, the present invention is directed to a high frequency and wide band impedance matching via, to substantially solve the problems in the prior art. As an application to multi-layer printed circuit boards, for example, signal transmission traces sited on the different circuit layers are connected by vertical signal transmission vias, and vertical ground vias corresponding to the vertical signal transmission vias are sited to stabilize the characteristic impedance of the signal transmission traces, so that electrical signals having high frequency and high speed are completely transmitted in three-dimensional space.
  • To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a high frequency and wide band impedance matching via, which is applied to each substrate, comprises a first signal transmission trace, a second signal transmission trace, a signal via, a first ground layer, a second ground layer and a ground via, wherein the signal and the ground vias are substantially perpendicular to the first and the second signal transmission traces and the first and the second ground layers. The first and the second signal transmission traces are sited on different surface of the circuit layer respectively. Moreover, the first signal transmission trace is connected to the second signal transmission trace by the signal via, which is sited within the substrate, and the ground via is sited adjacent to the signal via. Moreover, the first and the second ground layers are opposite to the first and the second signal transmission traces, respectively, and connected by the ground via. The impedance is controlled by adjusting the distance between the ground via and the signal via, thereby enabling the signal transmission of the signal via, to have matching impedance. More preferably, the length of the signal via is similar to that of the ground via.
  • The structure has two ground vias, which are symmetrically sited around the signal via to be similar to a coplanar waveguide, and further, the structure has at least two ground vias which are symmetrically sited around the signal via to be similar to a coaxial cable. Furthermore, each ground via is connected to another by a conductor portion, thereby promoting electric characteristics of the structure.
  • To match different circuitry design, the invention is applied in the signal transmission for differential pairs. The structure comprises a first signal transmission differential pair, a second signal transmission differential pair, a pair of signal vias, plane conductor traces and several ground vias, wherein the pair of ground vias are substantially perpendicular to the first and the second signal transmission differential pairs. The first and the second signal transmission differential pairs are respectively sited on two surfaces of the substrate, and the first and the second signal transmission differential pairs are connected by the pair of signal vias. The ground vias are connected to each other, and they are adjacent to the signal vias at a distance and are symmetrically sited in the insulation layer to match the signal vias. More preferably, the length of the signal via is similar to that of the ground via.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The invention will become more fully understood from the detailed description given hereinbelow illustration only and thus does not limit the present invention, wherein:
  • FIG. 1A and FIG. 1B are schematic views showing cross-sections of first and second embodiments according to the invention, respectively;
  • FIG. 2 is a schematic view showing a cross-section of a third embodiment according to the invention;
  • FIG. 3A, FIG. 3B, FG. 3C and FIG. 3D are perspectives showing three-dimensional structures of fourth, fifth, sixth and seventh embodiments according to the invention, respectively;
  • FIG. 4A is a schematic view showing a three-dimensional structure of a eighth embodiment according to the invention;
  • FIG. 4B is a chart showing the measurements of impedance distribution of the three-dimensional structure in FIG. 4A;
  • FIG. 5A and FIG. 5B are schematic views showing a three-dimensional structure of ninth and tenth embodiments according to the invention, respectively;
  • FIG. 5C and FIG. 5D are perspectives showing a three-dimensional structure of eleventh and twelfth embodiments according to the invention, respectively;
  • FIG. 6A is a schematic view showing a three-dimensional structure of an thirteenth embodiment according to the invention; and
  • FIG. 6B are perspectives showing a three-dimensional structure of a fourteenth embodiment according to the invention.
    • DETAILED DESCRIPTION
  • A conductive through-via according to the invention is applied to all kinds of substrates, such as multi-layer circuit boards, low temperature co-fired ceramics (LTCCs), integrated circuits (ICs), thick-film ceramics, thin-film ceramics or silicon-on-glass substrate processes, and has ground vias sited around signal vias, thereby enabling the signal transmission of the signal vias to have impedance match. As an application to multi-layer printed circuit boards, for example, a detailed structure is described below. The objective of the multi-layer printed circuit board with the impedance matching is achieved through a design of the structure. The structure of the multi-layer printed circuit board is a combination of insulation layers and circuit layers, which are stacked in repeating order of each other, in where circuit layers are electrically connected to another one by vertical signal vias, and vertical ground vias are sited appropriately, to enable the signal transmission of the signal vias to achieve impedance match.
  • In an embodiment, the multi-layer printed circuit board is a combination of several insulation layers and several circuit layers, which are stacked staggeredly. Refer to FIG. 1A, which is a cross-section of a first embodiment according to the invention. A six-layer printed circuit board, for example, has six circuit layers 110, which are separated by insulation layers 120. The circuit layer 110 may be a signal transmission trace or a ground layer. The signal and the ground vias 113, 114 are substantially perpendicular to first and second signal transmission traces 111, 112, and first and second ground layers 115, 116. The first signal transmission trace 111 is sited on the bottom circuit layer 110, as a first surface of the substrate, the second signal transmission trace 112 is sited on the top circuit layer 110, as a second surface of the substrate, and the several insulation layers 120 separate them. The first signal transmission trace 111 is connected to the second signal transmission trace 112 by the signal via 113, and the ground via 114 sited adjacent to the signal via 113 runs through internal circuit layers and is at a distance D from the signal via 113. Herein, the ground via 114 connects the first ground layer 115 with the second ground layer 116. In other words, the first signal transmission trace 111 is opposite to the first ground layers 115, the second signal transmission trace 112 is opposite to the second ground layers 116, and the signal via 113 is opposite to the ground via 114. Thus the impedance is controlled through adjusting the distance D, so that the signal transmission of the signal vial 13 has impedance match. More preferably, the length of the ground via 114 is similar to that of the signal via 113, and the ground via 114 is not connected to the first and second signal transmission traces 111, 112, as shown in FIG. 1B.
  • In another embodiment, several ground vias are symmetrically sited around the signal via to form a structure similar to a coplanar waveguide. FIG. 2 illustrates a cross-section of a structure according to a third embodiment. Referring to FIG. 2, a six-layer printed circuit board, for example, has six circuit layers 110, which are separated by insulation layers 120, where the circuit layer 110 may be a signal transmission trace or a ground layer. The structure according to the second embodiment of the invention comprises a first signal transmission trace 111, a second signal transmission trace 112, a signal via 113 and two ground vias 114, wherein the signal and the ground vias 113, 114 are substantially perpendicular to the first and the second signal transmission traces 111, 112, and first and second ground layers 115, 116. The first and the second signal transmission trace 111, 112 are respectively sited on the bottom and top circuit layer 110, and the several insulation layers 120 separate them. The first signal transmission trace 111 is connected to the second signal transmission trace 112 by the signal via 113, and the ground vias 114 sited adjacent and symmetrical to the signal via 113 run through internal circuit layers 110 and are at a distance D from the signal via 113. Herein, the ground vias 114 connect the first ground layer 115 with the second ground layer 116. In other words, the first signal transmission trace 111 is opposite to the first ground layer 115, the second signal transmission trace 112 is opposite to the second ground layer 116, and the signal via 113 is opposite to the ground vias 114. Thus the impedance is controlled thought adjusting the distance D, so that the signal transmission of the signal via 113 has impedance match. The structure further comprises at least one conductor portion (not showed in the drawing). The ground vias are connected by the conductor portion sited around the signal via 113 and are separated from the signal via 113. The conductor portion is the cambered conductor portion or a hollow conductor portion. The form of the hollow conductor portion is circular, such as a substantial circular form, a rectangle, etc. In this case, the number of ground vias is two. However, it can be more than two according to the invention. More preferably, the length of the signal via is also similar to that of the ground via (not shown to conveniently illustrate).
  • Further, the structure according to the invention is applied in the signal transmission for differential pairs. Refer to FIG. 3A, which is three-dimensional structures of a fourth embodiment according to the invention. In this embodiment, the structure comprises a first signal transmission differential pair 311, a second signal transmission differential pair 312, a pair of signal vias, several ground vias 314 and a conductor portion. In this case, the conductor portion is a hollow conductor portion 316. The pair of ground vias 314 is substantially perpendicular to the first and the second signal transmission differential pairs 311, 312. The first and the second signal transmission differential pairs 311, 312 are separated with an insulation layer 320, and the first and the second signal transmission differential pairs 311, 312 are connected by several signal vias. The signal vias comprise several vertical signal vias 313 and several plane conductor traces 315. The vertical signal vias 313 are intersected in the insulation layer 320, to form a vertically electrical connection, and the plane conductor traces 315 are connected to the vertical signal vias 313 to form an electrical connection in the plane. The ground vias 314 are adjacent to the signal vias and are symmetrically sited in an opposite position of the signal vias and in the insulation layer 320, to match the vertical signal vias 313. The ground vias 314 are electrically connected by the hollow conductor portion 316.
  • The hollow conductor portion 316 surrounds the vertical signal vias 313, as shown in FIG. 3A; and further, the conductor portion 317 is a cambered conductor portion sited in one side of the vertical signal vias 313, as shown in FIG. 3B. Herein, the signal via 313 is opposite to the ground via 314, and the length of the signal via 313 is preferably similar to that of the ground via 314.
  • In fact, the first signal transmission differential pair 311 may be opposite to the first ground layer 317, and the second signal transmission differential pair 312 may be opposite to the second ground layer 318, and the first and second ground layers 317, 318 are connected to the hollow conductor portion 316, as shown in FIG. 3C and FIG. 3D. That is, the first and second ground layers 317, 318 are connected to each other by the ground vias 314. In this case, although the first and second ground layers 317, 318 are traces in FIG. 3C and FIG. 3D, they may be whole planes according to actual requirement for circuit design.
  • To describe the invention more clearly, a six-layer printed circuit board is simulating the experiment of a high-frequency electromagnetic effect. Assume that the depth of each insulation layer is ten milli-inches (mil), the depth of the circuit layer is one milli-inch (mil), the diameter of the conductor portion is twenty milli-inches (mil), the total length of the transmission trace is two hundreds milli-inches (mil), and the material of the insulation layer is fiberglass FR4 (DK=4.2 and DF=0.03) The description of a schematic view, showing a three-dimensional structure and the stimulated result thereof, follows.
  • Refer to FIG. 4A, the structure comprises a first signal transmission trace 411, a second signal transmission trace 412, a signal via 413, and two ground vias 414. The signal and the ground vias 413, 414 are substantially perpendicular to the first and the second signal transmission traces 411, 412. The first and the second signal transmission traces 411, 412 are separated with an insulation layer (not shown to conveniently illustrate), and the first and the second signal transmission traces 411, 412 are connected by the signal via 413. The ground vias 414 are sited adjacent to the signal via 413 at a distance D and are symmetrically sited on the side of the signal via 413. Herein, first ground layer 416 is opposite to the first signal transmission trace 411, e.g. above the first signal transmission trace 411, and it is connected to the ground vias 414. Moreover, second ground layer 417 is opposite to the second signal transmission trace 412, e.g. under the second signal transmission trace 412, and it is connected to the ground vias 414. Furthermore, the signal vias 413 is opposite to the ground vias 414, and the length of the signal via 413 is preferably similar to that of the ground vias 414.
  • Refer to FIG. 4B, which is a schematic view of impedance distribution of the stimulated result, wherein the transverse axis represents impedance (Z) and vertical axis represents time (T). In FIG. 4B, Line 1 represents the 50 ohm transmission line, Line 2 represents the impedance transmission when the first ground layer opposite to the first signal transmission trace is not connected to the second ground layer is opposite to the second signal transmission trace, Line 3 represents the impedance transmission when the connection between the first ground layer opposite to the first signal transmission trace and the second ground layer is opposite to the second signal transmission trace is at a distant place, Line 4 represents the impedance transmission when there is a ground via opposite to the signal via and the ground via connects the first ground layer with the second ground layer, Line 5 represents the impedance transmission when there are a pair of the ground vias opposite to and symmetrically around the signal via and the ground vias connect the first ground layer with the second ground layer, and Line 6 represents the impedance transmission when there are a pair of the ground vias opposite to and symmetrically around the signal via, the ground vias connect the first ground layer with the second ground layer and there are a pair of circular conductor portions connecting the ground vias.
  • Contrasted with the same structure without ground vias and the structures of the first stimulated embodiment having a different D value, the structure without ground vias has the most dis-matching impedance and its maximum discrepancy is 40.1%. The maximum discrepancy of the matching impedance in the structures of the first stimulated embodiment, of which the distance between the ground via and the signal via is 10 mils (i.e. D=10 mils) is 9.5%. The maximum discrepancy of the matching impedance in the structures of the first stimulated embodiment, of which the distance between the ground via and the signal via is 15 mils (i.e. D=15 mils) is 5.3%. According to the result, the dis-matching impedance of the structure is effectively improved by applying the invention and the better impedance match is acquired by adjusting the distance between the ground via and the signal via.
  • Further, the ground vias are connected to each other by conductor portions. Refer to FIG. 5A, the structure comprises a first signal transmission trace 411, a second signal transmission trace 412, a signal via 413, two ground vias 414 and two circular conductor portions 415. The signal and the ground vias 413, 414 are substantially perpendicular to the first and the second signal transmission traces 411, 412. The first and the second signal transmission traces 411, 412 are separated with an insulation layer (not shown to conveniently illustrate), and the first and the second signal transmission traces 411, 412 are connected by the signal via 413. The ground vias 414 are sited adjacent to the signal via 413 and symmetrically sited on the side of the signal via 413. Moreover, the ground vias 414 are electrically connected by the circular conductor portions 415. On the other hand, the structure, which is similar to a coaxial cable, has a plurality of ground vias 414 symmetrically sited around the signal via 413, as shown in FIG. 5B. Herein, first ground layer 416 is opposite to the first signal transmission trace 411, e.g. above the first signal transmission trace 411, and it is connected to the ground vias 414. Moreover, second ground layer 417 is opposite to the second signal transmission trace 412, e.g. under the second signal transmission trace 412, and it is connected to the ground vias 414, as shown in FIG. 5C and in FIG. 5D. Further, each of the first and second ground layers 416, 417 may be connected to the circular conductor portion 415, as shown in FIG. 5E. Furthermore, the length of the signal via 13 is preferably similar to that of the ground vias 414. In this case, although the first and second ground layers 416, 417 are whole planes in FIG. 5C and FIG. 5D, they may be traces according to actual requirement for circuit design.
  • Furthermore, the conductor portions are semicircular, as shown in FIG. 6A. Refer to FIG. 6A, the structure comprises a first signal transmission trace 411, a second signal transmission trace 412, a signal via 413, two ground vias 414, two circular conductor portions 415 and two semicircular conductor portions 416. The signal and the ground vias 413, 414 are substantially perpendicular to the first and the second signal transmission traces 411, 412. The first and the second signal transmission traces 411, 412 are separated by an insulation layer (not shown to conveniently illustrate), and the first and the second signal transmission traces 411, 412 are connected by the signal via 413. The ground vias 414 are sited adjacent to the signal via 413 and symmetrically sited on the side of the signal via 413. The ground vias 414 are electrically connected by the circular conductor portions 415. Moreover, the tops and the bottoms of the ground vias 414 are electrically connected by the semicircular conductor portions 416 respectively. Further, first ground layer 416 is opposite to the first signal transmission trace 411, e.g. above the first signal transmission trace 411, and it is connected to the ground vias 414. Moreover, second ground layer 417 is opposite to the second signal transmission trace 412, e.g. under the second signal transmission trace 412, and it is connected to the ground vias 414, as shown in FIG. 6B. Further, although the first and second ground layers 416, 417 are whole planes in FIG. 6B, they may be traces according to actual requirement for circuit design, and each of they may be connected to the circular conductor portion connecting the ground vias. Furthermore, the length of the signal via 13 is preferably similar to that of the ground vias 414.
  • Certain variations would be apparent to those skilled in the art, which variations are considered within the spirit and scope of the claimed invention.

Claims (14)

1. A high frequency and wide band impedance matching via, comprising:
a first signal transmission trace;
a first ground layer opposite to the first signal transmission trace;
a second signal transmission trace;
a second ground layer opposite to the second signal transmission trace;
a signal via substantially perpendicular to the first and the second signal transmission traces for connecting the first signal transmission trace with the second signal transmission trace; and
at least one ground via opposite to the signal via and adjacent to the signal via for connecting the first ground layer with the second ground layer.
2. The impedance matching via of claim 1, wherein a length of the signal via is preferably similar to a length of the ground via.
3. The impedance matching via of claim 1, wherein a plurality of the ground vias are symmetrically sited around the signal via.
4. The impedance matching via of claim 1, further comprising:
at least one conductor portion for connecting the ground vias.
5. The impedance matching via of claim 4, wherein the conductor portion surrounds the signal via.
6. The impedance matching via of claim 4, wherein the conductor portion is connected to the ground vias and around a side of the signal via.
7. A high frequency and wide band impedance matching via applied to a substrate which has a first surface and a second surface opposite to each other, comprising:
a first signal transmission differential pair sited on the first surface of the substrate;
a second signal transmission differential pair sited on the second surface of the substrate;
a pair of signal vias sited in the substrate and substantially perpendicular to the first and the second signal transmission differential pairs for connecting the first signal transmission differential pair with the second signal transmission differential pair; and
a plurality of ground vias substantially perpendicular to the first and the second signal transmission differential pairs, symmetrically adjacent to the signal vias and connected to each other.
8. The impedance matching via of claim 7, wherein a length of the signal via is preferably similar to a length of the ground via.
9. The impedance matching via of claim 7, further comprise:
at least one plane conductor trace connected to the vertical signal vias to form an electrical connection.
10. The impedance matching via of claim 7, further comprising:
at least one conductor portion for connecting the ground vias.
11. The impedance matching via of claim 10, wherein the conductor portion is a hollow conductor portion.
12. The impedance matching via of claim 10, wherein the conductor portion surrounds the signal via.
13. The impedance matching via of claim 10, wherein the conductor portion is connected to the ground vias and around a side of the signal via.
14. The impedance matching via of claim 7, further comprise:
a first ground layer opposite to the first signal transmission differential pair; and
a second ground layer opposite to the second signal transmission differential pair;
wherein the ground vias connect the first ground layer with the second ground layer.
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