US20050117267A1 - IC package substrate with over voltage protection function - Google Patents

IC package substrate with over voltage protection function Download PDF

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Publication number
US20050117267A1
US20050117267A1 US11/025,330 US2533004A US2005117267A1 US 20050117267 A1 US20050117267 A1 US 20050117267A1 US 2533004 A US2533004 A US 2533004A US 2005117267 A1 US2005117267 A1 US 2005117267A1
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US
United States
Prior art keywords
over voltage
voltage protection
package substrate
material layers
protection function
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US11/025,330
Inventor
Chun-yuan Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Inpaq Technology Co Ltd
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Inpaq Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inpaq Technology Co Ltd filed Critical Inpaq Technology Co Ltd
Priority to US11/025,330 priority Critical patent/US20050117267A1/en
Publication of US20050117267A1 publication Critical patent/US20050117267A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/62—Protection against overvoltage, e.g. fuses, shunts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Definitions

  • the present invention relates to an IC package substrate with over voltage protection function, more particularly, to a single IC package substrate provided with a structure having multiple over voltage protection devices.
  • a conventional over voltage protection device is installed on a printed circuit board to protect internal IC devices according to demands by each IC device.
  • such design requires installing independent over voltage protection devices to prevent respective IC devices from damage by surge pulses.
  • FIG. 1 a is a top view of an IC device disposed on a conventional substrate.
  • FIG. 1 a there are a plurality of electrodes ( 11 ) and a grounding line ( 13 ) disposed on a substrate ( 12 ).
  • an IC device ( 10 ) is soldered to the plurality of electrodes and the grounding line.
  • FIG. 1 b is a sectional view of an IC device disposed on a conventional substrate.
  • FIG. 1 b we can understand the relationship among the constituent elements. Because such structure cannot provide a over voltage protection function, the IC device cannot accept the energy of surge pulses, resulting in an irrecoverable damage to the IC device.
  • over voltage protection devices In order to protect the IC device, several over voltage protection devices are subsequently proposed. However, those over voltage protection devices need to install individual protection devices on a printed circuit board according to the actual necessity after the IC device was manufactured and installed on the printed circuit board. Therefore, such design has the disadvantages of high design costs, wasting limited space, and providing incomplete protection to the IC device.
  • the present invention provides an IC package substrate with over voltage protection function to eliminate the inconvenience.
  • An object of the present invention is to provide an IC package substrate with over voltage protection function and thus, the IC device can be protected in the presence of surge pulses.
  • Another object of the present invention is to provide an IC package substrate with over voltage protection function and thus, the over voltage protection devices are installed on the substrate directly.
  • Still another object of the present invention is to enable the substrate to be equipped with a plurality of over voltage protection devices.
  • the present invention can reduce design costs, save limited space and lower dozen the unit cost to install the protection device to the IC device.
  • a still further object of the present invention is to provide an IC package substrate with over voltage protection function, wherein the substrate can be designed in different IC packaging technologies, such as surface mounting technology and pin soldering technology.
  • the present invention provides an IC package substrate with over voltage protection function.
  • the IC package substrate comprises a substrate ( 22 ); one or more lower electrodes disposed on the substrate; one or more protection material layers ( 24 ) disposed on the lower electrodes, and electrically connected with the lower electrodes; one or more upper electrodes ( 21 ) disposed on the one or more protection material layers and connected with said protection material layers, and one or more grounding lines ( 23 ).
  • FIG. 1 a shows a top view of an IC device disposed on a conventional substrate
  • FIG. 1 b shows a sectional view of an IC device disposed on a conventional substrate
  • FIGS. 2 a, 2 c, 2 e, 2 g and 2 i are a top view of an IC package substrate with over voltage protection function according to an embodiment of the present invention
  • FIGS. 2 b, 2 d, 2 f, 2 h and 2 j are a sectional view of an IC package substrate with over voltage protection function according to an embodiment of the present invention
  • FIG. 3 a is schematic diagram of an assembled IC package multi-layer substrate with over voltage protection function before the multiple layers are assembled to form the substrate according to another embodiment of the present invention
  • FIGS. 3 b, 3 c and 3 d are schematic diagrams of IC package multi-layer substrate with over voltage protection function according to still another embodiment of the present invention.
  • FIG. 3 e is a sectional view of an IC package multi-layer substrate with over voltage protection function according to another embodiment of the present invention.
  • a lower electrode ( 25 ) is disposed on a substrate ( 22 ), wherein a grounding line ( 23 ) and the lower electrode ( 25 ) are connected.
  • the grounding line and the lower electrode can be separated.
  • protection material layers ( 24 ) are disposed on the lower electrodes ( 25 ).
  • one or more upper electrodes ( 21 ) are disposed on the protection material layers ( 24 ), wherein the protection material layers are variable resistance material layers.
  • an IC chip ( 20 ) is installed on the substrate.
  • the IC chip is a flip chip, and is connected with the upper electrodes ( 21 ) and the grounding line ( 23 ) by soldering.
  • the chip ( 20 ) is connected with the upper electrodes ( 21 ) and the grounding line ( 23 ) by wire bonding.
  • FIGS. 2 i and 2 j are schematic diagrams of the IC chip installed on the substrate.
  • An overcoat ( 26 ) protects the IC chip ( 20 ) and helps the heat dissipation.
  • an IC package substrate with over voltage protection function has a four-layer structure, wherein a first layer is provided with a plurality of upper electrodes ( 311 ) and a grounding line ( 313 ) on a protection material layer ( 314 ).
  • the protection material layer ( 314 ) is a variable resistance material layer.
  • a third layer has the same structure as the first layer. Namely, a plurality of upper electrodes ( 331 ) and a grounding line ( 333 ) are disposed on a protection material layer ( 334 ).
  • a second layer is provided with a lower electrode ( 325 ) and a grounding line ( 323 ) on a protection material layer ( 324 ).
  • the protection material layer ( 324 ) is a variable resistance material layer.
  • a fourth layer has the same structure as the second layer. Namely, a lower electrode ( 345 ) and a grounding line ( 343 ) are disposed on a protection material layer ( 344 ).
  • FIG. 3 b is a schematic diagram showing an assembly of the first layer to the fourth layer.
  • FIG. 3 b physical relationships among the associated layers in the multi-layer structure are clearly shown.
  • a plurality of terminations ( 37 ) are electrically connected to the groundings lines ( 313 , 323 , 333 , 343 ) in each layer.
  • the upper electrodes ( 311 , 331 ) on the first and third layers are also electrically connected by the terminnations ( 37 ).
  • FIG. 3 d shows a flip chip ( 30 ) disposed on the top layer of the multi-layer structure, wherein the flip chip is electrically connected with the terminations. The electrical connection can be accomplished by soldering.
  • FIG. 3 e the connection relationships between the flip chip and the multi-layer protection material device are clearly shown.
  • the chip can be electrically connected with the terminations by wire bonding.
  • the energy of the surge pulse When a surge pulse occurs, the energy of the surge pulse will enter into the electrodes via terminations and transmit to the grounding line through the multi-layer structure protection material layers. Because the features of the variable resistance materials and the multi-layer structure, the energy of the surge pulse will be released evenly to the grounding lines of each layer and thus, the IC device will not be damaged and the object to protect the IC device is achieved.

Abstract

The present invention relates to an IC package substrate provided with over voltage protection function and thus, a plurality of over voltage protection devices are provided on a single substrate to protect an IC chip directly. According to the present invention, there is no need to install multiple protection devices on a printed circuit board. Therefore, the costs to design circuits are reduced, the limited space is effectively utilized, and unit costs to install respective protection devices are lowered down.

Description

    FIELD OF THE INVENTION
  • The present invention relates to an IC package substrate with over voltage protection function, more particularly, to a single IC package substrate provided with a structure having multiple over voltage protection devices.
    • BACKGROUND OF THE INVENTION
  • A conventional over voltage protection device is installed on a printed circuit board to protect internal IC devices according to demands by each IC device. However, such design requires installing independent over voltage protection devices to prevent respective IC devices from damage by surge pulses.
  • Please refer to FIG. 1 a, which is a top view of an IC device disposed on a conventional substrate. In FIG. 1 a, there are a plurality of electrodes (11) and a grounding line (13) disposed on a substrate (12). Then, an IC device (10) is soldered to the plurality of electrodes and the grounding line. FIG. 1 b is a sectional view of an IC device disposed on a conventional substrate. In FIG. 1 b, we can understand the relationship among the constituent elements. Because such structure cannot provide a over voltage protection function, the IC device cannot accept the energy of surge pulses, resulting in an irrecoverable damage to the IC device.
  • In order to protect the IC device, several over voltage protection devices are subsequently proposed. However, those over voltage protection devices need to install individual protection devices on a printed circuit board according to the actual necessity after the IC device was manufactured and installed on the printed circuit board. Therefore, such design has the disadvantages of high design costs, wasting limited space, and providing incomplete protection to the IC device.
  • Therefore, there is a need to provide an IC package substrate with over voltage protection function. In this way, a plurality of over voltage protection devices are provided simultaneously to solve the problems in the prior arts that unable to provide the over voltage protection or the inconvenience in the prior arts that need to install individual protection devices on a printed circuit board. The present invention provides an IC package substrate with over voltage protection function to eliminate the inconvenience.
    • SUMMARY OF INVENTION
  • An object of the present invention is to provide an IC package substrate with over voltage protection function and thus, the IC device can be protected in the presence of surge pulses.
  • Another object of the present invention is to provide an IC package substrate with over voltage protection function and thus, the over voltage protection devices are installed on the substrate directly.
  • Still another object of the present invention is to enable the substrate to be equipped with a plurality of over voltage protection devices. Thus, the present invention can reduce design costs, save limited space and lower dozen the unit cost to install the protection device to the IC device.
  • A still further object of the present invention is to provide an IC package substrate with over voltage protection function, wherein the substrate can be designed in different IC packaging technologies, such as surface mounting technology and pin soldering technology.
  • In order to accomplish the above objects, the present invention provides an IC package substrate with over voltage protection function. The IC package substrate comprises a substrate (22); one or more lower electrodes disposed on the substrate; one or more protection material layers (24) disposed on the lower electrodes, and electrically connected with the lower electrodes; one or more upper electrodes (21) disposed on the one or more protection material layers and connected with said protection material layers, and one or more grounding lines (23).
  • In order to understand the technical contents and features of the present invention with ease, the present invention is described by referring to the accompanying drawings.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The present invention will be illustrated according to the following drawings, wherein:
  • FIG. 1 a shows a top view of an IC device disposed on a conventional substrate;
  • FIG. 1 b shows a sectional view of an IC device disposed on a conventional substrate;
  • FIGS. 2 a, 2 c, 2 e, 2 g and 2 i are a top view of an IC package substrate with over voltage protection function according to an embodiment of the present invention;
  • FIGS. 2 b, 2 d, 2 f, 2 h and 2 j are a sectional view of an IC package substrate with over voltage protection function according to an embodiment of the present invention;
  • FIG. 3 a is schematic diagram of an assembled IC package multi-layer substrate with over voltage protection function before the multiple layers are assembled to form the substrate according to another embodiment of the present invention;
  • FIGS. 3 b, 3 c and 3 d are schematic diagrams of IC package multi-layer substrate with over voltage protection function according to still another embodiment of the present invention;
  • FIG. 3 e is a sectional view of an IC package multi-layer substrate with over voltage protection function according to another embodiment of the present invention.
    • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
  • The embodiments of the present invention are described with reference to the drawings. The same elements in the drawing have the same reference numerals.
  • In FIGS. 2 a and 2 b, a lower electrode (25) is disposed on a substrate (22), wherein a grounding line (23) and the lower electrode (25) are connected. In another embodiment, the grounding line and the lower electrode can be separated.
  • In FIGS. 2 c and 2 d, protection material layers (24) are disposed on the lower electrodes (25). In FIGS. 2 e and 2 f, one or more upper electrodes (21) are disposed on the protection material layers (24), wherein the protection material layers are variable resistance material layers.
  • In FIGS. 2 g and 2 h, an IC chip (20) is installed on the substrate. The IC chip is a flip chip, and is connected with the upper electrodes (21) and the grounding line (23) by soldering. In another embodiment of the present invention, the chip (20) is connected with the upper electrodes (21) and the grounding line (23) by wire bonding.
  • FIGS. 2 i and 2 j are schematic diagrams of the IC chip installed on the substrate. An overcoat (26) protects the IC chip (20) and helps the heat dissipation.
  • Another embodiment of the present invention provides an IC package substrate with over voltage protection function by a multiplayer structure. With reference FIG. 3 a, an IC package substrate with over voltage protection function has a four-layer structure, wherein a first layer is provided with a plurality of upper electrodes (311) and a grounding line (313) on a protection material layer (314). The protection material layer (314) is a variable resistance material layer. A third layer has the same structure as the first layer. Namely, a plurality of upper electrodes (331) and a grounding line (333) are disposed on a protection material layer (334). A second layer is provided with a lower electrode (325) and a grounding line (323) on a protection material layer (324). The protection material layer (324) is a variable resistance material layer. A fourth layer has the same structure as the second layer. Namely, a lower electrode (345) and a grounding line (343) are disposed on a protection material layer (344).
  • FIG. 3 b is a schematic diagram showing an assembly of the first layer to the fourth layer. In FIG. 3 b, physical relationships among the associated layers in the multi-layer structure are clearly shown. In FIG. 3 c, a plurality of terminations (37) are electrically connected to the groundings lines (313, 323, 333, 343) in each layer. By the way, the upper electrodes (311, 331) on the first and third layers are also electrically connected by the terminnations (37). FIG. 3 d shows a flip chip (30) disposed on the top layer of the multi-layer structure, wherein the flip chip is electrically connected with the terminations. The electrical connection can be accomplished by soldering. In FIG. 3 e, the connection relationships between the flip chip and the multi-layer protection material device are clearly shown. In another embodiment of the present invention, the chip can be electrically connected with the terminations by wire bonding.
  • When a surge pulse occurs, the energy of the surge pulse will enter into the electrodes via terminations and transmit to the grounding line through the multi-layer structure protection material layers. Because the features of the variable resistance materials and the multi-layer structure, the energy of the surge pulse will be released evenly to the grounding lines of each layer and thus, the IC device will not be damaged and the object to protect the IC device is achieved.
  • Although the invention has been disclosed in terms of preferred embodiments, the disclosure is not intended to limit the invention. The invention still can be modified or varied by persons skilled in the art without departing from the scope and spirit of the invention which is determined by the claims below.

Claims (11)

1. (canceled)
2. (canceled)
3. (canceled)
4. (canceled)
5. (canceled)
6. (canceled)
7. An IC package substrate with over voltage protection function, comprising:
a plurality of protection material layers (314, 324, 334, 344);
a plurality of lower electrodes (325, 345) disposed on the plurality of protection material layers and electrically connected with the plurality of protection material layers;
a plurality of upper electrodes (3311, 331), disposed on the plurality of protection material layers and electrically connected with the plurality of the protection material layers;
a plurality of grounding lines (313, 323, 333, 343), disposed on the protection material layers and electrically connected with the protection material layers; and
a termination (37) for connecting the each grounding line and upper electrode.
8. The IC package substrate with over voltage protection function of claim 7, wherein the protection material layers are variable resistance materials.
9. (canceled)
10. (canceled)
11. The IC package substrate with over voltage protection function of claim 7, further comprising an overcoat for protecting IC chip and helping heat dissipation.
US11/025,330 2001-08-24 2004-12-29 IC package substrate with over voltage protection function Abandoned US20050117267A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US11/025,330 US20050117267A1 (en) 2001-08-24 2004-12-29 IC package substrate with over voltage protection function

Applications Claiming Priority (4)

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TW090120882A TW529215B (en) 2001-08-24 2001-08-24 IC carrying substrate with an over voltage protection function
TW090120882 2001-08-24
US10/219,514 US6849954B2 (en) 2001-08-24 2002-08-15 IC package substrate with over voltage protection function
US11/025,330 US20050117267A1 (en) 2001-08-24 2004-12-29 IC package substrate with over voltage protection function

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* Cited by examiner, † Cited by third party
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TWI299559B (en) * 2002-06-19 2008-08-01 Inpaq Technology Co Ltd Ic substrate with over voltage protection function and method for manufacturing the same
DE102005003139A1 (en) * 2005-01-21 2006-07-27 Infineon Technologies Ag Electrostatic discharge protection semiconductor device, has one conduction channel close to another channel at distance which is measured so that voltage stability of insulator in extension is smaller than electrical potential level

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US5574630A (en) * 1995-05-11 1996-11-12 International Business Machines Corporation Laminated electronic package including a power/ground assembly
US5766982A (en) * 1996-03-07 1998-06-16 Micron Technology, Inc. Method and apparatus for underfill of bumped or raised die
US20010000658A1 (en) * 1998-03-05 2001-05-03 Barrett Andrew Brian Conductive polymer device and method of manufacturing same
US20020072147A1 (en) * 2000-10-24 2002-06-13 Murata Manufacturing Co., Ltd. High-frequency circuit board unit, high frequency module using the same unit, electronic apparatus using the same module, and manufacturing method for the high-frequency circuit board unit
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US6806553B2 (en) * 2001-03-30 2004-10-19 Kyocera Corporation Tunable thin film capacitor

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TW529215B (en) 2003-04-21
US20030038345A1 (en) 2003-02-27
US6849954B2 (en) 2005-02-01
JP2003158237A (en) 2003-05-30

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