EP0003849A3 - Digital bus communications system - Google Patents

Digital bus communications system Download PDF

Info

Publication number
EP0003849A3
EP0003849A3 EP79100581A EP79100581A EP0003849A3 EP 0003849 A3 EP0003849 A3 EP 0003849A3 EP 79100581 A EP79100581 A EP 79100581A EP 79100581 A EP79100581 A EP 79100581A EP 0003849 A3 EP0003849 A3 EP 0003849A3
Authority
EP
European Patent Office
Prior art keywords
terminals
path
time slots
communications system
digital signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP79100581A
Other languages
German (de)
French (fr)
Other versions
EP0003849A2 (en
Inventor
Gregory T. Hopkins
Ashraf M. Dahod
Victor A. Demarines
Norman B. Meisner
David G. Willard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitre Corp
Original Assignee
Mitre Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitre Corp filed Critical Mitre Corp
Publication of EP0003849A2 publication Critical patent/EP0003849A2/en
Publication of EP0003849A3 publication Critical patent/EP0003849A3/en
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/24—Time-division multiplex systems in which the allocation is indicated by an address the different channels being transmitted sequentially
    • H04J3/245—Time-division multiplex systems in which the allocation is indicated by an address the different channels being transmitted sequentially in which the allocation protocols between more than two stations share the same transmission medium
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/372—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a time-dependent priority, e.g. individually loaded time counters or time slot
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/407—Bus networks with decentralised control
    • H04L12/413—Bus networks with decentralised control with random access, e.g. carrier-sense multiple-access with collision detection (CSMA-CD)
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/407—Bus networks with decentralised control
    • H04L12/417—Bus networks with decentralised control with deterministic access, e.g. token passing

Abstract

A time division multiple access communications system comprises, in order to distribute control of bus access and communication link formation over a plurality of terminals in the system, in which subscriber terminals (14, 16, 18) contend for transmission time slots and which accommodates both high and low duty cycle subscribers by controlling slots allocations and contention slot transmissions, a common signal path (10, 12) and a set of terminals (14, 16, 18) coupled to said path (10, 12), said set including means (20, 22, 24) for establishing one or more communication links over said path (10, 12) between one or more of said terminals (14, 16, 18), and means (26) for transferring digital signals between linked terminals, in one or more time slots associated with said links, said time slots being in a repetitive framed sequence, each of said terminals (14, 16, 18) having an associated address and including means to identify and receive correspondingly addressed digital signals on said path (10, 12).
EP79100581A 1978-02-27 1979-02-27 Digital bus communications system Ceased EP0003849A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/881,704 US4161786A (en) 1978-02-27 1978-02-27 Digital bus communications system
US881704 1997-06-24

Publications (2)

Publication Number Publication Date
EP0003849A2 EP0003849A2 (en) 1979-09-05
EP0003849A3 true EP0003849A3 (en) 1980-05-28

Family

ID=25379020

Family Applications (1)

Application Number Title Priority Date Filing Date
EP79100581A Ceased EP0003849A3 (en) 1978-02-27 1979-02-27 Digital bus communications system

Country Status (4)

Country Link
US (1) US4161786A (en)
EP (1) EP0003849A3 (en)
JP (1) JPS5530291A (en)
CA (1) CA1133154A (en)

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Also Published As

Publication number Publication date
US4161786A (en) 1979-07-17
JPS5530291A (en) 1980-03-04
CA1133154A (en) 1982-10-05
EP0003849A2 (en) 1979-09-05

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Inventor name: WILLARD, DAVID G.

Inventor name: MEISNER, NORMAN B.

Inventor name: DAHOD, ASHRAF M.

Inventor name: DEMARINES, VICTOR A.

Inventor name: HOPKINS, GREGORY T.