DE69801909T2 - Lose gekoppelte, synchronisierte ausführung - Google Patents

Lose gekoppelte, synchronisierte ausführung

Info

Publication number
DE69801909T2
DE69801909T2 DE69801909T DE69801909T DE69801909T2 DE 69801909 T2 DE69801909 T2 DE 69801909T2 DE 69801909 T DE69801909 T DE 69801909T DE 69801909 T DE69801909 T DE 69801909T DE 69801909 T2 DE69801909 T2 DE 69801909T2
Authority
DE
Germany
Prior art keywords
instructions
instruction stream
processing
compute
compute element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69801909T
Other languages
English (en)
Other versions
DE69801909D1 (de
Inventor
D Bissett
A Leveille
Erik Muench
A Tremblay
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Marathon Technologies Corp
Original Assignee
Marathon Technologies Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marathon Technologies Corp filed Critical Marathon Technologies Corp
Publication of DE69801909D1 publication Critical patent/DE69801909D1/de
Application granted granted Critical
Publication of DE69801909T2 publication Critical patent/DE69801909T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1691—Temporal synchronisation or re-synchronisation of redundant processing components using a quantum
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1683—Temporal synchronisation or re-synchronisation of redundant processing components at instruction level
DE69801909T 1997-06-04 1998-06-04 Lose gekoppelte, synchronisierte ausführung Expired - Lifetime DE69801909T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/868,670 US5896523A (en) 1997-06-04 1997-06-04 Loosely-coupled, synchronized execution
PCT/US1998/011423 WO1998055922A1 (en) 1997-06-04 1998-06-04 Loosely-coupled, synchronized execution

Publications (2)

Publication Number Publication Date
DE69801909D1 DE69801909D1 (de) 2001-11-08
DE69801909T2 true DE69801909T2 (de) 2002-06-20

Family

ID=25352117

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69801909T Expired - Lifetime DE69801909T2 (de) 1997-06-04 1998-06-04 Lose gekoppelte, synchronisierte ausführung

Country Status (7)

Country Link
US (1) US5896523A (de)
EP (1) EP0986784B1 (de)
AT (1) ATE206539T1 (de)
AU (1) AU733747B2 (de)
CA (1) CA2292603A1 (de)
DE (1) DE69801909T2 (de)
WO (1) WO1998055922A1 (de)

Families Citing this family (76)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6768975B1 (en) * 1996-11-29 2004-07-27 Diebold, Incorporated Method for simulating operation of an automated banking machine system
US6279826B1 (en) 1996-11-29 2001-08-28 Diebold, Incorporated Fault monitoring and notification system for automated banking
TW355762B (en) * 1996-12-26 1999-04-11 Toshiba Co Ltd Checkpoint rollback I/O control device and I/O control method
US7272703B2 (en) * 1997-08-01 2007-09-18 Micron Technology, Inc. Program controlled embedded-DRAM-DSP architecture and methods
US6374364B1 (en) * 1998-01-20 2002-04-16 Honeywell International, Inc. Fault tolerant computing system using instruction counting
US6243736B1 (en) * 1998-12-17 2001-06-05 Agere Systems Guardian Corp. Context controller having status-based background functional task resource allocation capability and processor employing the same
US6725278B1 (en) * 1998-09-17 2004-04-20 Apple Computer, Inc. Smart synchronization of computer system time clock based on network connection modes
FR2795837B1 (fr) * 1999-06-30 2004-09-17 Bull Cp8 Procede pour comptabiliser le temps dans un dispositif de traitement d'information, et dispositif associe
AU2060101A (en) * 1999-12-10 2001-06-18 Diva Systems Corporation Method and apparatus of load sharing and improving fault tolerance in an interactive video distribution system
US7487531B1 (en) 1999-12-10 2009-02-03 Sedna Patent Services, Llc Method and apparatus of load sharing and improving fault tolerance in an interactive video distribution system
US6820213B1 (en) 2000-04-13 2004-11-16 Stratus Technologies Bermuda, Ltd. Fault-tolerant computer system with voter delay buffer
US6687851B1 (en) 2000-04-13 2004-02-03 Stratus Technologies Bermuda Ltd. Method and system for upgrading fault-tolerant systems
US6691225B1 (en) 2000-04-14 2004-02-10 Stratus Technologies Bermuda Ltd. Method and apparatus for deterministically booting a computer system having redundant components
US7574481B2 (en) * 2000-12-20 2009-08-11 Microsoft Corporation Method and system for enabling offline detection of software updates
US6839305B2 (en) * 2001-02-16 2005-01-04 Neil Perlman Habit cessation aide
US7017073B2 (en) * 2001-02-28 2006-03-21 International Business Machines Corporation Method and apparatus for fault-tolerance via dual thread crosschecking
EP1239369A1 (de) * 2001-03-07 2002-09-11 Siemens Aktiengesellschaft Fehlertolerante Rechneranordnung und Verfahren zum Betrieb einer derartigen Anordnung
US7065672B2 (en) * 2001-03-28 2006-06-20 Stratus Technologies Bermuda Ltd. Apparatus and methods for fault-tolerant computing using a switching fabric
US6928583B2 (en) * 2001-04-11 2005-08-09 Stratus Technologies Bermuda Ltd. Apparatus and method for two computing elements in a fault-tolerant server to execute instructions in lockstep
JP2004046599A (ja) * 2002-07-12 2004-02-12 Nec Corp フォルトトレラントコンピュータ装置、その再同期化方法及び再同期化プログラム
US7493480B2 (en) * 2002-07-18 2009-02-17 International Business Machines Corporation Method and apparatus for prefetching branch history information
EP1398699A1 (de) * 2002-09-12 2004-03-17 Siemens Aktiengesellschaft Verfahren zur Ereignissynchronisation, insbesondere für Prozessoren fehlertoleranter Systeme
TW588238B (en) * 2003-02-13 2004-05-21 Micro Star Int Co Ltd Program debugging method
US7467326B2 (en) * 2003-02-28 2008-12-16 Maxwell Technologies, Inc. Self-correcting computer
US7320130B2 (en) * 2003-03-25 2008-01-15 Hewlett-Packard Development Company, L.P. Mutual exclusion lock implementation for a computer network
US7149919B2 (en) * 2003-05-15 2006-12-12 Hewlett-Packard Development Company, L.P. Disaster recovery system with cascaded resynchronization
US20050039074A1 (en) * 2003-07-09 2005-02-17 Tremblay Glenn A. Fault resilient/fault tolerant computing
JP4288418B2 (ja) * 2003-12-02 2009-07-01 日本電気株式会社 計算機システムおよび状態取得方法ならびに状態取得プログラム
US20050240806A1 (en) * 2004-03-30 2005-10-27 Hewlett-Packard Development Company, L.P. Diagnostic memory dump method in a redundant processor
US7426656B2 (en) * 2004-03-30 2008-09-16 Hewlett-Packard Development Company, L.P. Method and system executing user programs on non-deterministic processors
US20060020852A1 (en) * 2004-03-30 2006-01-26 Bernick David L Method and system of servicing asynchronous interrupts in multiple processors executing a user program
US8799706B2 (en) 2004-03-30 2014-08-05 Hewlett-Packard Development Company, L.P. Method and system of exchanging information between processors
US20060064528A1 (en) * 2004-09-17 2006-03-23 Hewlett-Packard Development Company, L.P. Privileged resource access
US7818614B2 (en) * 2004-10-25 2010-10-19 Hewlett-Packard Development Company, L.P. System and method for reintroducing a processor module to an operating system after lockstep recovery
US7624302B2 (en) 2004-10-25 2009-11-24 Hewlett-Packard Development Company, L.P. System and method for switching the role of boot processor to a spare processor responsive to detection of loss of lockstep in a boot processor
US7502958B2 (en) * 2004-10-25 2009-03-10 Hewlett-Packard Development Company, L.P. System and method for providing firmware recoverable lockstep protection
US7627781B2 (en) * 2004-10-25 2009-12-01 Hewlett-Packard Development Company, L.P. System and method for establishing a spare processor for recovering from loss of lockstep in a boot processor
US7516359B2 (en) * 2004-10-25 2009-04-07 Hewlett-Packard Development Company, L.P. System and method for using information relating to a detected loss of lockstep for determining a responsive action
US7496787B2 (en) * 2004-12-27 2009-02-24 Stratus Technologies Bermuda Ltd. Systems and methods for checkpointing
US7328331B2 (en) * 2005-01-25 2008-02-05 Hewlett-Packard Development Company, L.P. Method and system of aligning execution point of duplicate copies of a user program by copying memory stores
US7467327B2 (en) 2005-01-25 2008-12-16 Hewlett-Packard Development Company, L.P. Method and system of aligning execution point of duplicate copies of a user program by exchanging information about instructions executed
US7933966B2 (en) * 2005-04-26 2011-04-26 Hewlett-Packard Development Company, L.P. Method and system of copying a memory area between processor elements for lock-step execution
US7590885B2 (en) * 2005-04-26 2009-09-15 Hewlett-Packard Development Company, L.P. Method and system of copying memory from a source processor to a target processor by duplicating memory writes
US7802075B2 (en) * 2005-07-05 2010-09-21 Viasat, Inc. Synchronized high-assurance circuits
US8190877B2 (en) * 2005-07-05 2012-05-29 Viasat, Inc. Trusted cryptographic processor
US8527741B2 (en) * 2005-07-05 2013-09-03 Viasat, Inc. System for selectively synchronizing high-assurance software tasks on multiple processors at a software routine level
US20070028144A1 (en) * 2005-07-29 2007-02-01 Stratus Technologies Bermuda Ltd. Systems and methods for checkpointing
US20070038891A1 (en) * 2005-08-12 2007-02-15 Stratus Technologies Bermuda Ltd. Hardware checkpointing system
US7496786B2 (en) * 2006-01-10 2009-02-24 Stratus Technologies Bermuda Ltd. Systems and methods for maintaining lock step operation
US20070180312A1 (en) * 2006-02-01 2007-08-02 Avaya Technology Llc Software duplication
US7412589B2 (en) * 2006-03-31 2008-08-12 International Business Machines Corporation Method to detect a stalled instruction stream and serialize micro-operation execution
US7912075B1 (en) * 2006-05-26 2011-03-22 Avaya Inc. Mechanisms and algorithms for arbitrating between and synchronizing state of duplicated media processing components
US20080059677A1 (en) * 2006-08-31 2008-03-06 Charles Jens Archer Fast interrupt disabling and processing in a parallel computing environment
US20080059676A1 (en) * 2006-08-31 2008-03-06 Charles Jens Archer Efficient deferred interrupt handling in a parallel computing environment
FR2912526B1 (fr) 2007-02-13 2009-04-17 Thales Sa Procede de maintien du synchronisme d'execution entre plusieurs processeurs asynchrones fonctionnant en parallele de maniere redondante.
US8171328B2 (en) * 2008-12-31 2012-05-01 Intel Corporation State history storage for synchronizing redundant processors
JP5278530B2 (ja) * 2009-03-09 2013-09-04 富士通株式会社 情報処理装置、情報処理装置の制御方法、及び情報処理装置の制御プログラム
US10057333B2 (en) 2009-12-10 2018-08-21 Royal Bank Of Canada Coordinated processing of data by networked computing resources
US9959572B2 (en) 2009-12-10 2018-05-01 Royal Bank Of Canada Coordinated processing of data by networked computing resources
CA2707196C (en) 2009-12-10 2016-11-01 Royal Bank Of Canada Synchronized processing of data by networked computing resources
US9940670B2 (en) 2009-12-10 2018-04-10 Royal Bank Of Canada Synchronized processing of data by networked computing resources
US9979589B2 (en) 2009-12-10 2018-05-22 Royal Bank Of Canada Coordinated processing of data by networked computing resources
US9010641B2 (en) * 2010-12-07 2015-04-21 Hand Held Products, Inc. Multiple platform support system and method
US9081653B2 (en) 2011-11-16 2015-07-14 Flextronics Ap, Llc Duplicated processing in vehicles
US9092214B2 (en) * 2012-03-29 2015-07-28 Intel Corporation SIMD processor with programmable counters externally configured to count executed instructions having operands of particular register size and element size combination
US8868810B2 (en) 2012-04-12 2014-10-21 International Business Machines Corporation Managing over-initiative thin interrupts
US9256426B2 (en) 2012-09-14 2016-02-09 General Electric Company Controlling total number of instructions executed to a desired number after iterations of monitoring for successively less number of instructions until a predetermined time period elapse
US9342358B2 (en) 2012-09-14 2016-05-17 General Electric Company System and method for synchronizing processor instruction execution
US9251002B2 (en) 2013-01-15 2016-02-02 Stratus Technologies Bermuda Ltd. System and method for writing checkpointing data
US9372780B2 (en) 2013-06-28 2016-06-21 International Business Machines Corporation Breakpoint continuation for stream computing
WO2015102875A1 (en) 2013-12-30 2015-07-09 Stratus Technologies Bermuda Ltd. Checkpointing systems and methods of using data forwarding
EP3090345B1 (de) 2013-12-30 2017-11-08 Stratus Technologies Bermuda Ltd. Verfahren zur prüfpunktverzögerung durch inspektion von netzwerkdatenpaketen
WO2015102873A2 (en) 2013-12-30 2015-07-09 Stratus Technologies Bermuda Ltd. Dynamic checkpointing systems and methods
WO2016077570A1 (en) 2014-11-13 2016-05-19 Virtual Software Systems, Inc. System for cross-host, multi-thread session alignment
CN104484299B (zh) * 2014-12-05 2017-12-22 中国航空工业集团公司第六三一研究所 一种松耦合的Lockstep处理器系统
US10521327B2 (en) 2016-09-29 2019-12-31 2236008 Ontario Inc. Non-coupled software lockstep

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4358823A (en) * 1977-03-25 1982-11-09 Trw, Inc. Double redundant processor
US4270168A (en) * 1978-08-31 1981-05-26 United Technologies Corporation Selective disablement in fail-operational, fail-safe multi-computer control system
US4356546A (en) * 1980-02-05 1982-10-26 The Bendix Corporation Fault-tolerant multi-computer system
US4449182A (en) * 1981-10-05 1984-05-15 Digital Equipment Corporation Interface between a pair of processors, such as host and peripheral-controlling processors in data processing systems
US4634110A (en) * 1983-07-28 1987-01-06 Harris Corporation Fault detection and redundancy management system
US4531185A (en) * 1983-08-31 1985-07-23 International Business Machines Corporation Centralized synchronization of clocks
US4823256A (en) * 1984-06-22 1989-04-18 American Telephone And Telegraph Company, At&T Bell Laboratories Reconfigurable dual processor system
US4920481A (en) * 1986-04-28 1990-04-24 Xerox Corporation Emulation with display update trapping
US4812968A (en) * 1986-11-12 1989-03-14 International Business Machines Corp. Method for controlling processor access to input/output devices
CH675781A5 (de) * 1987-04-16 1990-10-31 Bbc Brown Boveri & Cie
EP0306211A3 (de) * 1987-09-04 1990-09-26 Digital Equipment Corporation Synchronisiertes Doppelrechnersystem
CA1320276C (en) * 1987-09-04 1993-07-13 William F. Bruckert Dual rail processors with error checking on i/o reads
US4907228A (en) * 1987-09-04 1990-03-06 Digital Equipment Corporation Dual-rail processor with error checking at single rail interfaces
AU616213B2 (en) * 1987-11-09 1991-10-24 Tandem Computers Incorporated Method and apparatus for synchronizing a plurality of processors
CA2003338A1 (en) * 1987-11-09 1990-06-09 Richard W. Cutts, Jr. Synchronization of fault-tolerant computer system having multiple processors
US4937741A (en) * 1988-04-28 1990-06-26 The Charles Stark Draper Laboratory, Inc. Synchronization of fault-tolerant parallel processing systems
US4965717A (en) * 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
US5048022A (en) * 1989-08-01 1991-09-10 Digital Equipment Corporation Memory device with transfer of ECC signals on time division multiplexed bidirectional lines
US5327553A (en) * 1989-12-22 1994-07-05 Tandem Computers Incorporated Fault-tolerant computer system with /CONFIG filesystem
US5295258A (en) * 1989-12-22 1994-03-15 Tandem Computers Incorporated Fault-tolerant computer system with online recovery and reintegration of redundant components
US5095423A (en) * 1990-03-27 1992-03-10 Sun Microsystems, Inc. Locking mechanism for the prevention of race conditions
US5261092A (en) * 1990-09-26 1993-11-09 Honeywell Inc. Synchronizing slave processors through eavesdrop by one on periodic sync-verify messages directed to another followed by comparison of individual status
US5226152A (en) * 1990-12-07 1993-07-06 Motorola, Inc. Functional lockstep arrangement for redundant processors
US5339404A (en) * 1991-05-28 1994-08-16 International Business Machines Corporation Asynchronous TMR processing system
WO1993009494A1 (en) * 1991-10-28 1993-05-13 Digital Equipment Corporation Fault-tolerant computer processing using a shadow virtual processor
US5251312A (en) * 1991-12-30 1993-10-05 Sun Microsystems, Inc. Method and apparatus for the prevention of race conditions during dynamic chaining operations
EP0974912B1 (de) * 1993-12-01 2008-11-05 Marathon Technologies Corporation Fehlerbetriebssichere/Fehlertolerante Computerbetriebsmethode
US5790397A (en) * 1996-09-17 1998-08-04 Marathon Technologies Corporation Fault resilient/fault tolerant computing

Also Published As

Publication number Publication date
DE69801909D1 (de) 2001-11-08
EP0986784A1 (de) 2000-03-22
AU733747B2 (en) 2001-05-24
AU7812198A (en) 1998-12-21
EP0986784B1 (de) 2001-10-04
CA2292603A1 (en) 1998-12-10
WO1998055922A1 (en) 1998-12-10
US5896523A (en) 1999-04-20
ATE206539T1 (de) 2001-10-15

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