DE69034105D1 - Transistor mit schwebendem Gate und mehreren Steuergates - Google Patents

Transistor mit schwebendem Gate und mehreren Steuergates

Info

Publication number
DE69034105D1
DE69034105D1 DE69034105T DE69034105T DE69034105D1 DE 69034105 D1 DE69034105 D1 DE 69034105D1 DE 69034105 T DE69034105 T DE 69034105T DE 69034105 T DE69034105 T DE 69034105T DE 69034105 D1 DE69034105 D1 DE 69034105D1
Authority
DE
Germany
Prior art keywords
floating gate
gate transistor
control gates
multiple control
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69034105T
Other languages
English (en)
Other versions
DE69034105T2 (de
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Application granted granted Critical
Publication of DE69034105D1 publication Critical patent/DE69034105D1/de
Publication of DE69034105T2 publication Critical patent/DE69034105T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE69034105T 1989-06-02 1990-06-01 Transistor mit schwebendem Gate und mehreren Steuergates Expired - Fee Related DE69034105T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP14146389 1989-06-02
JP1141463A JP2662559B2 (ja) 1989-06-02 1989-06-02 半導体装置

Publications (2)

Publication Number Publication Date
DE69034105D1 true DE69034105D1 (de) 2003-11-06
DE69034105T2 DE69034105T2 (de) 2004-04-22

Family

ID=15292470

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69031870T Expired - Fee Related DE69031870T2 (de) 1989-06-02 1990-06-01 Halbleiteranordnung
DE69034105T Expired - Fee Related DE69034105T2 (de) 1989-06-02 1990-06-01 Transistor mit schwebendem Gate und mehreren Steuergates

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE69031870T Expired - Fee Related DE69031870T2 (de) 1989-06-02 1990-06-01 Halbleiteranordnung

Country Status (6)

Country Link
US (2) US5258657A (de)
EP (2) EP0739041B1 (de)
JP (1) JP2662559B2 (de)
AT (2) ATE251343T1 (de)
DE (2) DE69031870T2 (de)
WO (1) WO1990015444A1 (de)

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EP0570584A1 (de) * 1991-01-12 1993-11-24 SHIBATA, Tadashi Halbleiter-vorrichtung
TW208086B (de) * 1991-03-21 1993-06-21 Shibata Naoru
JP3269659B2 (ja) * 1992-05-27 2002-03-25 直 柴田 半導体装置
KR950007353B1 (ko) * 1992-05-30 1995-07-10 정호선 시냅스 모스 트랜지스터
JP3119392B2 (ja) * 1992-06-03 2000-12-18 直 柴田 半導体装置
JP3421365B2 (ja) * 1992-07-29 2003-06-30 直 柴田 半導体装置
JPH0677426A (ja) * 1992-08-26 1994-03-18 Sunao Shibata 半導体集積回路
JP3438241B2 (ja) * 1992-10-29 2003-08-18 直 柴田 半導体神経回路装置
JP3459017B2 (ja) * 1993-02-22 2003-10-20 直 柴田 半導体装置
JP3278080B2 (ja) * 1993-02-22 2002-04-30 直 柴田 半導体集積回路
JP2942088B2 (ja) * 1993-03-19 1999-08-30 ローム株式会社 半導体装置の動作方法、および半導体装置
US6072528A (en) * 1993-09-13 2000-06-06 Olympus Optical Co., Ltd. Solid state image sensor
JP3289748B2 (ja) * 1993-11-30 2002-06-10 直 柴田 半導体装置
JP3289749B2 (ja) * 1993-12-02 2002-06-10 直 柴田 半導体集積回路
JP3611340B2 (ja) * 1993-12-28 2005-01-19 直 柴田 半導体回路
US5719520A (en) * 1994-02-15 1998-02-17 Tadashi Shibata Multi-valued ROM circuit #7
JP3501416B2 (ja) * 1994-04-28 2004-03-02 忠弘 大見 半導体装置
JP2846822B2 (ja) * 1994-11-28 1999-01-13 モトローラ株式会社 ２層フローティングゲート構造のマルチビット対応セルを有する不揮発性メモリ及びそのプログラム方法
JP3406949B2 (ja) * 1995-01-31 2003-05-19 キヤノン株式会社 半導体集積回路装置
WO1996030855A1 (fr) * 1995-03-24 1996-10-03 Tadashi Shibata Circuit arithmetique a semiconducteurs
US5644253A (en) * 1995-03-30 1997-07-01 Fujitsu Limited Multiple-valued logic circuit
JP2937805B2 (ja) * 1995-05-19 1999-08-23 モトローラ株式会社 ２層フローティングゲート構造のマルチビット対応セルを有する不揮発性メモリ及びそのプログラム／消去／読出方法
EP0768610B1 (de) 1995-10-13 2000-08-09 STMicroelectronics S.r.l. Niederspannungsneuronalnetzwerk mit sehr niedrigem Leistungsverbrauch
EP0876681B1 (de) * 1996-01-25 2000-06-28 Siemens Aktiengesellschaft Halbleiterneuron mit variablen eingangsgewichten
DE19609078C1 (de) * 1996-03-08 1997-06-05 Siemens Ag Schwellwertlogik mit verbessertem Signal-Rausch-Abstand
JP3402909B2 (ja) * 1996-03-12 2003-05-06 アルプス電気株式会社 薄膜トランジスタ装置及び液晶表示装置
US5753954A (en) * 1996-07-19 1998-05-19 National Semiconductor Corporation Single-poly neuron MOS transistor
DE19630111C1 (de) * 1996-07-25 1997-08-14 Siemens Ag Vorrichtungen zur selbstjustierenden Arbeitspunkteinstellung in Verstärkerschaltungen mit Neuron-MOS-Transistoren
DE19630112C1 (de) * 1996-07-25 1997-08-14 Siemens Ag Verstärker mit Neuron-MOS-Transistoren
JPH1051007A (ja) * 1996-08-02 1998-02-20 Semiconductor Energy Lab Co Ltd 半導体装置
DE19700983C2 (de) * 1997-01-14 1998-12-03 Siemens Ag Digital/Analog-Umsetzer
JP3628136B2 (ja) * 1997-01-30 2005-03-09 富士通株式会社 容量結合を利用した論理回路、ａｄ変換回路及びｄａ変換回路
JPH10224224A (ja) * 1997-02-03 1998-08-21 Sunao Shibata 半導体演算装置
JPH10283793A (ja) * 1997-02-06 1998-10-23 Sunao Shibata 半導体回路
US5806054A (en) * 1997-02-14 1998-09-08 National Semiconductor Corporation Neuron MOSFET module structure for binary logic circuits
JPH10260817A (ja) 1997-03-15 1998-09-29 Sunao Shibata 半導体演算回路及びデ−タ処理装置
JPH10257352A (ja) 1997-03-15 1998-09-25 Sunao Shibata 半導体演算回路
US5864835A (en) * 1997-03-24 1999-01-26 Gorelik; Vladimir A. Apparatus for simulating a biological neuron
JP4066211B2 (ja) * 1997-06-06 2008-03-26 財団法人国際科学振興財団 電荷転送増幅回路、電圧比較器及びセンスアンプ
JPH1196276A (ja) 1997-09-22 1999-04-09 Sunao Shibata 半導体演算回路
TW409253B (en) * 1997-09-29 2000-10-21 Siemens Ag Associative memory and its operation method
JP3760614B2 (ja) * 1997-12-26 2006-03-29 ソニー株式会社 半導体装置及びその制御方法
JP3305267B2 (ja) 1998-08-07 2002-07-22 株式会社モノリス シナプス素子、しきい値回路およびニューロン装置
US6470328B1 (en) 1998-08-07 2002-10-22 Monolith Company, Ltd. Artificial neuron on the base of B-driven threshold element
US6430585B1 (en) * 1998-09-21 2002-08-06 Rn2R, L.L.C. Noise tolerant conductance-based logic gate and methods of operation and manufacturing thereof
JP3226513B2 (ja) 1999-08-09 2001-11-05 株式会社半導体理工学研究センター 演算回路、演算装置、及び半導体演算回路
JP3199707B2 (ja) 1999-08-09 2001-08-20 株式会社半導体理工学研究センター 半導体演算回路及び演算装置
TW446192U (en) * 2000-05-04 2001-07-11 United Microelectronics Corp Electrostatic discharge protection circuit
US6407425B1 (en) * 2000-09-21 2002-06-18 Texas Instruments Incorporated Programmable neuron MOSFET on SOI
US6501294B2 (en) 2001-04-26 2002-12-31 International Business Machines Corporation Neuron circuit
TW516037B (en) * 2001-07-13 2003-01-01 Macronix Int Co Ltd Buffer and method for compensating adjacent bit threshold voltage
JP3877597B2 (ja) * 2002-01-21 2007-02-07 シャープ株式会社 マルチ端子型ｍｏｓバラクタ
KR100598049B1 (ko) * 2004-10-28 2006-07-07 삼성전자주식회사 멀티 비트 비휘발성 메모리 셀을 포함하는 반도체 소자 및그 제조 방법
US7989094B2 (en) 2006-04-19 2011-08-02 Cardinal Cg Company Opposed functional coatings having comparable single surface reflectances
JP2007335648A (ja) * 2006-06-15 2007-12-27 Toppan Printing Co Ltd デジタル−アナログ変換器
KR100823450B1 (ko) * 2006-12-27 2008-04-17 동부일렉트로닉스 주식회사 반도체 소자와 이의 제조 방법
US7535758B2 (en) * 2007-02-06 2009-05-19 Maxim Integrated Products, Inc. One or multiple-times programmable device
US7719359B1 (en) 2007-07-31 2010-05-18 Maxim Integrated Products, Inc. Low noise variable gain amplifier
US10410117B2 (en) 2008-09-21 2019-09-10 Brainchip, Inc. Method and a system for creating dynamic neural function libraries
JP5858020B2 (ja) 2013-10-03 2016-02-10 株式会社デンソー 群情報記憶認識装置
CN106910773B (zh) * 2017-02-21 2019-08-20 南京大学 多栅极神经元晶体管及其制备方法和构成的神经网络

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US3010033A (en) * 1958-01-02 1961-11-21 Clevite Corp Field effect transistor
NL274830A (de) * 1961-04-12
JPS5676559A (en) * 1979-11-29 1981-06-24 Toshiba Corp Semiconductor integrated circuit
JPS59175770A (ja) * 1983-03-25 1984-10-04 Toshiba Corp 半導体論理素子
KR890004211B1 (ko) * 1983-07-08 1989-10-27 후지쓰가부시끼가이샤 콤프리멘타리 로직회로
JPS60117783A (ja) * 1983-11-30 1985-06-25 Toshiba Corp 不揮発性半導体メモリ装置
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US4999525A (en) * 1989-02-10 1991-03-12 Intel Corporation Exclusive-or cell for pattern matching employing floating gate devices
JP2823229B2 (ja) * 1989-04-05 1998-11-11 株式会社東芝 電子回路、差動増幅回路、及びアナログ乗算回路
JP2662559B2 (ja) * 1989-06-02 1997-10-15 直 柴田 半導体装置
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JPH04192716A (ja) * 1990-11-26 1992-07-10 Mitsubishi Electric Corp Ｍｏｓトランジスタ出力回路

Also Published As

Publication number Publication date
ATE161657T1 (de) 1998-01-15
EP0516847A1 (de) 1992-12-09
EP0516847B1 (de) 1997-12-29
ATE251343T1 (de) 2003-10-15
JPH036679A (ja) 1991-01-14
EP0739041B1 (de) 2003-10-01
JP2662559B2 (ja) 1997-10-15
DE69031870T2 (de) 1998-04-16
DE69034105T2 (de) 2004-04-22
US5608340A (en) 1997-03-04
WO1990015444A1 (en) 1990-12-13
EP0516847A4 (de) 1992-03-05
DE69031870D1 (de) 1998-02-05
EP0739041A2 (de) 1996-10-23
EP0739041A3 (de) 1996-11-06
US5258657A (en) 1993-11-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee