DE60125673D1 - Verfahren und Vorrichtung zur Ausführung einer kryptographischen Funktion - Google Patents

Verfahren und Vorrichtung zur Ausführung einer kryptographischen Funktion

Info

Publication number
DE60125673D1
DE60125673D1 DE60125673T DE60125673T DE60125673D1 DE 60125673 D1 DE60125673 D1 DE 60125673D1 DE 60125673 T DE60125673 T DE 60125673T DE 60125673 T DE60125673 T DE 60125673T DE 60125673 D1 DE60125673 D1 DE 60125673D1
Authority
DE
Germany
Prior art keywords
cryptographic function
cryptographic
function
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60125673T
Other languages
English (en)
Other versions
DE60125673T2 (de
Inventor
Terry K Tham
Errol Lai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Broadcom Corp
Original Assignee
Broadcom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Broadcom Corp filed Critical Broadcom Corp
Application granted granted Critical
Publication of DE60125673D1 publication Critical patent/DE60125673D1/de
Publication of DE60125673T2 publication Critical patent/DE60125673T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/722—Modular multiplication
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/04—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks
    • H04L63/0428—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks wherein the data content is protected, e.g. by encrypting or encapsulating the payload
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0625—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/12—Transmitting and receiving encryption devices synchronised or initially set up in a particular manner
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49936—Normalisation mentioned as feature only
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry
    • H04L2209/125—Parallelization or pipelining, e.g. for accelerating processing of cryptographic operations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/24—Key scheduling, i.e. generating round keys or sub-keys for block encryption
DE60125673T 2000-09-25 2001-09-24 Verfahren und Vorrichtung zur Ausführung einer kryptographischen Funktion Expired - Lifetime DE60125673T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US23519000P 2000-09-25 2000-09-25
US235190P 2000-09-25
US948203 2001-09-06
US09/948,203 US20020061107A1 (en) 2000-09-25 2001-09-06 Methods and apparatus for implementing a cryptography engine

Publications (2)

Publication Number Publication Date
DE60125673D1 true DE60125673D1 (de) 2007-02-15
DE60125673T2 DE60125673T2 (de) 2007-10-11

Family

ID=26928660

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60125673T Expired - Lifetime DE60125673T2 (de) 2000-09-25 2001-09-24 Verfahren und Vorrichtung zur Ausführung einer kryptographischen Funktion

Country Status (3)

Country Link
US (2) US20020061107A1 (de)
EP (1) EP1191738B1 (de)
DE (1) DE60125673T2 (de)

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US7580519B1 (en) 2003-12-08 2009-08-25 Advanced Micro Devices, Inc. Triple DES gigabit/s performance using single DES engine
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US7885405B1 (en) 2004-06-04 2011-02-08 GlobalFoundries, Inc. Multi-gigabit per second concurrent encryption in block cipher modes
US7526085B1 (en) 2004-07-13 2009-04-28 Advanced Micro Devices, Inc. Throughput and latency of inbound and outbound IPsec processing
US7783037B1 (en) 2004-09-20 2010-08-24 Globalfoundries Inc. Multi-gigabit per second computing of the rijndael inverse cipher
US7873166B2 (en) * 2005-09-13 2011-01-18 Avaya Inc. Method for undetectably impeding key strength of encryption usage for products exported outside the U.S
US20080037775A1 (en) * 2006-03-31 2008-02-14 Avaya Technology Llc Verifiable generation of weak symmetric keys for strong algorithms
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US8156321B2 (en) * 2008-02-05 2012-04-10 Viasat, Inc. Overlapping state areas for programmable crypto processing circuits
US8958550B2 (en) * 2011-09-13 2015-02-17 Combined Conditional Access Development & Support. LLC (CCAD) Encryption operation with real data rounds, dummy data rounds, and delay periods
US10103873B2 (en) 2016-04-01 2018-10-16 Intel Corporation Power side-channel attack resistant advanced encryption standard accelerator processor

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Also Published As

Publication number Publication date
EP1191738A2 (de) 2002-03-27
EP1191738A3 (de) 2003-10-29
DE60125673T2 (de) 2007-10-11
US20020061107A1 (en) 2002-05-23
US7555121B2 (en) 2009-06-30
US20050063538A1 (en) 2005-03-24
EP1191738B1 (de) 2007-01-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: BOSCH JEHLE PATENTANWALTSGESELLSCHAFT MBH, 80639 M