DE3771288D1 - Dynamischer speicher mit wahlfreiem zugriff. - Google Patents

Dynamischer speicher mit wahlfreiem zugriff.

Info

Publication number
DE3771288D1
DE3771288D1 DE8787307618T DE3771288T DE3771288D1 DE 3771288 D1 DE3771288 D1 DE 3771288D1 DE 8787307618 T DE8787307618 T DE 8787307618T DE 3771288 T DE3771288 T DE 3771288T DE 3771288 D1 DE3771288 D1 DE 3771288D1
Authority
DE
Germany
Prior art keywords
dynamic memory
optional access
optional
access
dynamic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787307618T
Other languages
English (en)
Inventor
Tomio Nakano
Hidenori Nomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu VLSI Ltd
Fujitsu Ltd
Original Assignee
Fujitsu VLSI Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu VLSI Ltd, Fujitsu Ltd filed Critical Fujitsu VLSI Ltd
Application granted granted Critical
Publication of DE3771288D1 publication Critical patent/DE3771288D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
DE8787307618T 1986-08-27 1987-08-27 Dynamischer speicher mit wahlfreiem zugriff. Expired - Fee Related DE3771288D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61198938A JPS6355797A (ja) 1986-08-27 1986-08-27 メモリ

Publications (1)

Publication Number Publication Date
DE3771288D1 true DE3771288D1 (de) 1991-08-14

Family

ID=16399465

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787307618T Expired - Fee Related DE3771288D1 (de) 1986-08-27 1987-08-27 Dynamischer speicher mit wahlfreiem zugriff.

Country Status (5)

Country Link
US (1) US4985868A (de)
EP (1) EP0260039B1 (de)
JP (1) JPS6355797A (de)
KR (1) KR910004732B1 (de)
DE (1) DE3771288D1 (de)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5313428A (en) * 1987-11-12 1994-05-17 Sharp Kabushiki Kaisha Field memory self-refreshing device utilizing a refresh clock signal selected from two separate clock signals
US5031150A (en) * 1988-08-26 1991-07-09 Kabushiki Kaisha Toshiba Control circuit for a semiconductor memory device and semiconductor memory system
US6212089B1 (en) * 1996-03-19 2001-04-03 Hitachi, Ltd. Semiconductor memory device and defect remedying method thereof
KR0141495B1 (ko) * 1988-11-01 1998-07-15 미다 가쓰시게 반도체 기억장치 및 그 결함구제방법
JP2547633B2 (ja) * 1989-05-09 1996-10-23 三菱電機株式会社 半導体記憶装置
KR940008295B1 (ko) * 1989-08-28 1994-09-10 가부시기가이샤 히다찌세이사꾸쇼 반도체메모리
USRE38379E1 (en) * 1989-08-28 2004-01-06 Hitachi, Ltd. Semiconductor memory with alternately multiplexed row and column addressing
JP3225531B2 (ja) * 1990-05-15 2001-11-05 セイコーエプソン株式会社 メモリカード
US5260904A (en) * 1990-05-31 1993-11-09 Oki Electric Industry Co., Ltd. Data bus clamp circuit for a semiconductor memory device
KR100214435B1 (ko) * 1990-07-25 1999-08-02 사와무라 시코 동기식 버스트 엑세스 메모리
US5144168A (en) * 1990-08-17 1992-09-01 Texas Instruments Incorporated Self latching input buffer
JP3100622B2 (ja) * 1990-11-20 2000-10-16 沖電気工業株式会社 同期型ダイナミックram
TW198135B (de) * 1990-11-20 1993-01-11 Oki Electric Ind Co Ltd
JP3225533B2 (ja) * 1991-04-11 2001-11-05 日本電気株式会社 ダイナミック型半導体メモリ装置
JP3143950B2 (ja) * 1991-04-30 2001-03-07 日本電気株式会社 ダイナミックメモリー
US5255241A (en) * 1991-05-20 1993-10-19 Tandem Computers Incorporated Apparatus for intelligent reduction of worst case power in memory systems
JPH04372790A (ja) * 1991-06-21 1992-12-25 Sharp Corp 半導体記憶装置
US5289430A (en) * 1991-11-26 1994-02-22 Texas Instruments Incorporated Self latching input buffer
JPH05234371A (ja) * 1992-02-21 1993-09-10 Fujitsu Ltd ダイナミックram
JP2982928B2 (ja) * 1992-04-01 1999-11-29 三菱電機株式会社 半導体記憶装置
JP3302726B2 (ja) * 1992-07-31 2002-07-15 株式会社東芝 半導体記憶装置
JP2739802B2 (ja) * 1992-12-01 1998-04-15 日本電気株式会社 ダイナミックram装置
JPH08180678A (ja) * 1994-12-27 1996-07-12 Hitachi Ltd ダイナミック型ram
JP3710845B2 (ja) 1995-06-21 2005-10-26 株式会社ルネサステクノロジ 半導体記憶装置
US5640361A (en) * 1996-05-01 1997-06-17 Hewlett-Packard Company Memory architecture
US6009038A (en) * 1996-05-31 1999-12-28 United Microelectronics Corporation Addressing unit
JPH09320269A (ja) * 1996-05-31 1997-12-12 Nippon Steel Corp アドレス装置
JPH1139862A (ja) * 1997-07-16 1999-02-12 Mitsubishi Electric Corp 半導体記憶装置
JP4613378B2 (ja) * 1999-11-01 2011-01-19 富士通セミコンダクター株式会社 半導体集積回路
TW454289B (en) * 2000-03-09 2001-09-11 Taiwan Semiconductor Mfg Programmable memory refresh architecture
JP2006073062A (ja) * 2004-08-31 2006-03-16 Toshiba Corp 半導体記憶装置
US20070038805A1 (en) * 2005-08-09 2007-02-15 Texas Instruments Incorporated High granularity redundancy for ferroelectric memories
US20090175115A1 (en) * 2008-01-09 2009-07-09 Christoph Bilger Memory device, method for accessing a memory device and method for its manufacturing
EP3454337B1 (de) * 2017-09-06 2019-09-11 Tu Kaiserslautern Verwendung von laufzeit-reverse-engineering zur optimierung der dram-auffrischung

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4207618A (en) * 1978-06-26 1980-06-10 Texas Instruments Incorporated On-chip refresh for dynamic memory
JPS55150192A (en) * 1979-05-08 1980-11-21 Nec Corp Memory unit
JPS5897195A (ja) * 1981-12-07 1983-06-09 Fujitsu Ltd ダイナミツク半導体記憶装置
JPS58155596A (ja) * 1982-03-10 1983-09-16 Hitachi Ltd ダイナミツク型mosram
JPS58159293A (ja) * 1982-03-17 1983-09-21 Fujitsu Ltd メモリ素子制御方式
US4472647A (en) * 1982-08-20 1984-09-18 Motorola, Inc. Circuit for interfacing with both TTL and CMOS voltage levels
JPS5987695A (ja) * 1982-11-11 1984-05-21 Toshiba Corp 半導体記憶装置
JP2518810B2 (ja) * 1983-11-29 1996-07-31 富士通株式会社 半導体集積回路装置
JPS60153223A (ja) * 1984-01-20 1985-08-12 Ricoh Co Ltd 入力バツフア回路
US4575826A (en) * 1984-02-27 1986-03-11 International Business Machines Corp. Refresh generator system for a dynamic memory
US4747082A (en) * 1984-11-28 1988-05-24 Hitachi Ltd. Semiconductor memory with automatic refresh means
US4672243A (en) * 1985-05-28 1987-06-09 American Telephone And Telegraph Company, At&T Bell Laboratories Zero standby current TTL to CMOS input buffer
JPH087995B2 (ja) * 1985-08-16 1996-01-29 富士通株式会社 ダイナミツク半導体記憶装置のリフレツシユ方法および装置

Also Published As

Publication number Publication date
EP0260039B1 (de) 1991-07-10
JPS6355797A (ja) 1988-03-10
US4985868A (en) 1991-01-15
KR880003333A (ko) 1988-05-16
EP0260039A1 (de) 1988-03-16
KR910004732B1 (en) 1991-07-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee