DE3771258D1 - Halbleiter-speicheranordnung unter verwendung eines programmierbaren elementes vom uebergangs-kurzschluss-typ. - Google Patents

Halbleiter-speicheranordnung unter verwendung eines programmierbaren elementes vom uebergangs-kurzschluss-typ.

Info

Publication number
DE3771258D1
DE3771258D1 DE8787103318T DE3771258T DE3771258D1 DE 3771258 D1 DE3771258 D1 DE 3771258D1 DE 8787103318 T DE8787103318 T DE 8787103318T DE 3771258 T DE3771258 T DE 3771258T DE 3771258 D1 DE3771258 D1 DE 3771258D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
short circuit
circuit type
memory arrangement
programmable element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787103318T
Other languages
English (en)
Inventor
Kouji Ueno
Takamitsu Naito
Yoshitaka Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu VLSI Ltd
Fujitsu Ltd
Original Assignee
Fujitsu VLSI Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu VLSI Ltd, Fujitsu Ltd filed Critical Fujitsu VLSI Ltd
Application granted granted Critical
Publication of DE3771258D1 publication Critical patent/DE3771258D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0804—Emitter regions of bipolar transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
DE8787103318T 1986-03-11 1987-03-09 Halbleiter-speicheranordnung unter verwendung eines programmierbaren elementes vom uebergangs-kurzschluss-typ. Expired - Fee Related DE3771258D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61053201A JPS62210667A (ja) 1986-03-11 1986-03-11 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3771258D1 true DE3771258D1 (de) 1991-08-14

Family

ID=12936258

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787103318T Expired - Fee Related DE3771258D1 (de) 1986-03-11 1987-03-09 Halbleiter-speicheranordnung unter verwendung eines programmierbaren elementes vom uebergangs-kurzschluss-typ.

Country Status (5)

Country Link
US (1) US4835590A (de)
EP (1) EP0241699B1 (de)
JP (1) JPS62210667A (de)
KR (1) KR900008668B1 (de)
DE (1) DE3771258D1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2569634B2 (ja) * 1987-11-26 1997-01-08 日本電気株式会社 接合破壊型半導体記憶装置
JP2504553B2 (ja) * 1989-01-09 1996-06-05 株式会社東芝 バイポ―ラトランジスタを有する半導体装置の製造方法
US5198692A (en) * 1989-01-09 1993-03-30 Kabushiki Kaisha Toshiba Semiconductor device including bipolar transistor with step impurity profile having low and high concentration emitter regions
GB9007492D0 (en) * 1990-04-03 1990-05-30 Pilkington Micro Electronics Semiconductor integrated circuit
FR2663156A1 (fr) * 1990-06-11 1991-12-13 Sgs Thomson Microelectronics Transistor bipolaire supportant des polarisations inverses et procede de fabrication.

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL162511C (nl) * 1969-01-11 1980-05-16 Philips Nv Geintegreerde halfgeleiderschakeling met een laterale transistor en werkwijze voor het vervaardigen van de geintegreerde halfgeleiderschakeling.
US4388703A (en) * 1979-05-10 1983-06-14 General Electric Company Memory device
JPS5953711B2 (ja) * 1980-03-25 1984-12-26 日本電気株式会社 メモリセル
DE3029553A1 (de) * 1980-08-04 1982-03-11 Siemens AG, 1000 Berlin und 8000 München Transistoranordnung mit hoher kollektor-emitter-durchbruchsspannung
JPS60142559A (ja) * 1983-12-29 1985-07-27 Fujitsu Ltd プログラマブル・リ−ド・オンリ・メモリ
US4701780A (en) * 1985-03-14 1987-10-20 Harris Corporation Integrated verticle NPN and vertical oxide fuse programmable memory cell
US4748490A (en) * 1985-08-01 1988-05-31 Texas Instruments Incorporated Deep polysilicon emitter antifuse memory cell

Also Published As

Publication number Publication date
JPS62210667A (ja) 1987-09-16
US4835590A (en) 1989-05-30
EP0241699B1 (de) 1991-07-10
EP0241699A2 (de) 1987-10-21
EP0241699A3 (en) 1988-09-21
JPH0551184B2 (de) 1993-07-30
KR900008668B1 (en) 1990-11-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee