DE3687367T2 - Ein/ausgabe-steuerungssystem. - Google Patents
Ein/ausgabe-steuerungssystem.Info
- Publication number
- DE3687367T2 DE3687367T2 DE8686106922T DE3687367T DE3687367T2 DE 3687367 T2 DE3687367 T2 DE 3687367T2 DE 8686106922 T DE8686106922 T DE 8686106922T DE 3687367 T DE3687367 T DE 3687367T DE 3687367 T2 DE3687367 T2 DE 3687367T2
- Authority
- DE
- Germany
- Prior art keywords
- input
- control system
- output control
- output
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60106835A JPS61265651A (ja) | 1985-05-21 | 1985-05-21 | 入出力制御装置 |
JP60108337A JPS61267157A (ja) | 1985-05-22 | 1985-05-22 | 入出力制御装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3687367D1 DE3687367D1 (de) | 1993-02-11 |
DE3687367T2 true DE3687367T2 (de) | 1993-05-19 |
Family
ID=26446942
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8686106922T Expired - Fee Related DE3687367T2 (de) | 1985-05-21 | 1986-05-21 | Ein/ausgabe-steuerungssystem. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4933840A (de) |
EP (1) | EP0202675B1 (de) |
KR (1) | KR900007680B1 (de) |
CA (1) | CA1257400A (de) |
DE (1) | DE3687367T2 (de) |
Families Citing this family (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU622626B2 (en) * | 1987-06-03 | 1992-04-16 | Sony Corporation | Method of processing data |
GB8824374D0 (en) * | 1988-10-18 | 1988-11-23 | Hewlett Packard Ltd | Interface arrangement for interfacing data storage device with data handling system |
FR2642214B1 (fr) * | 1988-12-30 | 1992-11-20 | Cit Alcatel | Systeme de detection d'ecrasement de donnees dans une memoire tampon, notamment pour un commutateur de donnees |
US5121346A (en) * | 1989-03-31 | 1992-06-09 | Sgs-Thomson Microelectronics, Inc. | Difference comparison between two asynchronous pointers and a programmable value |
US5206817A (en) * | 1989-03-31 | 1993-04-27 | Sgs-Thomson Microelectronics, Inc. | Pipelined circuitry for allowing the comparison of the relative difference between two asynchronous pointers and a programmable value |
EP0428771B1 (de) * | 1989-11-21 | 1995-02-01 | Deutsche ITT Industries GmbH | Zweiwege-Datenübergabe-Einrichtung |
JPH0457284A (ja) * | 1990-06-21 | 1992-02-25 | Mitsubishi Electric Corp | 半導体記憶装置 |
US5410652A (en) * | 1990-09-28 | 1995-04-25 | Texas Instruments, Incorporated | Data communication control by arbitrating for a data transfer control token with facilities for halting a data transfer by maintaining possession of the token |
US5826101A (en) * | 1990-09-28 | 1998-10-20 | Texas Instruments Incorporated | Data processing device having split-mode DMA channel |
US5655147A (en) * | 1991-02-28 | 1997-08-05 | Adaptec, Inc. | SCSI host adapter integrated circuit utilizing a sequencer circuit to control at least one non-data SCSI phase without use of any processor |
IL100127A0 (en) * | 1991-03-11 | 1992-08-18 | Future Domain Corp | Scsi controller |
JPH0561821A (ja) * | 1991-07-30 | 1993-03-12 | Canon Inc | データ転送方法 |
US5450546A (en) * | 1992-01-31 | 1995-09-12 | Adaptec, Inc. | Intelligent hardware for automatically controlling buffer memory storage space in a disk drive |
US5487171A (en) * | 1992-09-18 | 1996-01-23 | Storage Technology Corporation | System for reading and stopping reading data from magnetic tape into memory in response to mount command and write command respectively from the system processor |
US5659690A (en) * | 1992-10-15 | 1997-08-19 | Adaptec, Inc. | Programmably configurable host adapter integrated circuit including a RISC processor |
US5664223A (en) * | 1994-04-05 | 1997-09-02 | International Business Machines Corporation | System for independently transferring data using two independently controlled DMA engines coupled between a FIFO buffer and two separate buses respectively |
US5729719A (en) * | 1994-09-07 | 1998-03-17 | Adaptec, Inc. | Synchronization circuit for clocked signals of similar frequencies |
US6351780B1 (en) * | 1994-11-21 | 2002-02-26 | Cirrus Logic, Inc. | Network controller using held data frame monitor and decision logic for automatically engaging DMA data transfer when buffer overflow is anticipated |
US5878217A (en) * | 1994-11-21 | 1999-03-02 | Cirrus Logic, Inc. | Network controller for switching into DMA mode based on anticipated memory overflow and out of DMA mode when the host processor is available |
GB2308902B (en) * | 1996-01-04 | 2000-03-29 | Motorola Inc | Peripheral module and microprocessor system |
US6411094B1 (en) * | 1997-12-30 | 2002-06-25 | The Charles Machine Works, Inc. | System and method for determining orientation to an underground object |
US6321280B1 (en) * | 1998-04-20 | 2001-11-20 | Fujitsu Limited | System LSI having communication function |
US6697904B1 (en) * | 2000-03-28 | 2004-02-24 | Intel Corporation | Preventing starvation of agents on a bus bridge |
US6584529B1 (en) * | 2000-09-08 | 2003-06-24 | Koninklijke Philips Electronics N.V. | Intermediate buffer control for improving throughput of split transaction interconnect |
US7065596B2 (en) * | 2002-09-19 | 2006-06-20 | Intel Corporation | Method and apparatus to resolve instruction starvation |
US7176848B1 (en) * | 2003-04-14 | 2007-02-13 | Ati Technologies, Inc. | Method of synchronizing images on multiple display devices with different refresh rates |
DE10355583A1 (de) * | 2003-11-28 | 2005-07-07 | Advanced Micro Devices, Inc., Sunnyvale | Gemeinsame Nutzung eines Speichers in einer Zentralsteuerung |
US8478834B2 (en) * | 2007-07-12 | 2013-07-02 | International Business Machines Corporation | Low latency, high bandwidth data communications between compute nodes in a parallel computer |
US8959172B2 (en) * | 2007-07-27 | 2015-02-17 | International Business Machines Corporation | Self-pacing direct memory access data transfer operations for compute nodes in a parallel computer |
US8949453B2 (en) | 2010-11-30 | 2015-02-03 | International Business Machines Corporation | Data communications in a parallel active messaging interface of a parallel computer |
US8949328B2 (en) | 2011-07-13 | 2015-02-03 | International Business Machines Corporation | Performing collective operations in a distributed processing system |
US8930962B2 (en) | 2012-02-22 | 2015-01-06 | International Business Machines Corporation | Processing unexpected messages at a compute node of a parallel computer |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4060849A (en) * | 1975-10-28 | 1977-11-29 | Compagnie Internationale Pour L'informatique Cii-Honeywell Bull | Data input and output controller |
JPS5455132A (en) * | 1977-10-12 | 1979-05-02 | Toshiba Corp | Input-output control system |
US4246637A (en) * | 1978-06-26 | 1981-01-20 | International Business Machines Corporation | Data processor input/output controller |
US4321665A (en) * | 1979-01-31 | 1982-03-23 | Honeywell Information Systems Inc. | Data processing system having centralized data alignment for I/O controllers |
US4428044A (en) * | 1979-09-20 | 1984-01-24 | Bell Telephone Laboratories, Incorporated | Peripheral unit controller |
JPS57113162A (en) * | 1980-12-29 | 1982-07-14 | Fujitsu Ltd | High-speed external storage device |
US4549263A (en) * | 1983-02-14 | 1985-10-22 | Texas Instruments Incorporated | Device interface controller for input/output controller |
US4571671A (en) * | 1983-05-13 | 1986-02-18 | International Business Machines Corporation | Data processor having multiple-buffer adapter between a system channel and an input/output bus |
-
1986
- 1986-05-15 CA CA000509299A patent/CA1257400A/en not_active Expired
- 1986-05-21 EP EP86106922A patent/EP0202675B1/de not_active Expired - Lifetime
- 1986-05-21 KR KR8603972A patent/KR900007680B1/ko not_active IP Right Cessation
- 1986-05-21 DE DE8686106922T patent/DE3687367T2/de not_active Expired - Fee Related
-
1988
- 1988-12-07 US US07/281,947 patent/US4933840A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0202675A3 (en) | 1989-02-08 |
KR900007680B1 (en) | 1990-10-18 |
US4933840A (en) | 1990-06-12 |
KR860009351A (ko) | 1986-12-22 |
DE3687367D1 (de) | 1993-02-11 |
CA1257400A (en) | 1989-07-11 |
EP0202675B1 (de) | 1992-12-30 |
EP0202675A2 (de) | 1986-11-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |