DE3684254D1 - Programmierbare eingangs/ausgangszelle. - Google Patents

Programmierbare eingangs/ausgangszelle.

Info

Publication number
DE3684254D1
DE3684254D1 DE8686308372T DE3684254T DE3684254D1 DE 3684254 D1 DE3684254 D1 DE 3684254D1 DE 8686308372 T DE8686308372 T DE 8686308372T DE 3684254 T DE3684254 T DE 3684254T DE 3684254 D1 DE3684254 D1 DE 3684254D1
Authority
DE
Germany
Prior art keywords
input
output
latch
register
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8686308372T
Other languages
English (en)
Inventor
Om P Agrawal
Kapil Shankar
Fares Mubarak
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vantis Corp
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE3684254D1 publication Critical patent/DE3684254D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
    • H03K19/17716Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays with synchronous operation, i.e. using clock signals, e.g. of I/O or coupling register
DE8686308372T 1985-11-05 1986-10-28 Programmierbare eingangs/ausgangszelle. Expired - Lifetime DE3684254D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/795,159 US4771285A (en) 1985-11-05 1985-11-05 Programmable logic cell with flexible clocking and flexible feedback

Publications (1)

Publication Number Publication Date
DE3684254D1 true DE3684254D1 (de) 1992-04-16

Family

ID=25164856

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686308372T Expired - Lifetime DE3684254D1 (de) 1985-11-05 1986-10-28 Programmierbare eingangs/ausgangszelle.

Country Status (5)

Country Link
US (1) US4771285A (de)
EP (1) EP0225715B1 (de)
JP (2) JPS62114327A (de)
AT (1) ATE73590T1 (de)
DE (1) DE3684254D1 (de)

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US4896296A (en) * 1985-03-04 1990-01-23 Lattice Semiconductor Corporation Programmable logic device configurable input/output cell
US4963768A (en) * 1985-03-29 1990-10-16 Advanced Micro Devices, Inc. Flexible, programmable cell array interconnected by a programmable switch matrix
US5225719A (en) * 1985-03-29 1993-07-06 Advanced Micro Devices, Inc. Family of multiple segmented programmable logic blocks interconnected by a high speed centralized switch matrix
US4763020B1 (en) * 1985-09-06 1997-07-08 Ricoh Kk Programmable logic device having plural programmable function cells
EP0426655A3 (de) * 1985-12-06 1991-07-03 Advanced Micro Devices, Inc. Programmierbare logische Schaltung mit konfigurierbarer Freigabe des Ausgangs
US5168177A (en) * 1985-12-06 1992-12-01 Advanced Micro Devices, Inc. Programmable logic device with observability and preloadability for buried state registers
US5367208A (en) 1986-09-19 1994-11-22 Actel Corporation Reconfigurable programmable interconnect architecture
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US4783606A (en) * 1987-04-14 1988-11-08 Erich Goetting Programming circuit for programmable logic array I/O cell
US5046035A (en) * 1987-08-26 1991-09-03 Ict International Cmos Tech., Inc. High-performance user programmable logic device (PLD)
US4918641A (en) * 1987-08-26 1990-04-17 Ict International Cmos Technology, Inc. High-performance programmable logic device
JPS6478023A (en) * 1987-09-18 1989-03-23 Fujitsu Ltd Programmable logic device
JP2567463B2 (ja) * 1987-10-02 1996-12-25 川崎製鉄株式会社 プロブラマブル入出力回路
EP0310377B1 (de) * 1987-10-02 1992-06-10 Kawasaki Steel Corporation Programmierbare Eingangs-/Ausgangsschaltung
US4864161A (en) * 1988-05-05 1989-09-05 Altera Corporation Multifunction flip-flop-type circuit
US4903223A (en) * 1988-05-05 1990-02-20 Altera Corporation Programmable logic device with programmable word line connections
JP2548301B2 (ja) * 1988-05-25 1996-10-30 富士通株式会社 プログラマブル論理回路装置
US4879481A (en) * 1988-09-02 1989-11-07 Cypress Semiconductor Corporation Dual I/O macrocell for high speed synchronous state machine
US5023484A (en) * 1988-09-02 1991-06-11 Cypress Semiconductor Corporation Architecture of high speed synchronous state machine
US4894563A (en) * 1988-10-11 1990-01-16 Atmel Corporation Output macrocell for programmable logic device
US4914322A (en) * 1988-12-16 1990-04-03 Advanced Micro Devices, Inc. Polarity option control logic for use with a register of a programmable logic array macrocell
US4910418A (en) * 1988-12-29 1990-03-20 Gazelle Microcircuits, Inc. Semiconductor fuse programmable array structure
US4967107A (en) * 1989-05-12 1990-10-30 Plus Logic, Inc. Programmable logic expander
US5457409A (en) * 1992-08-03 1995-10-10 Advanced Micro Devices, Inc. Architecture of a multiple array high density programmable logic device with a plurality of programmable switch matrices
US5489857A (en) * 1992-08-03 1996-02-06 Advanced Micro Devices, Inc. Flexible synchronous/asynchronous cell structure for a high density programmable logic device
US5051622A (en) * 1989-11-08 1991-09-24 Chips And Technologies, Inc. Power-on strap inputs
JP2880547B2 (ja) * 1990-01-19 1999-04-12 三菱電機株式会社 半導体記憶装置
US5198705A (en) * 1990-05-11 1993-03-30 Actel Corporation Logic module with configurable combinational and sequential blocks
DE4038533A1 (de) * 1990-12-03 1992-06-04 Siemens Ag Automatisierungssystem mit einem programmiergeraet und einem automatisierungsgeraet
US5416367A (en) * 1991-03-06 1995-05-16 Quicklogic Corporation Programmable application specific integrated circuit and logic cell therefor
US5122685A (en) * 1991-03-06 1992-06-16 Quicklogic Corporation Programmable application specific integrated circuit and logic cell therefor
US5861760A (en) 1991-04-25 1999-01-19 Altera Corporation Programmable logic device macrocell with improved capability
US5231312A (en) * 1992-03-12 1993-07-27 Atmel Corporation Integrated logic circuit with functionally flexible input/output macrocells
US5235221A (en) * 1992-04-08 1993-08-10 Micron Technology, Inc. Field programmable logic array with speed optimized architecture
US5384500A (en) * 1992-05-15 1995-01-24 Micron Semiconductor, Inc. Programmable logic device macrocell with an exclusive feedback and an exclusive external input line for a combinatorial mode and accommodating two separate programmable or planes
US5287017A (en) * 1992-05-15 1994-02-15 Micron Technology, Inc. Programmable logic device macrocell with two OR array inputs
US5300830A (en) * 1992-05-15 1994-04-05 Micron Semiconductor, Inc. Programmable logic device macrocell with an exclusive feedback and exclusive external input lines for registered and combinatorial modes using a dedicated product term for control
US5220215A (en) * 1992-05-15 1993-06-15 Micron Technology, Inc. Field programmable logic array with two or planes
US5331227A (en) * 1992-05-15 1994-07-19 Micron Semiconductor, Inc. Programmable logic device macrocell with an exclusive feedback line and an exclusive external input line
US5298803A (en) * 1992-07-15 1994-03-29 Micron Semiconductor, Inc. Programmable logic device having low power microcells with selectable registered and combinatorial output signals
DE69304471T2 (de) * 1992-08-03 1997-03-20 Advanced Micro Devices Inc Programmierbare logische Vorrichtung
US5357153A (en) * 1993-01-28 1994-10-18 Xilinx, Inc. Macrocell with product-term cascade and improved flip flop utilization
US5473266A (en) * 1993-04-19 1995-12-05 Altera Corporation Programmable logic device having fast programmable logic array blocks and a central global interconnect array
US5440247A (en) * 1993-05-26 1995-08-08 Kaplinsky; Cecil H. Fast CMOS logic with programmable logic control
US5506517A (en) * 1993-09-01 1996-04-09 Lattice Semiconductor Corporation Output enable structure and method for a programmable logic device
US5448185A (en) * 1993-10-27 1995-09-05 Actel Corporation Programmable dedicated FPGA functional blocks for multiple wide-input functions
US5414376A (en) * 1993-12-28 1995-05-09 Micron Semiconductor, Inc. Programmable logic device macrocell having exclusive lines for feedback and external input, and a node which is selectively shared for registered output and external input
US5440246A (en) * 1994-03-22 1995-08-08 Mosel Vitelic, Incorporated Programmable circuit with fusible latch
US5689195A (en) * 1995-05-17 1997-11-18 Altera Corporation Programmable logic array integrated circuit devices
US5592681A (en) * 1994-06-14 1997-01-07 Texas Instruments Incorporated Data processing with improved register bit structure
US6052773A (en) * 1995-02-10 2000-04-18 Massachusetts Institute Of Technology DPGA-coupled microprocessors
US5742180A (en) * 1995-02-10 1998-04-21 Massachusetts Institute Of Technology Dynamically programmable gate array with multiple contexts
GB2300946B (en) * 1995-05-17 1999-10-20 Altera Corp Tri-statable input/output circuitry for programmable logic
US5521529A (en) * 1995-06-02 1996-05-28 Advanced Micro Devices, Inc. Very high-density complex programmable logic devices with a multi-tiered hierarchical switch matrix and optimized flexible logic allocation
US5818254A (en) * 1995-06-02 1998-10-06 Advanced Micro Devices, Inc. Multi-tiered hierarchical high speed switch matrix structure for very high-density complex programmable logic devices
US6028446A (en) * 1995-06-06 2000-02-22 Advanced Micro Devices, Inc. Flexible synchronous and asynchronous circuits for a very high density programmable logic device
US5651013A (en) * 1995-11-14 1997-07-22 International Business Machines Corporation Programmable circuits for test and operation of programmable gate arrays
US5848285A (en) * 1995-12-26 1998-12-08 Cypress Semiconductor Corporation Macrocell having a dual purpose input register for use in a logic device
US5900742A (en) * 1996-06-21 1999-05-04 Quicklogic Corporation Interface cell for a programmable integrated circuit employing antifuses
US5943488A (en) * 1996-06-26 1999-08-24 Cypress Semiconductor Corp. Method and apparatus to generate mask programmable device
US5926035A (en) * 1996-06-26 1999-07-20 Cypress Semiconductor Corp. Method and apparatus to generate mask programmable device
US5959466A (en) 1997-01-31 1999-09-28 Actel Corporation Field programmable gate array with mask programmed input and output buffers
US5936426A (en) * 1997-02-03 1999-08-10 Actel Corporation Logic function module for field programmable array
US6150837A (en) * 1997-02-28 2000-11-21 Actel Corporation Enhanced field programmable gate array
US5889414A (en) * 1997-04-28 1999-03-30 Mosel Vitelic Corporation Programmable circuits
US5952852A (en) * 1997-07-02 1999-09-14 Actel Corporation Fast wide decode in an FPGA using probe circuit
US6020760A (en) * 1997-07-16 2000-02-01 Altera Corporation I/O buffer circuit with pin multiplexing
US6034857A (en) 1997-07-16 2000-03-07 Altera Corporation Input/output buffer with overcurrent protection circuit
US6011744A (en) * 1997-07-16 2000-01-04 Altera Corporation Programmable logic device with multi-port memory
US6130555A (en) * 1997-10-13 2000-10-10 Altera Corporation Driver circuitry for programmable logic devices
US6385735B1 (en) * 1997-12-15 2002-05-07 Intel Corporation Method and apparatus for limiting processor clock frequency
US6084803A (en) * 1998-10-23 2000-07-04 Mosel Vitelic, Inc. Initialization of non-volatile programmable latches in circuits in which an initialization operation is performed
US6163492A (en) 1998-10-23 2000-12-19 Mosel Vitelic, Inc. Programmable latches that include non-volatile programmable elements
US6161188A (en) * 1998-11-17 2000-12-12 Ip-First, L.L.C. Microprocessor having fuse control and selection of clock multiplier
US6191612B1 (en) * 1998-11-19 2001-02-20 Vantis Corporation Enhanced I/O control flexibility for generating control signals
DE60038659T2 (de) * 1999-03-04 2009-06-18 Altera Corp., San Jose Verbindungs- und eingangs/ausgangsmittel für programmierbare logische integrierte schaltungen
US6304122B1 (en) 2000-08-17 2001-10-16 International Business Machines Corporation Low power LSSD flip flops and a flushable single clock splitter for flip flops
US7352602B2 (en) 2005-12-30 2008-04-01 Micron Technology, Inc. Configurable inputs and outputs for memory stacking system and method
US7292069B2 (en) * 2005-12-30 2007-11-06 Intel Corporation Locally asynchronous, block-level synchronous, configurable logic blocks with sub-threshold analog circuits
US7893772B1 (en) 2007-12-03 2011-02-22 Cypress Semiconductor Corporation System and method of loading a programmable counter
US8487655B1 (en) 2009-05-05 2013-07-16 Cypress Semiconductor Corporation Combined analog architecture and functionality in a mixed-signal array
US8179161B1 (en) 2009-05-05 2012-05-15 Cypress Semiconductor Corporation Programmable input/output circuit

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US4307379A (en) * 1977-11-10 1981-12-22 Raytheon Company Integrated circuit component
US4415818A (en) * 1979-01-16 1983-11-15 Nippon Telegraph & Telephone Corp. Programmable sequential logic circuit devices
JPS583185A (ja) * 1981-06-30 1983-01-08 Fujitsu Ltd デコ−ダ回路
US4458163A (en) * 1981-07-20 1984-07-03 Texas Instruments Incorporated Programmable architecture logic
US4433331A (en) * 1981-12-14 1984-02-21 Bell Telephone Laboratories, Incorporated Programmable logic array interconnection matrix
US4562427A (en) * 1983-01-28 1985-12-31 Ncr Corporation System and method for stabilizing asynchronous state machines
US4612459A (en) * 1984-05-31 1986-09-16 Rca Corporation Programmable buffer selectively settable to operate in different modes
US4684826A (en) * 1984-07-20 1987-08-04 Monolithic Memories, Inc. Programmable asynchronous register initialization circuit
US4684830A (en) * 1985-03-22 1987-08-04 Monolithic Memories, Inc. Output circuit for a programmable logic array

Also Published As

Publication number Publication date
EP0225715B1 (de) 1992-03-11
JP2614169B2 (ja) 1997-05-28
JPS62114327A (ja) 1987-05-26
ATE73590T1 (de) 1992-03-15
EP0225715A3 (en) 1988-12-14
EP0225715A2 (de) 1987-06-16
JPH06140919A (ja) 1994-05-20
JPH0573294B2 (de) 1993-10-14
US4771285A (en) 1988-09-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: VANTIS CORP.)N.D.GES.D.STAATES DELAWARE), SUNNYVAL

8339 Ceased/non-payment of the annual fee