DE2743060C2 - - Google Patents

Info

Publication number
DE2743060C2
DE2743060C2 DE2743060A DE2743060A DE2743060C2 DE 2743060 C2 DE2743060 C2 DE 2743060C2 DE 2743060 A DE2743060 A DE 2743060A DE 2743060 A DE2743060 A DE 2743060A DE 2743060 C2 DE2743060 C2 DE 2743060C2
Authority
DE
Germany
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2743060A
Other versions
DE2743060A1 (de
Inventor
John Paul Fond Du Lac Wis. Us Conners
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Giddings and Lewis LLC
Original Assignee
Giddings and Lewis LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Giddings and Lewis LLC filed Critical Giddings and Lewis LLC
Publication of DE2743060A1 publication Critical patent/DE2743060A1/de
Application granted granted Critical
Publication of DE2743060C2 publication Critical patent/DE2743060C2/de
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30029—Logical and Boolean instructions, e.g. XOR, NOT
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30094—Condition code generation, e.g. Carry, Zero flag
DE19772743060 1976-09-24 1977-09-24 Digitalrechner Granted DE2743060A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/726,277 US4212076A (en) 1976-09-24 1976-09-24 Digital computer structure providing arithmetic and boolean logic operations, the latter controlling the former

Publications (2)

Publication Number Publication Date
DE2743060A1 DE2743060A1 (de) 1978-04-13
DE2743060C2 true DE2743060C2 (de) 1987-01-15

Family

ID=24917930

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19772743060 Granted DE2743060A1 (de) 1976-09-24 1977-09-24 Digitalrechner

Country Status (4)

Country Link
US (1) US4212076A (de)
JP (1) JPS5942892B2 (de)
DE (1) DE2743060A1 (de)
GB (2) GB1555609A (de)

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US8266199B2 (en) 2006-02-09 2012-09-11 Altera Corporation Specialized processing block for programmable logic device
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US8645450B1 (en) 2007-03-02 2014-02-04 Altera Corporation Multiplier-accumulator circuitry and methods
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US8396914B1 (en) 2009-09-11 2013-03-12 Altera Corporation Matrix decomposition in an integrated circuit device
US8539016B1 (en) 2010-02-09 2013-09-17 Altera Corporation QR decomposition in an integrated circuit device
US7948267B1 (en) 2010-02-09 2011-05-24 Altera Corporation Efficient rounding circuits and methods in configurable integrated circuit devices
US8601044B2 (en) 2010-03-02 2013-12-03 Altera Corporation Discrete Fourier Transform in an integrated circuit device
US8458243B1 (en) 2010-03-03 2013-06-04 Altera Corporation Digital signal processing circuit blocks with support for systolic finite-impulse-response digital filtering
US8484265B1 (en) 2010-03-04 2013-07-09 Altera Corporation Angular range reduction in an integrated circuit device
US8510354B1 (en) 2010-03-12 2013-08-13 Altera Corporation Calculation of trigonometric functions in an integrated circuit device
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Also Published As

Publication number Publication date
JPS5448137A (en) 1979-04-16
JPS5942892B2 (ja) 1984-10-18
US4212076A (en) 1980-07-08
DE2743060A1 (de) 1978-04-13
GB1555609A (en) 1979-11-14
GB1557610A (en) 1979-12-12

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Legal Events

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OD Request for examination
D2 Grant after examination
8363 Opposition against the patent
8330 Complete disclaimer