DE102011079253A1 - Circuit arrangement for equalizing state of charge of series-connected energy storage device of battery, has energy storage device which is connected parallelly with respect to series circuit of secondary winding of transformer - Google Patents

Abstract

The circuit arrangement has transducer cells (W1-W3) which are connected in parallel to the adjacent energy storage devices (B1-B4). The energy storage device (B1) is connected parallelly with respect to series circuit of primary winding of transformers (Tr1), storage inductance and switches (S1). The energy storage device (B2) is connected parallelly with respect to series circuit of secondary winding of transformer (Tr2), storage inductance and diode (D1). The control circuit (Ctl) of each transducer cell is operated independently to control the operation of switch. An independent claim is included for method for equalizing state of charge of series-connected energy storage device of battery.

Description

Technical area

The invention relates to a circuit arrangement and a method for compensating unequal states of charge of energy stores or voltage sources, e.g. galvanic cells in accumulators.

The individual energy stores are also referred to as cells. The cells are connected to each other in particular in a series circuit to an accumulator. An accumulator thus consists of a series connection of several cells. In typical accumulators, such as e.g. Car batteries, usually only the outermost connections are accessible as accumulator connections. The inner connections of the cells, also referred to as central nodes, are inaccessible in the housing.

background

The invention is based on a device for equalizing the state of charge of serially interconnected energy stores according to the preamble of the main claim. Serially interconnected energy stores are used in many areas. They can be found in notebooks as well as in cordless screwdrivers, battery mowers and various other accumulator operated tools. In recent times, more and more lithium-based energy storage are used for this purpose. These have various advantages such as a higher energy density, no memory effect and a higher cell voltage. However, lithium-based energy storage devices also have disadvantages: many variants of these memories, if they are connected in series in an accumulator, require active circuits for charge equalization, since otherwise there is the danger that the individual cells will diverge in one accumulator. This means that the energy stored in one cell becomes more and more different compared to that in the other cells of the accumulator.

Without access to said central node and without a corresponding wiring, the charge states of the individual cells can not be influenced, in particular can not be compensated for each other efficiently. This then leads to a loss of capacity of the accumulator. Since individual cells are subject to a certain scatter due to production, e.g. by slightly different internal resistances single cells discharge more than their neighbors in the composite of the accumulator: This is considered discharged as soon as the first cell of the composite is discharged, although in the other cells still residual charges are present. Even when charging the battery, this aspect has an effect and some cells charge more than others. Over several cycles, this can lead to some cells having a significantly lower state of charge than others and thus being discharged much earlier than the rest in the composite. On the other hand, there may also be cells which for the reasons mentioned above have a significantly higher state of charge and thus are charged much faster when charging than other cells of the accumulator: although its n-1 cells still have residual charge capacities, the accumulator is considered fully charged, once his first cell is fully charged. This is a significant problem especially with rechargeable batteries with lithium chemistry since cells of this chemistry must never be overcharged or deep discharged. Even if this does not happen, it is to be reckoned with a significantly reduced cycle stability and with a small usable depth of discharge of the accumulator when the cells run apart. The result is that the series connection of several cells to an accumulator is only as strong as its weakest cell. Charge balance circuitry between these cells can alleviate this shortcoming.

From the US Pat. No. 6,356,055 B1 compensation circuits are known with a DC-DC converter per cell, which are secondarily connected in parallel to itself and to the accumulator. Single cells with higher charge are discharged via the DC-DC converter and the energy is distributed over the entire accumulator. However, this circuit has the disadvantage that the DC-DC converter must be designed on the secondary side for the full battery voltage, which can be particularly disadvantageous for batteries for electric cars, as these voltages up to 600 V. This makes the DC-DC converters expensive to manufacture, which is all the more serious, since many such cells are connected in series and thus many DC-DC converters are required in such accumulators. Furthermore, the maximum achievable efficiency of these DC-DC converter with the required voltage ratio decreases, which is quite large when converting from about 4V to 600V, for example, and thus already adversely affected the efficiency from the outset.

From the same document, a compensation circuit with a DC-DC converter per cell is known in which the individual DC-DC converter are interconnected overlapping each other. However, the DC-DC converters require 2 switches per DC-DC converter cell and are therefore complicated and expensive to manufacture.

task

It is an object of the invention to provide a circuit arrangement which is less expensive to manufacture and which is independent of the Total voltage of the accumulator is flexibly configurable.

Presentation of the invention

• – die Schaltungsanordnung weist mindestens eine Wandlerzelle auf, die parallel zu jeweils zwei Energiespeichern aus der Serienschaltung des Akkumulators geschaltet ist,
• – jede Wandlerzelle weist einen Transformator oder eine Speicherinduktivität, eine einzige Diode und einen einzigen Schalter auf,
• – parallel zu einem ersten Energiespeicher ist eine Serienschaltung der Primärwicklung des Transformators oder der Speicherinduktivität und des Schalters geschaltet, deren Enden den Eingang der Wandlerzelle bilden,
• – parallel zu einem seriell folgenden zweiten Energiespeicher ist eine Serienschaltung der Sekundärwicklung des Transformators oder der Speicherinduktivität und der Diode geschaltet, deren Enden den Ausgang der Wandlerzelle bilden,
• – der Schalter wird von einer Steuerschaltung angesteuert,
• – die Steuerschaltung jeder Wandlerzelle arbeitet autark für sich, und ist nicht mit den Steuerschaltungen weiterer Wandlerzellen verbunden.

The object is achieved with respect to the circuit arrangement according to the invention with a circuit arrangement for equalizing the state of charge of serially interconnected energy storage with the following features:

• The circuit arrangement has at least one converter cell which is connected in parallel with two energy stores each from the series circuit of the accumulator,
• Each converter cell has a transformer or a storage inductance, a single diode and a single switch,
• A series circuit of the primary winding of the transformer or of the storage inductor and of the switch is connected in parallel with a first energy store, the ends of which form the input of the converter cell,
• A series circuit of the secondary winding of the transformer or of the storage inductor and of the diode is connected in parallel with a series-connected second energy store, the ends of which form the output of the converter cell,
• The switch is controlled by a control circuit,
• - The control circuit of each converter cell operates autonomously by itself, and is not connected to the control circuits of other converter cells.

The control circuit preferably uses the potential between the first and the second energy store and particularly preferably the negative potential of the first energy store as the reference potential (BP), and the potentials of the other poles of the first or second energy store as control voltages.

In a first embodiment, the converter cell is designed as a throttle inverter, which takes energy from the first energy store and transfers it to the second energy store. In an alternative first embodiment, the converter may be designed as a boost converter, which takes energy from the second energy store and transfers it into the first energy store. This offers the advantage of a simple and inexpensive construction.

In a second embodiment, the converter cell is designed as a galvanically isolated flyback converter or flyback converter which extracts energy from the first energy store and transfers it to the second energy store. This embodiment can be used anywhere in the accumulator with only slight respective technical adaptations-that is, for example, on identical circuit carriers-and thus most flexibly with regard to the absolute position of the first and second energy stores involved and with respect to the definition of the reference potential. Due to the galvanic isolation, the energy can also be transferred between two electrically non-adjacent energy stores. In such an embodiment, the first energy store is preferably the energy store with the lowest potential in the rechargeable battery and the second energy store preferably the energy store with the highest potential in the rechargeable battery. In an alternative second embodiment, the second energy store is preferably the energy store with the lowest potential in the rechargeable battery and the first energy store preferably the energy store with the highest potential in the rechargeable battery.

In an alternative second embodiment, the converter cell is formed by a flyback converter, which takes energy from the second energy store and transfers it to the first energy store.

The control circuit preferably controls the converter with a pulse width modulation. This measure results in a simple structure of the control circuit.

The control circuit can be constructed analog or digital.

The object is achieved with respect to the method according to the invention with a method for equalizing the state of charge of serially interconnected energy storage, which is performed by a control circuit having the above features. The method has the effect that the converter cell is switched on when the difference between the two energy storage voltages of the first and the second energy store measured by the control circuit exceeds a predetermined first value. The converter cell is preferably turned off when the difference between the two measured by the control circuit energy storage voltages falls below a predetermined second value.

In an alternative embodiment, the converter cell is switched on when the voltage of the first energy store exceeds a first value and then switched off again when the voltage of the first energy store falls below a second value.

Further advantageous developments and refinements of the circuit arrangement according to the invention and of the method according to the invention for equalizing the state of charge of serially connected energy stores result from further dependent claims and from the following description.

Short description of the drawing (s)

Further advantages, features and details of the invention will become apparent from the following description of exemplary embodiments and with reference to the drawings, in which the same or functionally identical elements are provided with identical reference numerals. Showing:

1 a first embodiment of the circuit arrangement according to the invention with a first embodiment of the control circuit in an example with 4 series-connected energy storage and 3 converter cells,

2 a second embodiment of the circuit arrangement according to the invention with a first embodiment of the control circuit in an example with 4 serially interconnected energy storage and 3 converter cells, and with a current sink that starts to work from a fixed threshold voltage of the connected to the current sink energy storage,

3a a third embodiment of the circuit arrangement according to the invention with a first embodiment of the control circuit in an example with 4 series-connected energy storage and 4 converter cells, the measurement for one of the control circuits is galvanically isolated, but still compares the cell voltages,

3b a circuit variant with comparator for the Schmitt triggers used in the control circuit,

4 a second embodiment of the control circuit in a converter cell,

5 three signals relevant to the operation of the control circuit,

6a a third embodiment of the control circuit in a converter cell,

6b A fourth embodiment of the control circuit in a converter cell with galvanically isolated, but still the cell voltages comparative voltage measurement,

7 from 4 known second embodiment of the control circuit in a converter cell with galvanically isolated center pole and with a voltage measurement which detects only the voltage of the energy-emitting cell and compares it with a fixed threshold,

8th from 4 known second embodiment of the control circuit in a converter cell with galvanically isolated voltage measurement, which nevertheless compares the cell voltages with each other.

Preferred embodiment of the invention

1 shows a first embodiment of the circuit arrangement according to the invention, the three converter cells W1 to W3, which are designed here by way of example for four serially interconnected energy storage B1 to B4 has. Each converter cell W1 to W3 has an input and an output. The input is connected in parallel with a first energy store B1, and the output is connected in parallel with a second energy store B2 which is connected in series with the first energy store B1 such that the negative pole of the first energy store B1 is connected to the positive pole of the second energy store B2 is.

The internal structure of the power section of a converter cell will now be described below. Each converter cell W (W1, W2 ... Wx) has a series circuit of a switch S (S1, S2 ... Sx) and the primary winding of a transformer TR (TR1, TR2, ... TRx), which are connected to the input of the Transducer cell is coupled. In this case, a terminal of the primary winding of the transformer TR is coupled to the positive potential of the input, and a terminal of the switch S is coupled to the negative potential of the input. Each converter cell has a series connection of a diode D (D1, D2, ... Dx) and the secondary winding of the transformer TR, which is coupled to the output of the converter cell. In this case, a terminal of the secondary winding is coupled to the positive potential of the energy store at selbigem output, and the anode of the diode D is coupled to the negative potential of the energy storage at selbigem output.

Preferably, the transformer TR has a symmetrical turns ratio, so that the number of turns of the primary winding and the secondary winding is the same. Since the required withstand voltage between these two windings is only twice (with approximately 400 times the charged voltages of S1 and D1 switched over) battery voltage, in a particularly advantageous embodiment the transformer TR is bifilar, i. Two identical, insulated, previously color-coded wires or lines are laid parallel or even twisted and applied in this form each other and simultaneously on the winding body provided for the transformer. The ends of the transformer TR marked in each case in the figures lie directly next to each other in this bifilar version of the component.

In a further embodiment, a current measuring resistor R _{shunt is} connected between the connection of the switch S and the negative potential of the input (not shown). In a preferred embodiment, the current measuring resistor R _{shunt may be formed} by the internal series resistance of the switch S. The switch S is preferably a transistor. As a transistor, a field effect transistor, such as a MOSFET, or a bipolar transistor can be used, depending on the chemistry of the energy storage Bx. A bipolar transistor becomes mandatory, for example, when the cell voltage of a single energy store is no longer sufficient to drive the gate of a MOS-FET. This is the case, for example, with NiCd or NiMH cell chemistries.

Each converter cell has a control circuit Ctl which determines the voltage of the first energy store, e.g. B1 with the voltage of the second energy storage e.g. B2 compares and the converter cell e.g. W1 turns on when the first energy storage, e.g. B1 has a higher voltage than the second energy store, e.g. B2. The converter cell W1 then discharges the first energy store B1 and charges the second energy store B2 with this energy.

A first embodiment of the control circuit Ctl will now be described below. For this purpose, the control circuit Ctl a voltage divider of two resistors R1 and R2 (R21, R31 ... Rx1 and R22, R32 ... Rx2), which is connected to the positive pole of the first energy storage B1 and the negative pole of the second energy storage B2 , The mid-point of the voltage divider is connected to the first input of a comparator circuit, in this embodiment a Schmitt trigger. The second input of the comparator circuit is connected to the connection point of the first and the second energy store. With this arrangement, an asymmetry between the two energy storage voltages is detected. If the voltage of the first energy storage device B1 is greater than the voltage of the second energy store B2 by a predetermined value, then the output of the comparator circuit is high or logic 1. This output is connected to the switching input enable of a drive circuit PWM for the switch S, here first switch S1, connected. This switching input can generally switch the activation or timing of the transistor S on and off. Preferably, the drive circuit PWM is a pulse width modulation circuit that drives the switches with a pulse width modulation, as long as the cell voltages differ. The switches are preferably transistors, particularly preferably MOSFETs. In the preferred embodiment shown here, the channel resistance of the MOSFET in the on-state RDSon is used as a shunt or current measuring resistor for the current measurement in the primary circuit of the converter cell. After the RDSon of the silicon MOSFETs used has a significant temperature dependence, the control circuit Ctl has a temperature compensation, which eliminates this effect as far as possible. Otherwise, the same effect leads to a re-regulation of the transmitted power in the converter cell when heated, which is also desirable, since this is an inherent over-temperature feedback (= self-protection function).

For the activation of the switch or transistor S, the drive circuit PWM has a drive output Out. For the current measurement, the control circuit PWM has a measuring input sense.

According to the invention, n-1 converter cells with n energy stores are connected in such a way that the input of the first converter cell W1 is parallel to the first energy store B1, the output of the first converter cell W1 is parallel to the second energy store B2 and parallel to the input of a second converter cell W2. The output of the second converter cell W2 is connected in parallel to a third energy store B3 and parallel to the input of a third converter cell W3, etc. The output of the nth-th converter cell W (n-1) is then connected in parallel to the nth energy store Bn, which is preferably designed with higher capacity. This is because any transshipment between the energy stores always from 'above' to 'down' happens, ie from the first energy storage B1 to the second energy storage B2, the second energy storage B2 to the third energy storage B3, etc., until the charge in the nth, the 'Lowest' energy storage Bn arrives, which is slightly more charged than the remaining energy storage. The lowest energy storage Bn is therefore preferably designed with respect to the other energy storage increased capacity.

This can then serve as a source for an auxiliary voltage, for example, so that it will not become overloaded over time. In order to avoid overcharging, in a second embodiment, the in 2 shown, the excess charge is conducted into a current sink CD. The current sink CD can be regarded as the nth, converter cell ', but does not transport the excess charge energy to another point of the accumulator, but consumes this energy. The simplest form of these consumers are ohmic resistors R ₄₃ and R ₄₈ , which convert the excess charge energy into heat. This ensures that the nth, in the present embodiment, the fourth energy storage B4 can not be overloaded. In such an arrangement, the nth, so to speak, the "lowest" energy storage must not be designed with increased capacity.

In contrast to the three overlying converter cells with their associated control circuits Ctl, the circuit CD has a simplified control: The Meßspannungssteiler from R41 and R42 extends only over the voltage of an energy storage, here B4, and thus generates at its center, which with the Pluseingang the Schmitt trigger is connected, a potential above the negative pole of the lowest energy storage. This apparent disadvantage, however, makes it possible to form a fixed reference from the same voltage of the lowermost energy store by means of R44 and the Zener diode Vref, which is connected to the minus input of the Schmitt trigger, and with which the measurement from R41 and R42 is thus compared. If the output of the Schmitt trigger Rv switches to high or logic 1 and thus to Q4, the current through the load resistor R43 in Q4 is limited by the emitter resistor R48.

3a shows a third embodiment of the circuit arrangement according to the invention in an example with also 4 serially interconnected energy storage devices B1 to B4 and 4 converter cells W1 to W4. Here, the current sink of the previous embodiment is replaced by a fourth converter W4, which feeds the excess charge energy back to the first energy storage B1. The input of the fourth converter cell W4 is thus connected in parallel with the fourth energy store B4, and the output of the fourth converter cell W4 is connected in parallel to the first energy store B1. Generally speaking, the input of the nth converter cell Wn is connected in parallel to the nth energy storage Bn, and the output of the nth converter cell Wn is connected in parallel to the first energy storage B1. The nth converter cell Wn is thus the only one whose input must be galvanically isolated from the output, and whose dielectric strength must be designed at least on the total voltage of the battery, which is essential to the construction of the transformer Tr4, in particular its winding insulation, and the design of the measuring circuit affects.

All other converter cells W1 to W (n-1) can be of simpler construction since only the voltage of two energy stores is applied to them as the maximum voltage. Thus, there is a redeployment of the charge, which is successively pushed by the first energy storage B1 to the last energy storage Bn, to be transferred from there then back to the first energy storage B1. The charge is thus shifted in turn, and that until all energy stores have the same charge level. Due to the principle that the charge is always moved only from the 'higher' to the 'lower' energy storage, the converter cells can be very simple, compact and inexpensive realized. A central control is not required, the simple controls of the converter only consider the cell voltages of two series-connected energy storage and compare them with each other. Due to the overlapping interconnection of the individual converter cells, the circuit arrangement does not require central control. This principle is very flexible, since always identical converter cells can be produced, and thus virtually all accumulator sizes can be provided with charge compensation regardless of the total accumulator voltage. For this purpose, a converter cell is only necessary per accumulator cell. Only the lowermost converter cell must be adapted in its dielectric strength to the total accumulator voltage. A detailed description of the optocoupler measurement circuit used for voltage comparison between the bottom and top cells is provided below 6b ,

3b shows an alternative comparator circuit to that in the 1 to 3a shown Schmitt trigger, which is formed of a comparator, and by feedback by means of a resistor Rx5 has a hysteresis. More precisely, the comparator or operational amplifier output signal is fed back via Rx5 to the high-impedance connected positive input of the same amplifier, that is coupled with it. The hysteresis width results from the ratio between Rx5 and the parallel connection from Rx1 to Rx2.

4 shows a converter cell with a second embodiment of the control circuit Ctl. In this second embodiment, the control circuit Ctl including the necessary PWM function is constructed with operational amplifiers. The voltage divider of R4 and R6 and R7 to R9 make it possible to supply all participating amplifiers with only one cell voltage of the associated energy storage B1 instead of the series voltage of the two (usually) adjacent energy storage B1 and B2, the ent of the considered transducer or . getting charged. As a result, the modular design remains, because in particular in the converter for the 'lowest' energy storage whose excess charge is to be delivered to the 'top' energy storage, the supply of the associated control by both cell voltages at the same time due to the necessary potential separation is impossible. This results in that the reference potential for the entire control, which is given by the voltage Vp, which will be described in more detail below, at the positive pole of the input comparison measuring amplifier U3 is approximately 0.7V to 1.0V above the reference potential BP. This upward shift of the reference potential is compensated for by dimensioning the resistor R1 of the comparative measuring voltage divider somewhat lower than the resistance R2.

Although it thus appears that the measurement result depends not only on the comparison of the cell voltages of the energy stores B1 and B2 but also on the absolute voltage of the energy store B1, the following brief calculation shows that the absolute voltages have no effect on the result of the comparison measurement. The operational amplifier U3 is used to detect when and by how much the energy store B1 has a higher voltage (which is a measure of the state of charge of the energy store) than the energy store B2. U3 represents the comparative input measuring amplifier and is the only one operated in the linear range, which can be recognized by the proportional, ie ohmic feedback of its output via the resistor R3 to its high-impedance connected negative input, ie at its negative feedback.

The question necessary for the proof of a real comparison measurement is: Does the non-feedback measuring amplifier U3 tilt if the voltages Vb1 and Vb2 of the two energy stores B1 and B2 involved remain the same, but change in their absolute values? For this purpose, the voltages Vp and Vn (each measured with respect to BP) at the positive or negative input of the measuring amplifier U3 must be considered: They must always remain the same, so that U3 does not tilt, so that his measurement remains independent of the absolute voltages: Vb1 = Vb2 = V + dV.

The reference potential Vp is calculated to Vp = ((V + dV) * R6) / (R4 + R6).

So that the quiescent currents through the two voltage dividers connected to the amplifier U3 are equal, thus providing optimum starting conditions for the equality between Vp and Vn, the following applies: R1 = R4.

The above-mentioned compensation by the resistor R2, which must be chosen higher impedance than R1, can thus be quantified universally: R2 = 2 * R6 + R1 = 2 * R6 + R4.

Thus, the equation for the measurement input voltage Vn is: Vn = (2 * (V + dV) * R2) / (R1 + R2) - (V + dV) = = (2 * (V + dV) * (2R6 + R4)) / (2R6 + 2R4) - ( V + dV) = ((V + dV) * (2R6 + R4) - (R6 + R4) * (V + dV)) / (R6 + R4) = = ((V + dV) * R6) / ( R6 + R4) = = Vp, qed

In a dimensioning of the resistors R1, R2, R4 and R6 corresponding to this calculation, the measuring amplifier input voltages Vp and Vn always remain the same relative to one another as long as the cell voltages Vb1 and Vb2 remain the same relative to one another. This is true even without the feedback of the output voltage V2 (measured against BP) of the measuring amplifier U3 through the resistor R3 to its negative input, ie without negative feedback.

Thanks to this negative feedback, the measuring amplifier U3 can influence its one input voltage Vn by its output voltage V2 so that it is always equal to Vp, even and especially when Vb1 is not equal to Vb2. As a result, the height of V2 is determined only by the input variables Vb1 and Vb2, by the dimensioning of the resistors R3, R4 and R6 involved and by the dimensioning of the resistors R1 and R2 which depends thereon, and (almost) not by the properties of the resistor Measuring amplifier U3 itself: principle of the feedback operational amplifier.

The reference potential for the entire control is, as already mentioned above, given by the voltage Vp measured against. BP: Vp = Vb1 * R6 / (R6 + R4).

Thanks to negative feedback except in the case of highly dynamic transients, the following applies in a very good approximation: Vn = Vp.

Since before the start of a reload, as described in more detail below 5 As can be seen, the measuring amplifier output voltage V2 is below the reference potential Vp, a current I3 is assumed by the negative feedback resistor R3, which flows into the output of the measuring amplifier U3 for the following reasoning. Furthermore, a current I1 flows from the positive pole of Vb1 through R1 in the direction of Vn, finally a current I2 out of the node Vn through R2 into the negative pole of Vb2. This gives the condition I1 = I2 + I3.

These three currents are determined by their determining voltages (with Vn = Vp) and Resistances (expressed as R1 = R4), the equation above is as follows: (Vb1 - Vp) / R4 = (Vp + Vb2) / R2 + (Vp - V2) / R3; V2 / R3 = Vp / R3 + Vp / R2 + Vp / R4 - Vb1 / R4 + Vb2 / R2.

The penultimate equation with Vp and Vb1 inserted here into the second and third summands yields V2 / R3 = Vp / R3 + Vb1 * (R6 * (1 / R2 + 1 / R4) / (R4 + R6) - 1 / R4) + Vb2 / R2.

With the condition that R2 = 2R6 + R4, the factor at Vb1 can be greatly simplified, and it turns out V2 = Vp + R3 * (Vb2-Vb1) / R2.

The comparative measuring amplifier U3 adds at its output the reference voltage Vp at its positive input with a further voltage, which depends only on the difference between the two cell voltages involved and the resistance ratio R3 / R2. As expected due to its negative feedback, the measuring amplifier U3 operates inversely with regard to its supply voltage Vb1, which is visible at the negative term in the above result for V2.

The operational amplifiers U1 and U2, in contrast, operate as comparators. The operational amplifier U1 serves to current-limit the converter cell by using the channel resistance of the drain-source path of the transistor S1 as a shunt for current measurement and turns off the transistor at a predetermined current. The voltage divider of R11 and R12 forms the reference voltage Voff for the current measured value, when exceeded, U1 switches to logic 0: Thus, U1 can also be referred to as current measuring comparator. U2 combines the signals of the two operational amplifiers U1 and U3 in such a way that a functional pulse width modulation control for the converter circuit is produced.

The resistor R5 generates a positive feedback since it is analogous to 3b in addition to an otherwise high-impedance wiring is connected to the positive pole Vp of the measuring amplifier. The capacitor C1 stores the positive feedback for a very short time, thus causing R5 and C1 hysteresis, which leaves the cell converter turned on a little longer to compensate for the voltage drift of the two energy storage B1 and B2 during reloading. As a result of the charging process, the cell voltage of the energy store B2 rises somewhat, while the voltage of the energy store B1 breaks somewhat during the discharge. If the cells are approximately equal in good approximation, they have a similar internal resistance, and the voltage drop of the discharged cell corresponds to the voltage increase of the charged cell. Without the hysteresis, the converter would shut down immediately after a short operation, since the charging voltage of the energy storage device B2 rises above the discharge voltage of the energy storage device B1, although the state of charge of the energy storage device B1 is higher than the state of charge of the energy storage device B2.

5 shows the course of the three tensions that exist between the in 4 indicated points V1 and BP, between Vp and BP and between V2 and BP, which are referred to below as voltages V1, Vp and V2 for the sake of simplicity. V1 is the output voltage of the comparator U1, which is conducted via a resistor R9 and is attenuated and centered by the resistors R7 and R8. V1 controls in principle the transistor S1 via the comparator U2. For this purpose, the voltage V1 is input to the positive input of the comparator U2. The negative input of U2 is connected to the output of the operational amplifier U3, and thus the voltage V2 is input to the negative input of the comparator U2. The comparator U2 thus has the power of decision on whether and when the converter cell is turned on at all, that is, if PWM is switched to the gate of the switch S1 or not. If the converter cell is switched on, the voltage V1 is a rectangular voltage with a specific duty cycle, here about 50%. The voltage V2 is a measure of the voltage difference between the two energy stores B1 and B2 and is the smaller, the greater the voltage Vb1 over B1 compared to the voltage Vb2 over B2. For equality between Vb1 and Vb2, V2 is in very good approximation at said reference potential Vp of 0.7V ... 1.0V above BP. V2 becomes larger the more the voltage Vb2 outweighs the voltage Vb1.

Thus, as long as there is no voltage difference between the two energy stores, or even Vb2 is greater than Vb1, the voltage V2 is greater than the reference potential Vp or equal to it, and the comparator U2 is off. The gate of the transistor S1 is thus at reference potential BP. This is the potential between the energy stores B1 and B2, on which the source terminal of the transistor S1 is located. When the transistor S1 is switched off, the comparator U1 is likewise switched off, since its negative input via R10 and the primary winding of the transformer TR1 is at the positive potential of the energy store B1. This results in the voltage V1 across the voltage divider from the parallel circuit of the resistors R8 and R9 and the resistor R7, which involved by appropriate adjustment of the three Resistors R7 ... R9 and at dormant converter cell, so on the left edge of 5 , at the voltage Vu is slightly below Vp, that is at about 0.4V ... 0.5V above the reference potential BP: This voltage Vu is the so-called start threshold. As soon as the voltage difference between the energy stores B1 and B2 is so great that the voltage V2 becomes smaller than the start threshold, the tilting of U2 initially switches on the transistor S1 and thus starts the PWM. By turning on S1, the negative input of the comparator U1 is pulled towards the reference potential BP, and the comparator U1 turns on. Thus, the voltage V1 is now defined by the voltage divider from the resistor R8 and the parallel circuit of the resistors R7 and R9 and thus takes over their previous value Vu a significant leap up. The resulting upper value Vo of the voltage V1 is the so-called stop threshold, the meaning of which will be explained below. This ensures that the comparator U2 remains switched on: The PWM action itself supports the initial switch-on decision of the comparator U2 by positive feedback via the current measuring comparator U1, as just described.

By turning on the transistor S1, the current through it increases, and the potential VS at the negative input of the current measuring comparator U1 rises, due to the track resistance of the transistor S1 and the transmission of the voltage drop across it by the measuring resistor R10. Due to the approximate lack of current, the voltage across R10 during this measurement process is almost zero and thus the parallel capacitor C10 ineffective. As soon as VS becomes greater than the reference voltage Voff at the positive input of the comparator U1, defined by the resistors R11 and R12, U1 switches off again. Thus, the voltage V1 abruptly decreases again to the start threshold Vu, whereby the comparator U2 and with it the transistor S1 should be turned off again.

For this just-described first switch-off command, which is triggered by the current measuring comparator U1, to be safely passed to the gate of the transistor S1, the voltage V2 has to be raised a little above the start threshold, as long as the considered converter cell is clocked by PWM. For the minimum value of V1 corresponds to the start threshold, and if V2 would remain at this potential or even somewhat below it at the initial switch-on, S1 could theoretically never be switched off, which would destroy the converter cell. This problem is solved by the positive feedback of the averaged gate signal. This is the same positive feedback, which compensates for the above-described voltage dip and rise of under discharging or charging energy storage.

R5 and C1 form a low-pass filter which, without being stressed by R6 at the node between R5 and C1, produces about half the gate voltage according to the characteristic time constant as a function of the pulse-pause ratio of the PWM coming out at the output of U2. Said characteristic time constant causes the above-mentioned latching for very short time and is defined by the capacitance of C1 and the resistance of the parallel connection of the three resistors R4 ... R6. This approximately half the gate voltage is at least partially superimposed on the reference potential Vp of the comparative input measuring amplifier U3, as a result of which its output voltage V2 increases correspondingly, as long as the considered converter cell is clocked. The characteristic time constant must be short enough so that the measuring amplifier output voltage V2 already comes out sufficiently above the starting threshold Vu after the first PWM half-period of approximately 10 μs, so that U2 reliably shuts off again at this point in time. It follows that the characteristic time constant is quite short and thus the filter effect of said low-pass filter is quite weak: the result is the jagged profile of the voltages V2 and Vp in 5 ,

After switching off the transistor S1, the potential VS swings upward to a value of about Vb1 + Vb2 via BP and thus leaves the comparator U1 off: Again, the positive feedback of a switching decision is due to the effect of the switching action itself, hereinafter referred to as PWM Mitkopplung is called. The transformer Tr1 is swung around, the diode D1 is turned on to demagnetize the transformer. In this phase, the cached in the main inductance of the transformer Tr1 energy that comes from the energy storage B1, delivered to the energy storage B2 again. It can be seen that the transformer Tr1 must be protected against saturation, preferably by an air gap in its magnetic path. Furthermore, the clamping diode D10 and with it the measuring elements R10 and C10 are active in this phase. Missing the last three elements, the negative input of the current measuring comparator would be pulled over its supply voltage and thus destroyed. With the arrangement off 4 the PWM positive feedback is clamped at about the supply voltage, and C10 is charged to a voltage whose value is approximately equal to the voltage Vb2 of the lower energy storage B2 and whose positive end is at the node, VS '.

After demagnetization of the transformer Tr1, the rectifier diode D1 switches the Transducer cell off again. Although the transformer Tr1 is de-energized at this time, it is under voltage. At the same time, the parasitic D1 parallel capacitance or diode capacitance is completely discharged and the parasitic S1 parallel capacitance or transistor capacitance is charged approximately to twice the cell voltage. It follows from all that a parasitic return oscillation current is created by these three latter components, whose direction is opposite to the last by demagnetization current flowed by D1. This charges the parasitic diode capacitance and discharges the parasitic transistor capacitance. After a quarter period of this parasitic return oscillation, the backscatter current has reached a relative maximum, and both diode and transistor capacitances are charged or discharged to voltages corresponding to the associated cells. Because of this maximum current in the main inductance of the transformer Tr1 is followed by another quarter period of the parasitic oscillation, in which the return oscillation current indeed continues, but is degraded again, because the transistor capacity is further discharged, so the potential of VS drops below Vb1, and because the Diode capacity is charged beyond the voltage Vb2 addition. If the return oscillation current has become zero again, the cathode potential of the diode D1 is approximately Vb1 above BP and thus the blocking voltage across D1 is approximately twice a cell voltage. As a result, the voltage VS is almost completely curved to zero, and the comparator U1 turns on again, which has the consequence that the comparator U2 and thus also the transistor S1 turns on again. The voltage V1 is by this switching mimic a square-wave voltage that jumps back and forth between its lower value Vu, the start threshold, and its upper value Vo, the stop threshold. The gate voltage VG of the transistor S1 jumps between zero and Vb1 and follows in time the voltage V1.

The ideal case of this parasitic return oscillation is described above. Due to losses, in particular in the transformer, it frequently happens that, after one half period of this return oscillation has elapsed, the potential VS has not completely swung back to zero or below Voff. In order for the current measuring comparator U1 to be able to react and switch on again, the parallel capacitor C10 is provided: at the beginning of the parasitic return oscillation, it was charged to approximately one cell voltage and, during the return oscillation, holds this potential difference between the node, VS 'and the negative input of the comparator U1 at least partially upright. This means that said input always has a lower potential than the node VS. This will allow U1 to back down and turn on again, even if Vs does not return to zero. The duration of the half period of the return oscillation is known or can be measured. Equally known or measurable is the minimum of the potential of VS after switching off D1 and after said half period. If transistor T1 can not be turned on at drain-to-source voltage = zero, then exactly this point in time for turn-on is optimal. R10 is so high-impedance dimensioned that during the conduction phase of D1, a current flows through it, the magnitude of which corresponds to the currents through the resistors R1, R4, R7 and R11. Now, C10 is to be sized so that the time constant resulting from C10 and R10 is just long enough that during that half period the original potential difference of about one cell voltage has discharged at most to the value above the world of the VS minimum above BP equivalent.

At each clock cycle, the voltage V2, due to the reloading of the energy storage B1 and B2, increases a little. This is on the course of V2 in 5 even though most of this process is hidden in the middle of the figure in the outbreak. The circuit is dimensioned such that the voltage V2 then reaches the same value as the voltage V1 when the comparator U1 is switched on, ie the value of the stop threshold Vo, when the cell voltage of the energy store B2 is greater than the cell voltage of the energy store B1 by a predetermined value. The predetermined value is between 0.5V and about 2V and defines a reasonable threshold above which the converter cell should stop working again. Therefore, this upper value of the voltage V1 when the comparator U1 is turned on, as mentioned above, stop threshold.

If the voltage V2 is greater than the voltage V1 when the transistor S1 is switched on, that is to say V2 exceeds said stop threshold, then the transistor S1 is no longer switched off by the comparator U1 but by the comparator U2. This confirms its role as the central decision maker, whether to clock at all or not. As a result of this roller replacement, the turn-on pulse of the transistor S1 becomes shorter, the transformer TR1 is less magnetized and therefore requires less time to be demagnetized by D1 after switching off S1. The PWM duty cycle therefore remains unchanged in this final phase of a Umladeaktion, the switching frequency in the converter cell but increases significantly. This increases the influence of the losses already described above, which is why after a short time the time constant of R10 and C10 described above is no longer sufficient to move the current measuring comparator U1 to restart and thus continue its PWM cycle: The converter cell stops working ,

Although hysteresis over the charged capacitor C1 decays rapidly, it remains due to the meanwhile reversed charge balance of the two energy storage devices B1 and B2, the voltage V2 after a last clock pulse of the voltage V1 far above the reference potential Vp and the start threshold Vu, also said PWM positive feedback is missing, so the converter cell remains switched off.

6a shows a converter cell with a third embodiment of the control circuit Ctl. This is designed here as a purely discrete circuit with the bipolar transistors T1 ... T7 and a MOSFET as a converter cell power transistor S1. The principle of action is similar to that of the 4 and 5 described, it also here the voltages of the two energy storage devices B1 and B2 are compared. For this purpose, the total voltage of both energy storage devices B1 and B2 is measured via the voltage divider R1 and R2 and via its center node whose potential due to the base-emitter voltage of T7 and the voltage drop to be expected via R6, by the current through the upper reference resistor R4 is preset, similar to in 4 must be above the reference potential BP, led to the base of the measuring transistor T7. The end 4 known reference potential Vp can be found here at the node of R6, R4 and the emitter of T7. T7 takes over the function of the input measuring amplifier, which in 4 labeled U3. In contrast to the local output voltage V2, the output of interest here is the current I7, which flows into the collector of the transistor T7.

If the base-emitter voltage at T7 is neglected, a potential equality between the center node of the R1-R2 voltage divider and the reference potential Vp applies in the first approximation. This corresponds to the potential equality forced by the negative feedback between Vn and Vp at the inputs of U3 in FIG 4 , Furthermore, assuming the current gain of T7 to be very large, the base current of T7 can be neglected, so that - again in a first approximation - its entire environment depends only on the voltage drop at R6: Vp = R6 * (I4 + I7).

I4 is the current from the associated cell voltage Vb1 through the upper reference resistor R4, and it can be seen from the term "I7" in the above equation that the output current of the measuring amplifier directly couples directly to the reference voltage. Therefore, in this fully discrete version is out 6a no negative feedback resistor R3 needed, ergo also not to find. Because of this direct negative feedback also varies the voltage across R4 and thus the current through it: I4 = (Vb1-Vp) / R4.

This is used in the above equation for Vp and solved for Vp Vp = (R6 * Vb1 / R4 + R6 * I7) / (1 + R6 / R4).

Neglecting the base current of T7, the current through the entire measuring voltage divider R1 and R2 applies: I1 = I2 = (Vb1 + Vb2) / (R1 + R2) = (Vb1 + Vb2) / (2R6 + R4), where for the last term the two above-known resistance relations R1 = R4 and R2 = 2R6 + R4 were used. If the reference voltage is now also calculated on the basis of the measuring voltage divider, the hard voltage coupling through the basis of T7 is, so to speak, mathematically accomplished as well: Vp = Vb1 - R1 • I1 = Vb1 - (Vb1 + Vb2) / (2 * (R6 / R4 + 1)).

Composed both right sides of the above equations for Vp I7 = (Vb1-Vb2) / (2 * R6).

On the basis of this calculation, which is simplified only in two usual and permissible places, it can be seen that the output signal I7 of the input measuring amplifier transistor T7 depends exclusively on the difference of the cell voltages Vb1 and Vb2 involved, and that the value range of I7 is scalable by R6. Unlike U3 off 4 T7 works non-inverting here: the larger Vb1 compared to Vb2, the larger I7, which allows the converter cell to be started, as described below. It is understood by way of reference 6a of course, that I7 can only take positive values and that its value is zero as soon as Vb2> Vb1 holds.

The circuit of T1... T4 corresponds to the input stage of the current measuring comparator U1 constructed with discrete bipolar transistors 4 , The upper emitter resistor R11, the out 4 is known here as the upper turn-off threshold resistance, here also amplifies the differentiating effect of the input differential amplifier of T1 and T2, the two equal lower emitter resistors R18 and R19 increase the accuracy of the current mirror from T4 and T3. Instead of this, or in addition, a Wilson current mirror may be used which comprises a third transistor (not shown here). The operation of a current mirror and a Wilson current mirror can, for example, the Wikipedia article current mirror ( http://de.wikipedia.org/wiki/Stromspiegel ), retrieved on April 11, 2011, taken become. The positive input or reference input of the current measuring comparator is the base of T1, the negative input or measuring input is the basis of T2. Decreasing currents from the inputs of this circuit are interpreted here as increasing voltages at the inputs of a classical comparator. Therefore, in the turn-off threshold voltage divider, the resistance ratio between R11 and R12 should be approximately inversely dimensioned here, as measured by the ratio in 4 , Thus, the function of R12, the Schottky diode and R10 is clear: R12 and R10 have approximately the same value, and thus represents the falling across the Schottky diode voltage Voff is the reference to the voltage in the case of the activity of the considered converter cell voltage resistance of the MOSFET is allowed to rise until said comparator input stage tilts and leads to the re-switching of the transistor S1.

By trimming the lower turn-off threshold resistor R12, the turn-off threshold can be finely adjusted. Because in the resting position of the converter cell defined by the Schottky diode, R11 and R12, only T1 is conducting, the voltage of the node VK is just below the cell voltage of the energy store B1. Instead of linearly inverting and amplifying the output VK of this input stage as in classical comparators, VK is here routed directly to the dynamically controlled, inverting push-pull stage from T5 and T6. This circuit, which is characterized in particular by the two basic series capacitors C2 and C3, firstly has the advantage that there is no cross-flow due to lack of a direct ohmic connection between the bases of the two transistors T5 and T6 and because of the base parallel resistors R15 and R16, the same time T5 and T6 would flow and produce high losses, and that they basically do not need any static power, only during the turn-on periods of S1, a low static power out of the node VK. Resistor R13 ensures that S1 is safely switched off in the rest position of the converter cell. R9 ensures that with a symmetric pulse pattern at VK, the gate of S1 is charged slower than it discharges, which is generally considered advantageous in the prior art. Finally, the clamping circuits remain parallel to R15 and R16, each consisting of an LED and a series diode, which are required by the mainly dynamic control of the bases of T5 and T6 to protect them from overvoltage at each non-conductive basis: These branches are also indicators, whether the cell works, and how. If it is working at full power, both LEDs, ie red and green, light up in a similar way to the cell above 4 described, decreases the dynamics of switching on S1, which is why the red LED goes out. The hysteresis required for overriding the voltage dip and rise of cells in the charge-transfer mode is generated here exclusively by dynamic positive feedback of the PWM acting through the entire circuit.

If the charge of the energy store B1 increases relative to the energy store B2 and accordingly also its voltage Vb1 in comparison to Vb2, transistor T7 begins to conduct as calculated above, and a small current I7 flows through the measuring resistor R10, counter-coupled through the emitter resistor R6. This current ensures that the transistor T2 begins to conduct. As a result, a current flows in the current mirror, which consists of the transistors T3 and T4, where T4 represents the input of the current mirror and T3 represents the output of the current mirror. A reference current for the current mirror is generated by the voltage divider R11, Voff, R12, flows through the base of the transistor T1 and keeps it conductive. The resistors R15 and R17 support the resulting position of the node VK just below the cell voltage of the energy storage B1 and generate a DC component on the output side of the current mirror, which only by that of the sub-circuit of R1, R2, R4, T7, R6 and T2 at detected and compensated charge discrepancy generated, described above, small DC I7 can be overcome. This initially flows only via R10, and only when sufficient voltage drop there - due to a sufficient voltage overshoot of B1 compared. B2 - the differential amplifier transistor T2 of the negative comparator input becomes conductive. Its collector output current represents the input current for the T4 and T3 current mirror already described above. At the same time, the base and collector currents of T2 are now also flowing through R11, which increases its voltage drop and consequently reduces over R12: the base current T1, referred to above as reference current in rest position, is reduced. At the same time arises at the collector of T3, the current mirror output current corresponding to its input current between the collector of T2 and T4, and charged for the first time the collector of the differential amplifier transistor T1 at the positive input or reference input of the comparator. If, due to a further charge and thus voltage increase of B1, the collector current of transistor T2 increases, the current through the collector of T3 is mirrored. If this current is greater than the currently already slightly reduced reference current through R12 multiplied by the saturation current amplification of the transistor T1, T1 begins to drop voltage at this value of its collector current: VK begins to travel downwards. From this point on the collector current of T1 is added to the above DC component through R15 and R17, the sum of both is the current mirror output current at the collector of T3, thus the same - again larger - current must also be taken from the collector of T2 pull down: The pulling down of the potential of VK is linear with the control of the discretely constructed comparator via the base current of T2, which depends essentially on the already calculated I7. The last crucial point is reached when the voltage drop across R15 is large enough so that the upper gate drive transistor T5 becomes conductive. Soon thereafter, the gate of S1 is charged enough so that the converter cell power transistor S1 turns on: the potential of VS is pulled towards reference potential BP, to the measurement output current I7 from the base of T2 suddenly an inverted current through R10 is added. Thus, the current mirror completely turns around, and the point VK is pulled toward the reference potential BP. As a result, the transistor T5 remains reliably conductive, and this in turn leaves the MOSFET S1 turned on.

If the MOSFET S1 is turned on, a current flows through the transformer TR1, which is thereby magnetized. The point VS is pulled to reference potential BP by the switched-on MOSFET S1, with the result that via the resistor R10 a base current flows out of the transistor T2 out to the reference potential and the collector current of the transistor T2 thus remains high. As a result, the state of the current mirror is strengthened and the point VK continues to be held at reference potential: Here, too, as above 5 for the circuit of 4 described, a PWM positive feedback before.

Due to the track resistance of the transistor S1, the rising current generates a rising voltage at the point VS. This voltage generated via the resistor R10 a sinking base current in the transistor T2, which also drops its collector current and thus slowly raises the potential of the point VK a little, since the current mirror output current in the collector of the transistor T3 decreases accordingly. From a certain current through the MOSFET S1, the voltage at the point VS is so high that the base current through the transistor T2 falls below the reference base current of the transistor T1: The current mirror folds back and pulls the point VK in the direction of the positive pole of the first energy storage B1 , As a result, the transistor T5 turns off, and the transistor T6 briefly turns off to clear the charge stored in the gate of the MOSFET S1. The MOSFET S1 is thereby turned off, the point VS moves about a cell voltage across the positive pole of the upper energy storage B1. In order to safely avoid destruction of the base-emitter path of the transistor T2, the clamping diode D10 is present, which also helps to properly charge the parallel capacitor C10, which generates the lead time constant for safe continuation of the PWM with R10 as described above , During this time, the transformer TR1 is recirculated, and the diode D1 is conductive and demagnetizes the transformer TR1. After turning off the diode D1, the point VS oscillates due to the same as 4 described parasitic return oscillation back down in the direction of reference potential BP. Due to the lead time constant due to the parallel capacitor C10, the node with R10, C10, the base of T2 and the collector of T7 even reaches below the reference potential BP. Thus, the base current of the transistor T2 increases reliably, so that the current mirror again tilts and turns on the MOSFET S1 again.

The converter cell now operates and discharges the first energy store B1 and charges the second energy store B2 with this energy. As a result, the voltage at the first energy store B1 decreases, and at the same time the voltage at the second energy store B2 increases. The potential BP slowly rises from the potential of the base of the transistor T7, and the base current through the transistor T7 becomes less and eventually becomes quite ebbated: thus also its output current I7 activates the cell and during its work the DC offset in the drive circuit through R15 and R17, to zero, as calculated above. As a result, the base current in the transistor T2 when swinging back of the transformer TR1 is no longer sufficient to bring the current mirror to tilt, and the converter cell switches off again.

6b shows a fourth embodiment of the control circuit in a converter cell, which differs from the third embodiment according to 6a essentially differs in that their voltage measurement is galvanically isolated. Therefore, only the differences from the third embodiment will be described here. The converter cell of 6b has a complete galvanic isolation between the energy stores. This converter cell is only necessary once in a network, namely in order to connect the energy store, which comprises the negative pole of the accumulator, to the energy store, which comprises the positive pole of the accumulator, or vice versa, and thus to realize a transhipment of the excess energy in a circle to be able to. For this purpose, the voltage divider comprising the resistors R1 and R2, which in the third embodiment sums the voltages of both energy stores and then compares them to the reference potential Vp in the vicinity of the midpoint of these two voltages, is divided into two voltage dividers, each of which measures the voltage of an energy store. The voltage of the energy store, which is connected to the negative terminal of the accumulator, is measured with a voltage divider consisting of a series connection of the resistor R1 and the primary terminal or the transmittingoids of a second optocoupler OK2 with the secondary terminal or the receiving transistor a first optocoupler OK1 is at the collector in addition to the base of 6a already known comparative measuring amplifier transistor T7 is connected. Alternatively, this voltage divider can also consist of the resistor R1 and the direct series connection of the transmitting diode of the OK2 and the receiving transistor of the OK1, the base of T7 connected between R1 and the OK2 transmitting diode (not shown). The voltage of the energy store, which is connected to the positive pole of the accumulator is measured by a voltage divider consisting of a series connection of a resistor R2 and a parallel connection of the secondary terminal or receiving transistor of the second optocoupler OK2 with the series connection of a resistor R14 and the primary terminal or the transmitting diode of the first optocoupler OK1 exists. This results in a galvanically isolated voltage measurement, which nevertheless compares the cell voltages with each other. The two optocouplers are configured such that they simulate an ohmic voltage divider via both energy stores involved and drive the transistor T7 in the manner already described above. The voltage comparison function is ensured by the fact that the two optocouplers OK1 and OK2 are coupled in such a way that they emulate a Wilson current mirror. The resistor R1 here is the input diode of the second optocoupler OK2 connected in series to transmit a signal to the secondary side of the entire circuit, which corresponds to the absolute voltage of B1 approximately. By means of this signal, the measuring branch of the secondary side measuring voltage divider, which arises from the two resistors R2 and R14 as well as the transmitting diode of the first opto-coupler, is partially bypassed by means of the receiving transistor of the second optocoupler. As a result, the smaller the voltage at B1, the greater the weighting of an increase in the B2 voltage, and vice versa. Due to this negative feedback, a comparative voltage measurement is possible even across potential limits. The galvanic isolation is thus realized optically via the optocouplers, but the circuit arrangement otherwise works in the same way as in 6a described circuit arrangement.

Figuratively speaking, the lower voltage measuring resistor R2 includes in the second embodiment already described above 4 , or just as in the third embodiment 6a , twice the lower reference resistance R6. These two components are now replaced by the just-proposed negative feedback optocoupler circuit, so that in a first approximation for 6b results: R2 = R1.

This is based, firstly, that the current in galvanically connected voltage divider according to 4 or 6a and, neglecting the back-coupling current by R3 and the base current for T7, respectively, by the two resistors R1 and R2, and, secondly, counting one part with value of R6 to the converter cell input side, the second part with value R6 to the converter cell output side becomes. This creates the prerequisite for the just proposed replacement of these components by the optocoupler circuit. Since the measurement is part of the feedback, its output side must be placed on the input side of the converter cell, so as described above on the side with the negative pole of the entire accumulator whose measuring or input side, however, on the output side of the converter cell, so according to the Page with the positive pole of the entire accumulator. Analogous to the current mirror, the measurement side is characterized by a node which is voltage-fixed by a forward voltage of a semiconductor involved in the measurement circuit and into which a current flows: this is the node between R2 and the collector of the receive transistor of the negative feedback opto-coupler OK2 inserted in it incoming current is determined by the voltage drop across the lower measuring resistor R2. The voltage defining this node is the forward voltage of the transmitting diode of the measuring optocoupler OK1. If this is significantly greater than 0.7 V, for example 1.4 V, the value of R14 can be set to zero, ie this resistance can be replaced by a short circuit. This simplification is assumed below. In contrast, the output side of this measurement circuit must have open-collector characteristic, which is particularly advantageous realized by the above-described series connection of the elements of the two opto-couplers involved in the measurement. The upper measuring resistor R1 works as a "pull-up" and defines in this function a current with which the current measurable by R2 can be compared. In the following I1 as a current through the upper measuring resistor R1, I2 as a current through the lower measuring resistor R2, ß as current amplification for both optocouplers OK1 and OK2, Im as a measuring current through the transmitting diode of OK1, Igg as a negative feedback current through the receiving transistor of OK2, and as already mentioned R14 = 0. Accordingly, apply ß · Im = I1, IgG = βI1, and I2 = Im + Igg = I1 / β + β · I1 = (1 / β + β) · I1.

To represent the dependence according to the measuring direction described above, the last equation has yet to be changed: I1 = (ß · I2) / (1 + beta ^2).

In contrast to the transistors with very high current amplifications, which are common in current mirrors, the value of β for both optocouplers is approximately equal to 1. Therefore, it is worth taking a closer look at the function fM (ß) of the measurement gain I1 / I2: I1 / I2 = fM (β) = β / (1 + β ² ).

For very small values of β, the graph of this function corresponds to the bisector of the coordinate origin, for very large values of β the hyperbola of 1 / β. The derivative of fM (ß) with ß is calculated too df M (β) / dβ = (1-β ² ) / (1 + β ² ) ² .

This is zero for β = 1: at this point there is a local maximum of the measurement gain f M (β) with the value 1/2, i. at a β in the vicinity of 1, the measurement gain practically does not depend on the exact value of β and is 0.5. At ß ~ 1 I1 is therefore always half of I2.

With current amplification ß << 1 the dependence on the value of ß predominates, so the measurement becomes more tolerance dependent with very small current amplifications. With current amplifications ß> 1, this tolerance problem is less, because the right branch of the hyperbola already described above from the function fM (ß) runs almost horizontally.

Thus, the initial hypothesis R1 = R2 must be refined accordingly, since the assumption I1 = I2 no longer holds. Instead, the resistance values are calculated according to the formula R2 / R1 = I1 / I2 = fl / (1 + beta ^2).

R1 is thus to be selected approximately twice as high as R2 or according to the actual value of the optocoupler current amplification β. The final touch is given to the measuring circuit when the value of R1 is reduced by the amount required to compensate for the forward voltage of the transmitting diode of the negative feedback optocoupler OK2.

7 shows the off 4 known second embodiment of the control circuit in a converter cell with galvanically isolated center pole, ie with galvanically completely separate output side, and with a voltage measurement that detects only the voltage of the energy-emitting cell and compares it with a fixed threshold. This fixed threshold is formed by Vref, fed by R1, and fed via R20 to the positive input of the sense amplifier U3. R20 is necessary in order to achieve the above-mentioned positive feedback with clocking of the converter cell by means of R5 and C1, which is necessary in order to compensate for the voltage dip and rise in both energy stores in transhipment. The remainder of the circuit including all associated functions corresponds to the 4 ,

8th describes the 4 known second embodiment of the control circuit in a converter cell for two completely galvanically isolated energy storage with equally galvanically isolated voltage measurement, but still compares the cell voltages by means of a first optocoupler OK1 and a second optocoupler OK2 with each other. Function and description of this galvanically isolated comparative voltage measurement are with the 6b identical, except that here at the node between the input diode of the second optocoupler OK2 and the receiving transistor of the first optocoupler OK1 instead of the base of T7, the negative input of the input measuring amplifier U3 and its negative feedback resistor R3 are connected.

The previously described embodiments of the control circuit are all constructed analogously. Of course, it is also possible to control the control circuit digitally e.g. build up by means of a microcontroller, and perform the voltage measurements via analog / digital converter. For the control of the switching transistor, a driver stage may be necessary.

LIST OF REFERENCE NUMBERS

BP

reference potential

Bx

Energy storage or cell B1, B2, B3, B4

C1

Capacitor for the positive feedback time constant

C2

Decoupling capacitor for driving the gate driver so that the converter cell transistor is turned on

C3

Decoupling capacitor for driving the gate driver so that the converter cell transistor is turned off

C4

Output smoothing capacitor of the converter cell

C10

Reserve capacitor for quasi-ZVS detection

Ctl

Control circuit for a considered converter cell

dx

Output or rectifier diode D1, D2, D3, D4 of the converter cell x

D10

Clamping diode at the negative input of the current measuring comparator

OK1

Messoptokoppler

OK2

Gegenkopplungsoptokoppler

Rx1

Upper voltage measuring resistor R1, R21, R31, R41

Rx2

Lower voltage measuring resistor R2, R22, R32, R42

R3

Negative feedback resistance of the cell voltage measurement

rx4

Upper reference resistor R4, R44

Rx5

Coupling resistor R5, R45 for forming a Schmitt-trigger characteristic

Rx6

Lower reference resistor R6, R46

R7

Upper threshold resistance

R8

Lower threshold resistance

R9

PWM or gate driver output resistance

R10

Drain voltage measuring resistor

R11

Upper turn-off threshold resistance

R12

Lower turn-off threshold resistance

R13

Gate discharge resistor

R14

Negative feedback resistor on the converter output side with potential-separated comparative voltage measurement

R15

Upper gate driver discharge resistor

R16

Lower gate driver discharge resistor

R17

Gate driver Einschaltgegenkoppelwiderstand

R18

Current mirror input emitter resistor

R19

Current mirror output emitter resistor

R20

Voltage measuring series resistance

R43

Current sink load resistance

R48

Current sink counter coupling resistor

Sx

Converter cell power switching transistor T1, T2, T3, T4

T1

Differential amplifier transistor at the positive input

T2

Differential amplifier transistor at the negative input

T3

Current mirror output transistor

T4

Current mirror input transistor

T5

Upper gate driver transistor

T6

Lower gate driver transistor

T7

measuring transistor

Trx

Transformer or power transformer Tr1, Tr2, Tr3, Tr4 of the converter cell x

U1

Current measuring comparator, which also generates the PWM

U2

Flow control comparator

U3

Input (-vergleichs-) measuring amplifier

V1

attenuated and centered output voltage of the current measuring comparator U1

V2

Output voltage of the input measuring amplifier U3

Vb1

Cell voltage of the energy storage to be discharged

Vb2

Cell voltage of the energy storage to be charged

VG

Gate voltage of the converter cell power transistor S1

VK

Potential of the output of the discretely constructed comparator input stage

Vn

Voltage at the negative input of U3

Vo

stop threshold

voff

Reference voltage at the positive input of U1

vp

Voltage at the positive input of U3 or at the base of T7, at the same time reference potential for the entire control

VS

Drain potential of the converter cell transistor S1

Vu

start threshold

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited patent literature

• US 6356055 B1 [0005]

Cited non-patent literature

• http://en.wikipedia.org/wiki/stream_mirror [0078]

Claims (15)

Circuit arrangement for equalizing the state of charge of serially interconnected energy stores (B1, B2, ..., Bn) of an accumulator having the following features: The circuit arrangement has at least one converter cell, which is connected in parallel with two energy stores each from the composite of the accumulator, Each converter cell has a transformer (Tr1, Tr2,...) Or a storage inductance, a single diode (D1, D2,...) And a single switch (S1, S2,. Connected in parallel to a first energy store (B1) is a series connection of the switch (S1) and the storage inductance or the primary winding of the transformer (Tr1) whose ends form the input of the converter cell, A series circuit of the diode (D1) and the storage inductance or the secondary winding of the transformer (Tr1) is connected in parallel with a series-connected second energy store (B2) whose ends form the output of the converter cell, The switch is controlled by a control circuit (Ctl), - The control circuit (Ctl) of each converter cell operates autonomously by itself, and is not connected to the control circuits of other converter cells. Circuit arrangement according to claim 1, characterized in that the control circuit uses the potential between the first (B1) and the second (B2) energy storage as reference potential (BP) and the two potentials of the other poles of the first (B1) and second (B2) energy storage uses as control voltages. Circuit arrangement according to claim 1, characterized in that the control circuit (Ctl) compares the voltage of the first energy store (B1) with that of the second energy store (B2), and in that this comparison measurement via two optocouplers (OK1, OK2), the Wilson Current mirror are coupled, is performed. Circuit arrangement according to claim 3, characterized in that the two optocouplers (OK1, OK2) are connected such that a series circuit of the receiving transistor of the first optocoupler (OK1) and the transmitting diode of the second optocoupler (OK2) coupled to the first energy store (B1) is and that a parallel circuit of the receiving transistor of the second optical coupler (OK2) and the transmitting diode of the first optical coupler (OK1) to the second energy storage device (B2) is coupled. Circuit arrangement according to claim 1, characterized in that the converter cell is designed as a boost converter, which takes energy from the second energy store (B2) and transfers it into the first energy store (B1). Circuit arrangement according to claim 1, characterized in that the converter cell is designed as Drosselelinverswandler, which takes the first energy store (B1) energy and transferred to the second energy store (B2). Circuit arrangement according to claim 1, characterized in that the converter cell is designed as a galvanically isolated flyback converter or flyback converter which takes energy from the first energy store (B1) and transfers it to the second energy store (B2). Circuit arrangement according to claim 1, characterized in that the control circuit (Ctl) drives the converter with a pulse width modulation. Circuit arrangement according to claim 1, characterized in that the control circuit is constructed analogously. Circuit arrangement according to claim 1, characterized in that the control circuit (Ctl) is constructed digitally. Circuit arrangement according to Claim 1, characterized in that the first energy store (B1) is the energy store with the lowest potential in the accumulator and the second energy store (B2) is the energy store with the highest potential in the accumulator. Method for equalizing the state of charge of serially connected energy stores, characterized in that it uses a circuit arrangement according to one of claims 1 to 11. A method according to claim 12, characterized in that the converter cell is turned on when the difference between the two measured by the control circuit energy storage voltages (V _b1 , V _b2 ) exceeds a predetermined first value. A method according to claim 12 or 13, characterized in that the converter cell is turned off when the difference between the two measured by the control circuit energy storage voltages (V _b1 , V _b2 ) falls below a predetermined second value. A method according to claim 12, characterized in that the converter cell is turned on when the voltage of the first Energy storage (V _b1 ) exceeds a first value, and is turned off again when the voltage of the first energy storage (V _b1 ) _falls below a second value.

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