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Publication numberCN1672244 A
Publication typeApplication
Application numberCN 03817714
PCT numberPCT/US2003/017730
Publication date21 Sep 2005
Filing date5 Jun 2003
Priority date5 Jun 2002
Also published asCN100511594C, EP1518263A1, US7135421, US7554161, US20030227033, US20050023624, WO2003105205A1
Publication number03817714.5, CN 03817714, CN 1672244 A, CN 1672244A, CN-A-1672244, CN03817714, CN03817714.5, CN1672244 A, CN1672244A, PCT/2003/17730, PCT/US/2003/017730, PCT/US/2003/17730, PCT/US/3/017730, PCT/US/3/17730, PCT/US2003/017730, PCT/US2003/17730, PCT/US2003017730, PCT/US200317730, PCT/US3/017730, PCT/US3/17730, PCT/US3017730, PCT/US317730
InventorsKY阿恩, L福尔贝斯
Applicant微米技术有限公司
Export CitationBiBTeX, EndNote, RefMan
External Links: SIPO, Espacenet
Hafnium-aluminum oxide dielectric films
CN 1672244 A
Abstract  translated from Chinese
一种含HfAlO Containing HfAlO
Claims(42)  translated from Chinese
1.一种形成电子器件的方法,它包含:将含铪前体脉冲输入装有衬底的反应室;和将含铝前体脉冲输入反应室以形成介质薄膜。 A method of forming an electronic device, comprising: a hafnium-containing precursor pulse input reaction chamber containing the substrate; and aluminum-containing precursors enter the reaction chamber to form a pulse dielectric film.
2.权利要求1的方法,其中将含铪前体脉冲输入装有衬底的反应室,和将含铝前体脉冲输入反应室,它们均是原子层沉积法的单元。 The method of claim 1, wherein the hafnium-containing precursor pulse input of the reaction chamber containing the substrate, and an aluminum-containing precursor to the reaction chamber pulse input, all of which are units of atomic layer deposition method.
3.权利要求1或2的方法,其中形成电子器件包括形成晶体管,这方法进一步包括:在衬底上形成第一和第二源/漏区;在第一和第二源/漏区之间形成主体区;将含铪前体脉冲输入反应室和将含铝前体脉冲输入反应室以便在位于在第一和第二源/漏区之间的主体上形成介质薄膜;和使栅与介质薄膜耦合。 3. The method of claim 1 or claim 2, wherein forming an electronic device includes forming a transistor, which method further comprises: forming a first and second source / drain regions in the substrate; between the first and second source / drain region forming a body region; hafnium-containing precursor pulse input of the reaction chamber and the aluminum-containing precursor pulse input reaction chamber to form a thin film on the medium located between the first and second source / drain regions of the body; and the gate and the medium film coupling.
4.权利要求1或2的方法,其中形成电子器件包括形成存储器,它至少有一个这样的存取晶体管,它在位于第一和第二源/漏区之间的主体区上有一层含HfAlO3的薄膜,其中形成这薄膜包括脉冲输送含铪前体和脉冲输送含铝前体。 4. The method of claim 1 or claim 2, wherein forming an electronic device includes forming a memory, such that at least one access transistor, which has in the main body region of the first and second source / drain regions of a layer containing HfAlO3 The film, in which the formation of these films include pulsed hafnium-containing precursor and an aluminum-containing precursor pulsing.
5.权利要求4的方法,其中该方法进一步包括形成若干个存取晶体管;形成若干条字线,它们与存取晶体管数目相同的若干个栅相耦合;形成若干条源线,它们与存取晶体管数目相同的若干个第一源/漏区相耦合;形成若干条位线,它们与存取晶体管数目相同的若干个第二源/漏区相耦合。 The method of claim 4, wherein the method further comprises forming a plurality of access transistors; forming a plurality of word lines, and they are the same number of a plurality of access transistors coupled to the gate; forming a plurality of source lines, they access the same number of transistors of a plurality of first source / drain region coupled; forming a plurality of bit lines, the number of access transistor are the same number of second source / drain region coupled.
6.权利要求1或2的方法,其中形成电子器件包括形成电子系统,该电子系统则包括:有一个处理机;使存储器与处理机相耦合,其中存储器或处理机之一至少有一个这样的晶体管,它在位于第一和第二源/漏区之间的主体区上有一层含HfAlO3的薄膜,这种含HfAlO3的薄膜通过将含铪前体脉冲输入反应室和将含铝前体脉冲输入反应室的方法形成;和形成系统总线,该总线使处理器与存储器阵列相耦合。 6. The method of claim 1 or claim 2, wherein forming an electronic device includes forming an electronic system, the electronic system includes: a processor has; make a memory coupled to the processor, wherein the memory or one of the at least one such processor transistor having a layer comprising a film HfAlO3 in the main body region of the first and second source / drain regions on this film by HfAlO3 of containing hafnium containing precursor pulse input reactor chamber and the aluminum-containing precursor pulse Input method for forming the reaction chamber; and forming system bus that allows the processor coupled to the memory array.
7.权利要求1,2,3,4,或6的方法,其中将含铪前体脉冲输入反应室,随后将第一含氧前体脉冲输入反应室,然后将含铝前体脉冲输入反应室,接着将第二含氧前体脉冲输入反应室。 The aluminum-containing precursor is then reacted pulse input 1,2,3,4, or 7. The method of claim 6, wherein the hafnium-containing precursor pulses fed to the reaction chamber, followed by the first oxygen-containing precursor pulse input chamber, room, and then the second oxygen-containing precursor pulse input reaction chamber.
8.权利要求7的方法,其中脉冲输送第一含氧前体包括脉冲输送水蒸气。 The method of claim 7, wherein the first oxygen-containing precursor pulsing includes pulsing water vapor.
9.权利要求7的方法,其中脉冲输送第二含氧前体包括脉冲输送蒸镏水蒸气。 The method of claim 7, wherein the pulsing of the second oxygen-containing precursor comprises pulsing steam distillation.
10.权利要求7的方法,其中脉冲输送第二含氧前体包括脉冲输送氧。 10. The method of claim 7, wherein the pulsing of the second oxygen-containing precursor comprises pulsing oxygen.
11.权利要求1,2,3,4,或6的方法,其中按照预定的周期对将每种前体脉冲输入反应室加以控制,预定的周期则根据被脉冲输入反应室的每种前体分别地加以确定。 3, 4, or 11. The method of claim 6, wherein the predetermined period of each precursor pulse input to control the reaction chamber, the predetermined period according to the pulse input of each precursor is the reaction chamber It is determined separately.
12.权利要求1,2,3,4,或6的方法,其中该方法进一步包括,使衬底保持在根据每次脉冲输送的前体选定的温度下,这选定的温度根据脉冲输送的每种前体独立地设定。 3, 4, or 12. The method of claim 6, wherein the method further comprises, according to the substrate is maintained at each pulsing of a precursor selected temperature, according to which the selected temperature pulsing set independently of each precursor.
13.权利要求1,2,3,4,或6的方法,其中在每次脉冲输送前体之后,接着用吹洗气体吹洗反应室。 The method of claim 1, 2, or wherein after each pulse before the transport body, followed by the purge gas purged the reaction chamber.
14.权利要求1,2,3,4,或6的方法,其中该方法进一步包括重复进行若干次脉冲输送含铪前体和含铝前体的循环。 3, 4, or method of claim 6, wherein the method further comprises repeating the cycle several times pulsing a hafnium-containing precursor and an aluminum-containing precursor.
15.权利要求14的方法,其中在重复进行许多次脉冲输送含铪前体和含铝前体循环之后,接着在约300℃~约800℃的温度下进行退火处理。 15. The method of claim 14, wherein after repeated hafnium-containing precursor and an aluminum-containing precursor pulsing cycle many times, and then at a temperature of about 300 ℃ ~ about 800 ℃ of annealing.
16.权利要求1,2,3,4,或6的方法,其中该方法进一步包括独立地控制每种前体的脉冲周期的时间,被脉冲输送到衬底上的前体的次数,和衬底的温度,以便形成含HfAlO3的介质薄膜,这介质薄膜具有的介电常数为约9~约25。 The method of claim 1, 2, or wherein the method further comprises independently controlling each precursor pulse period of time, is the number of pulses supplied to the precursor on the substrate, and the substrate bottom temperature, to form a dielectric film containing HfAlO3, which dielectric film having a dielectric constant of about 9 to about 25.
17.权利要求16的方法,其中形成含HfAlO3的介质薄膜包括形成一种基本上是HfAlO3的薄膜。 17. The method of claim 16, wherein the dielectric film is formed containing HfAlO3 comprises forming a substantially HfAlO3 the film.
18.权利要求1,2,3,4,或6的方法,其中脉冲输送含铪前体包括脉冲输送HfCl4前体。 3, 4, or 18. The method of claim 6, wherein the pulsing a hafnium-containing precursor comprises pulsing HfCl4 front thereof.
19.权利要求18的方法,其中将HfCl4前体脉冲输入反应室是在使衬底的温度保持在约350℃~约550℃的条件下进行的。 19. The method of claim 18, wherein the precursor pulse input HfCl4 reaction chamber in the substrate temperature is maintained at about 350 ℃ ~ about 550 ℃ carried out.
20.权利要求18的方法,其中将HfCl4前体脉冲输入反应室是在HfCl4前体的温度为约130℃~约154℃的条件下进行的。 20. The method of claim 18, wherein the precursor pulse input HfCl4 the reaction chamber at a temperature HfCl4 precursor under conditions of about 130 ℃ ~ 154 ℃ carried about.
21.权利要求18的方法,其中该方法进一步包括在脉冲输送HfCl4前体之后,以约0.5mPam3/秒~约1.0mPam3/秒的流速将第一含氧前体脉冲输入反应室。 21. The method of claim 18, wherein the method further comprises, after pulsing prior HfCl4 body about 0.5mPam3 / sec to about 1.0mPam3 / sec flow rate of oxygen-containing body before the first pulse is fed to the reaction chamber.
22.权利要求1,2,3,4,或6的方法,其中脉冲输送含铝前体包括将三甲基铝前体脉冲输入反应室。 3, 4, or 22. The method of claim 6, wherein the aluminum-containing precursor comprises pulsing trimethyl aluminum precursor pulse input of the reaction chamber.
23.权利要求22的方法,其中将三甲基铝前体脉冲输入反应室是在使衬底温度保持在约350℃~约370℃的条件下进行的。 23. The method of claim 22, wherein the precursor is trimethyl aluminum pulse input is in the reaction chamber so that the substrate temperature was kept at about 350 ℃ ~ 370 ℃ carried about.
24.权利要求22的方法,其中将三甲基铝前体脉冲输入反应室是在压力约为230m托的条件下进行的。 24. The method of claim 22, wherein the precursor is trimethyl aluminum pulse input is carried out in a reaction chamber under a pressure of about 230m Torr conditions.
25.权利要求1,2,3,4,或6的方法,其中脉冲输送含铝前体包括将DMEAA前体脉冲输入反应室。 3, 4, or 25. The method of claim 6, wherein the aluminum-containing precursor comprises pulsing the pulse input body front DMEAA reaction chamber.
26.权利要求25的方法,其中将DMEAA前体脉冲输入反应室是在使衬底温度保持在约350℃~约550℃的条件下进行的。 26. The method of claim 25, wherein the precursor pulse input DMEAA reaction chamber is maintained at the substrate temperature at about 350 ℃ ~ about 550 ℃ carried out.
27.权利要求25的方法,其中将DMEAA前体脉冲输入反应室是在压力约为30m托的条件下进行的。 27. The method of claim 25, wherein the DMEAA precursor pulse is fed to the reaction chamber at a pressure of about 30m Torr conditions.
28.权利要求1,2,3,4,或6的方法,其中脉冲输送含铪前体包括脉冲输送HfCl4前体入反应室而脉冲输送含铝前体包括将三甲基铝前体脉冲输入反应室。 3, 4, or 28. The method of claim 6, wherein the pulsing a hafnium-containing precursor comprises pulsing HfCl4 precursor pulsed into the reaction chamber and the aluminum-containing precursor comprises trimethylaluminum precursor pulse input the reaction chamber.
29.权利要求28的方法,其中在将三甲基铝前体脉冲输入反应室之后,接着用氩气吹洗反应室。 29. The method of claim 28, wherein after trimethyl aluminum precursor pulse input of the reaction chamber, and then purged with argon gas chamber.
30.权利要求1,2,3,4,或6的方法,其中脉冲输送含铪前体包括脉冲输送HfCl4前体入反应室和脉冲输送含铝前体包括将DMEAA前体脉冲输入反应室。 3, 4, or 30. The method of claim 6, wherein the pulsing a hafnium-containing precursor comprises pulsing body front HfCl4 pulsed into the reaction chamber and the aluminum-containing precursor comprises a precursor pulse input DMEAA reaction chamber.
31.权利要求28或30的方法,其中在将HfCl4前体脉冲输入反应室之后,接着用纯净氮气吹洗反应室。 31. The method of claim 28 or claim 30, wherein after the pulse input HfCl4 precursor reaction chamber, followed by a nitrogen purge of the reaction chamber clean.
32.权利要求30的方法,其中在将DMEAA前体脉冲输入反应室之后,接着用氢气吹洗反应室。 32. The method of claim 30, wherein after the pulse input DMEAA precursor reaction chamber, purged with hydrogen and then the reaction chamber.
33.一种用权利要求1,2,3,4,6,18,22,25,28,或30的方法形成的电子器件。 33. A claim by 1,2,3,4,6,18,22,25,28, method, or an electronic device 30 formed.
34.一种电子器件,它包含:至少一个晶体管,它具有一个位于第一和第二源/漏区之间的主体区,一层形成在主体区上的介质薄膜,和一个与该介质薄膜相耦合的栅;其特征在于介质薄膜含有原子层沉积型HfAlO3。 34. An electronic device, comprising: at least one transistor having a body region located on the first and second source / drain regions, a layer of dielectric film is formed on the body region, and a film of the medium coupled to the gate; wherein the dielectric film comprises atomic layer deposition type HfAlO3.
35.权利要求34的电子器件,其中这电子器件是存储器。 35. The electronic device of claim 34, wherein the electronic device which is a memory.
36.权利要求35的电子器件,其中这存储器进一步包括:若干个存取晶体管;若干条字线,它们与存取晶体管数目相同的若干个栅相耦合;若干条源线,它们与存取晶体管数目相同的若干个第一源/漏区相耦合;若干条位线,它们与存取晶体管数目相同的若干个第二源/漏区相耦合。 36. The electronic device of claim 35, wherein that the memory further comprises: a plurality of access transistors; a plurality of word lines, the same number they plurality of access transistors coupled to the gate; a plurality of source lines, they access transistor the same number of a plurality of first source / drain region coupled; a plurality of bit lines, the number of access transistor are the same number of second source / drain region coupled.
37.权利要求34的电子器件,其中这电子器件是一种具有与存储器相耦合的处理机的电子系统。 37. The electronic device of claim 34, wherein the electronic device which is an electronic system having a memory coupled to the processor.
38.权利要求34,35,或37的电子器件,其中介质薄膜包括Al2O3和HfO2。 38. Claim 34, 35, or 37 of the electronic device, wherein the dielectric film comprises Al2O3 and HfO2.
39.权利要求34,35,或37的电子器件,其中介质薄膜基本上是非晶形的。 39. Claim 34, 35, or 37 of the electronic device, wherein the dielectric film is substantially amorphous.
40.权利要求34,35,或37的电子器件,其中介质薄膜具有的介电常数为约9~约25。 40. Claim 34, 35, or 37 of the electronic device, wherein the dielectric film having a dielectric constant of about 9 to about 25.
41.权利要求34,35,或37的电子器件,其中介质薄膜具有的等效氧化物厚度(teq)为约3埃~约12埃。 34, 35, or 41. The electronic device of claim 37, wherein the dielectric film having an equivalent oxide thickness (teq) of about 3 angstroms to about 12 angstroms.
42.权利要求34,35,或37的电子器件,其中介质薄膜具有的等效氧化物厚度(teq)小于3埃。 34, 35, or 42. The electronic device of claim 37, wherein the dielectric film having an equivalent oxide thickness (teq) of less than 3 Angstroms.
Description  translated from Chinese
氧化铪铝介质薄膜 Hafnium oxide dielectric thin film of aluminum

相关申请本申请与以下的,共同未决的,共同转让的申请有关,这些有关申请在此引入作参考:美国申请号10/137499,代理卷号1303.050US1标题:“用作栅介质的原子层沉积LaAlO3薄膜”,美国申请号10/137058,代理卷号303.802US1标题:“原子层沉积和转化”,美国申请号10/137168,代理卷号1303.048US1标题:“利用ULSI栅原子层沉积法形成的,用作栅介质层的AlOx原子层”和美国申请号09/797324,代理卷号303.717US1标题:“均匀化学气相沉积法所采用的方法,系统,和设备”。 RELATED APPLICATIONS This application is related to the following, co-pending, commonly assigned application related to these related applications are herein incorporated by reference: US Application No. 10/137499, Attorney Docket No. 1303.050US1 headline: "The atomic layer used as the gate dielectric LaAlO3 film deposition, "US Application No. 10/137058, Attorney Docket No. 303.802US1 headline:" atomic layer deposition and transformation ", US Application No. 10/137168, Attorney Docket No. 1303.048US1 headline:" ULSI gate formed by atomic layer deposition method and used as the gate dielectric layer AlOx atomic layer "and U.S. Application No. 09/797324, Attorney Docket No. 303.717US1 title:" Uniform chemical vapor deposition method used, systems, and equipment. "

发明领域本发明涉及半导体器件和器件的制作。 Field of the Invention The present invention relates to semiconductor devices and device fabrication. 特别是,本发明涉及晶体管器件的栅介质层和它们的制作方法。 In particular, the present invention relates to a gate dielectric layer transistor devices and their production methods.

发明背景半导体器件制造业有着驱使其需要改善速率性能,改善其低静态(静止态)功率要求和适应对硅基微电子产品的各式各样的电源要求及输出电压要求等方面的市场需求。 Background of the Invention Semiconductor manufacturing industry has driven the need to improve its rate performance, improve its low quiescent (resting state) power requirements and meet the market demand for silicon-based microelectronic products of all kinds of power requirements and output voltage requirements and so on. 尤其是在晶体管制作中,有着面临要求减小器件例如晶体管尺寸的持续压力。 Especially in transistor production, it has faced continued pressure required to reduce the size of devices such as transistors. 最终的目的是制作出越来越小的和更可靠的集成电路(IC)供在例如信息处理机芯片,移动电话机或存储器例如DRAM等产品中使用。 The ultimate goal is to produce ever smaller and more reliable integrated circuit (IC) for use in the information processor chip, for example, a mobile phone or a memory such as DRAM and other products. 较小的器件经常是由蓄电池供电,故也面临要求减小蓄电池尺寸和延长电池充电之间的时间的压力的处境。 Smaller devices are often powered by the battery, it is also faced with requirements to reduce the battery size and extend the time between battery charging pressure of the situation. 这促使工业界不仅要设计更小的晶体管而且要将它们设计成能在较低的电源下可靠工作。 This prompted the industry not only to design smaller transistors and which are designed to work reliably in low supply.

目前,半导体工业有赖于减小或按比例缩小基本器件,主要是硅基金属氧化物半导体场效应晶体管(MOSFET),的尺寸的能力。 Currently, the semiconductor industry relies substantially reduced or scaled devices, primarily the ability of the silicon metal-oxide semiconductor field effect transistor (MOSFET), size. 这一类晶体管的常见构型示于图1。 Frequently this type of transistor configuration shown in Fig. 虽然以下的讨论应用了图1来阐明利用现有技术制造的晶体管,但本领域的每一位技术人员都承认可以将本发明引入图1所示晶体管中,以制成与本发明相应的新型晶体管。 Although the following discussion of the application of FIG. 1 to illustrate the use of existing technology to produce transistors, but every skill in the art will recognize the present invention may be introduced into the transistor shown in Figure 1, the present invention is to produce a corresponding new transistors. 晶体管100用通常为硅的衬底110制成,但也可以用其它的半导体材料制成。 Transistor 100 is generally made of a silicon substrate 110, but may also be made of other semiconductor materials. 晶体管100具有第一源极/漏极区120和第二源极/漏极区130。 Transistor 100 has a first source / drain region 120 and the second source / drain region 130. 主体区132位于第一源极/漏极区和第二源极/漏极区之间,此处的主体区132定义了具有沟道长度134的晶体管沟道。 Body region 132 located between the first source / drain region and a second source / drain region between the body region 132 here defines a channel having a channel length of the transistor 134. 栅介质,或栅氧化物140位于主体区132内,而栅150位于栅介质的上方。 Gate dielectric, or gate oxide 140 is located within the body region 132, and gate 150 located above the gate dielectric. 虽然栅介质可以是由氧化物之外的材料形成,但栅介质通常是氧化物,并常称为栅氧化物。 Although gate dielectric may be formed of a material other than an oxide, it is usually an oxide gate dielectric, and is often referred to as a gate oxide. 栅可以用多晶硅制成,或用其它导电材料制成例如可以使用金属。 A gate made of polycrystalline silicon can be used, or other conductive material such as metal may be used.

为了制造尺寸更小的和能在较低电源下可靠地工作的晶体管,一个重要的设计标准是栅介质140。 In order to produce a smaller size and can operate reliably at lower power supply transistor, an important design criterion is the gate dielectric 140. 形成栅介质的主角是二氧化硅SiO2。 Protagonist forming a gate dielectric is silicon dioxide SiO2. 热生长非晶形SiO2层是一种电和热力稳定材料,在SiO2层与底层Si的界面处形成了高质量的界面以及上佳的电绝缘性能。 Thermally grown amorphous SiO2 layer is an electrical and heat stable material, SiO2 layer at the interface with the underlying Si forms a high-quality interface and excellent electrical insulating properties. 在典型的加工过程中,在Si上使用SiO2会造成缺陷电荷密度,其量级为1010/cm2,中间带隙界面态密度约为1010/cm2eV,和击穿电压在15MV/cm范围内。 In a typical process, the use of the Si SiO2 cause defect charge density on the order of 1010 / cm2, the intermediate band-gap interface state density of about 1010 / cm2eV, and the breakdown voltage in the 15MV / cm range. 就这样的质量而言,没有明显看出需要使用除SiO2之外的材料,但是栅介质的定标的提高和其它要求会产生需要寻找用作栅介质的其它介质材料。 So the quality is concerned, there is no apparent need to use materials other than SiO2, but scaled gate dielectric enhancement and other requirements will have the need to find other medium used as the gate dielectric material.

所需要的是这样一种替代介质材料,它可用来形成具有较之SiO2有高介电常数的栅介质和相对于硅是热力稳定的,以致在硅层上形成介质时不会导致有SiO2形成或使来自底层硅层的材料例如掺杂剂扩散到栅介质中。 What is needed is such an alternative dielectric material, which may be used to form a high dielectric constant than SiO2 gate dielectric, and with respect to silicon is heat stable, so as to form a silicon layer on the medium has not lead to the formation of SiO2 or the material from the underlying silicon layer such as dopant diffusion into the gate dielectric.

发明概述在本发明所讲授的实施方案中论述了解决以上所述问题的方法。 Summary of the Invention discuss a solution to the problem described above in the present invention teaches embodiment. 在一种实施方案中,一种在晶体管主体区上形成栅介质的方法包括在晶体管主体区上进行含HfAlO3非晶形薄膜的原子层沉积(ALD)。 Methods In one embodiment, a method of forming the gate dielectric of the transistor body region including atomic layer deposition (ALD) HfAlO3 containing an amorphous thin film transistor body region. 形成HfAlO3薄膜所采用的ALD方法是将含铪前体脉冲输入装有衬底的反应室,将第一含氧前体脉冲输入反应室,将含铝前体脉冲输入反应室,最后将第二含氧前体脉冲输入反应室。 ALD method for forming a thin film HfAlO3 employed is hafnium-containing precursors reaction chamber containing a substrate of the input pulse, the first pulse input oxygen-containing precursor the reaction chamber, the aluminum-containing precursor pulse input chamber, and finally the second oxygen-containing precursor pulse input reaction chamber. 每种前体根据所选定的时间周期被脉冲输入反应室。 Each precursor according to the selected time period is the pulse input of the reaction chamber. 脉冲输送每种前体所用时间的长短根据所采用的前体选定。 Pulsing each precursor used in accordance with the length of time the precursor used is selected. 在每次脉冲输送前体之间将剩余的前体和反应的副产物从反应室中除去。 The remaining by-product precursors and reaction is removed from the reaction chamber between the body before each pulsing. HfAlO3薄膜的厚度通过重复进行脉冲输送含铪前体,第一含氧前体,含铝前体和第二含氧前体的循环次数来控制,直至形成要求的厚度。 HfAlO3 film thickness by repeating the thickness of the front pulsing a hafnium-containing precursor, the first oxygen-containing body, the number of cycles a second oxygen-containing aluminum precursor and a precursor to control, until a requirement.

有利之处是,由HfAlO3薄膜形成的栅介质具有比二氧化硅要大的介电常数,相对地小的漏电电流和对硅基衬底有良好的稳定性。 Advantageous, the gate dielectric film formed by the HfAlO3 larger than the silicon dioxide dielectric constant, relatively small leakage current and the silicon substrate have good stability. 本发明所讲授的各种实施方案包含形成各种晶体管,存储器,和具有含HfAlO3的介质层的电子系统。 The teachings of the present invention comprises forming the various embodiments of the various transistors, memories, and electronic systems with dielectric layers containing the HfAlO3.

其它实施方案包括适用于晶体管,存储器,和具有HfAlO3薄膜的介质栅的电子系统的各种结构。 Other embodiments include structure for a variety of transistors, memory, and has a dielectric gate film HfAlO3 electronic system. 与具有同样实体厚度的氧化硅栅相比,这类介质栅具有显著地薄的等效氧化物厚度。 Compared with silicon oxide having the same physical thickness of the gate, the gate dielectric having such significantly thinner equivalent oxide thickness. 另一方面,这类介质栅较之具有同样等效氧化物厚度的氧化硅栅具有显著地厚的实体厚度。 On the other hand, compared with the same kind of gate dielectric equivalent oxide thickness of the gate with a solid silicon oxide thickness significantly thicker.

本发明的这些和其它的实施方案,见解,优点和特点部分地陈述于随后的叙述中,和对于本领域的那些技术人员来说,部分地通过参阅下述本发明的叙述和参阅附图或通过本发明的实践而变得显而易见了。 The present invention These and other embodiments, opinion, features and advantages set forth in part in the ensuing narrative, and for those skilled in the art that, in part, by reference to the following description and to the drawings of the invention or by practice of the invention will become apparent. 本发明的这些见解,优点和特点借助于尤其是在后面所附的权利要求书中所指出的装置,程序和组合得以实现和达到。 These insights of the present invention, the advantages and features of the aid, especially in the back of the book pointed out in the appended claims, means, procedures, and combinations can be realized and attained.

附图简述图1描绘了晶体管的常见构型。 BRIEF DESCRIPTION Figure 1 depicts a common configuration transistors.

图2A描绘了一种本发明所讲授的加工HfAlO3薄膜用的原子层沉积系统的实施方案。 2A depicts an embodiment of the present invention is a process as taught HfAlO3 films atomic layer deposition system.

图2B描绘了一种本发明所讲授的加工HfAlO3薄膜用的原子层沉积室的气体分配装置的实施方案。 Figure 2B depicts an embodiment of a gas distribution apparatus of the present invention is taught with the film processing HfAlO3 atomic layer deposition chamber.

图3说明了一种本发明所讲授的HfAlO3薄膜加工方法的实施方案所采用的单元工艺流程图。 Figure 3 illustrates the unit process flow diagram of one embodiment of the present invention are taught HfAlO3 film processing methods used.

图4描绘了一种本发明所讲授的可以用来制作一种晶体管构型的图5说明了引入本发明所讲授的器件的个人用计算机的实施方案的透视图。 Figure 4 depicts a teaching of the present invention can be used to create a transistor configuration of Figure 5 illustrates a perspective view of the teachings of the present invention incorporated in a personal computer device embodiments.

图6说明了引入本发明所讲授的器件的中央处理机的实施方案的示意图。 Figure 6 illustrates a schematic view of the present invention is incorporated in the device taught in the embodiment of the central processing unit.

图7说明了本发明所讲授的DRAM存储器的实施方案的示意图。 Figure 7 illustrates a schematic diagram of the present invention are taught in an embodiment of DRAM memory.

优选实施方案详述在本发明的以下详述中,参照了形成详述一部分的附图,并为了说明,这些附图显示了可以实施本发明的具体的实施方案。 A preferred embodiment of the present invention is described in detail in the following detailed description, reference is made to the accompanying drawings forming a part of the detailed description and in order to explain these figures show the embodiment of the present invention may be specific embodiments. 对这些实施方案所作的详细陈述,足以使本领域的那些技术人员能够实施本明。 Detailed statement made to these embodiments, enough so that those skilled in the art to practice the invention. 可以应用其它的实施方案并可在不超越本发明的范围的情况下进行结构,逻辑和电学的更改。 It can be applied to other embodiments and can be changed structure, logic and electricity does not exceed in the case of the scope of the invention.

在以下叙述中使用的术语晶片和衬底包括任何具有外露面的结构,以便利用外露面形成本发明的集成电路(IC)结构。 Terms wafer and substrate used in the following description include any structure having an outer appearance in order to take advantage of external appearance form an integrated circuit (IC) structure of the present invention. 术语衬底应理解成包括半导体晶片。 The term substrate is understood to include semiconductor wafers. 术语衬底也用来指加工过程中的半导体结构,并可以包括在其上已制成的其它层。 The term substrate is also used to refer to semiconductor structures during processing, and may include other layers already formed thereon. 晶片和衬底二者均包括掺杂和非掺杂的半导体,由基底半导体或绝缘体支承的外延半导体层,以及本领域的技术人员熟知的其它半导体结构。 Both wafer and substrate include doped and undoped semiconductors, supported by a base semiconductor or insulator semiconductor epitaxial layer, and well known to those skilled in the art of other semiconductor structures. 术语导体应理解成包括半导体,而术语绝缘体或介质被定义为包括导电性比称为导体的材料要低些的任何材料。 The term conductor is understood to include semiconductors, and the term insulator or dielectric is defined to include a conductive material than the known conductor of any material are lower.

本申请中所采用的术语“水平”被定义为平行于晶片或衬底的普通的平面或表面,与晶片或衬底的取向无关。 Terminology used in this application, "horizontal" is defined as parallel to a wafer or substrate plane or surface normal, regardless of the orientation of the wafer or substrate. 术语“垂直”指的是其方向与上面所定义的水平相垂直。 The term "vertical" refers to a direction horizontal perpendicular defined above. 以位于晶片或衬底的上表面上的普通平面或表面为基准来定义表示位置的介词,例如“在上面”,“侧面”(如在侧壁上),“高于”,“低于”,“在上方”和“在下面”,与晶片或衬底的取向无关。 Ordinary plane or surface located on the upper surface of the wafer or substrate as a benchmark to define the preposition indicates the position, such as "above", "side" (as on the sidewall), "above", "below the" "above" and "below", regardless of the orientation of the wafer or substrate. 所以,以下的详述并不作出限制的含义,而本发明的范围仅由附于后面的权利要求书,以及与权利要求书所给予的范围等同的全范围来定义。 Therefore, the following detailed description is not to limit the meaning and scope of the present invention being limited only by the claims attached to the back of the claims, as well as to define the scope given the full range of equivalents of the claims.

图1的栅介质140,当其运行于晶体管中时,既有实体栅介质厚度又有等效氧化物厚度(teq)。 The gate dielectric 140 of Figure 1, when it is run on transistors, both physical gate dielectric thickness have equivalent oxide thickness (teq). 等效氧化物厚度量化了以典型的实体厚度表示的栅介质140的电气性能例如电容。 Equivalent oxide thickness of the gate dielectric quantify typical thickness entity represents 140 electrical properties, such as capacitance. teq被定义为要求其具有和已知介质同样的电容密度的一种理论上的SiO2层的厚度,而不考虑漏电电流和可靠性这些方面的问题。 teq is defined as required to have the same thickness and known dielectric SiO2 layer of a theoretical capacitance density, without regard to the leakage current and reliability problems in these areas.

沉积在Si表面上作为栅介质的厚度t的SiO2层还将有一个大于它的厚度t的teq。 Deposited on the Si surface as a gate dielectric will have a thickness t greater than its thickness t teq SiO2 layer. 这teq是由在其上沉积了SiO2的表面沟道内的电容引起的,这要归因于耗尽/反型区的形成,。 This teq by depositing a capacitance caused by surface channel within SiO2, which can be attributed to the depletion formation / inversion region. 这耗尽/反型区可导致使teq比SiO2层的厚度t大3~6埃()。 This depletion / inversion region may lead to make teq than the thickness of the SiO2 layer t big 3-6 angstroms (). 于是,总有一天,在半导体工业驱使将栅介质等效氧化物厚度按比例缩小到低于10的情况下,用作栅介质的SiO2层的实体厚度要求大概必须是大约4~7。 Then, one day, in the semiconductor industry to drive the gate dielectric equivalent oxide thickness is scaled down to less than 10 circumstances under the entity is used as the gate dielectric thickness of the SiO2 layer is required to be probably about 4 ~ 7.

对于SiO2的额外要求取决于和SiO2介质一起使用的栅电极。 For additional requirements will depend on SiO2 and SiO2 dielectric gate electrodes used with. 使用常规的多晶硅栅会导致SiO2层的teq额外增加。 Using a conventional polysilicon gate SiO2 layer will lead to an additional increase in teq. 这额外增加的厚度可通过采用金属栅电极而消除,可是,金属栅目前尚未用于互补金属氧化物半导体场效应晶体管(CMOS)工艺中。 This additional thickness of the metal gate electrode can be eliminated, however, has not yet been used for metal gate complementary metal-oxide semiconductor field effect transistors (CMOS) process. 因此,未来的器件将被设计为SiO2栅介质层的实体厚度约5或更小。 Therefore, future devices will be designed to SiO2 gate dielectric layer thickness of about 5 entity or less. 对SiO2氧化层如此小的厚度要求引起了额外的一些问题。 SiO2 oxide layer on such a small thickness requirements caused additional problems.

二氧化硅用作栅介质,部分地是由于它在SiO2-Si基结构中的电绝缘性能。 Silica is used as the gate dielectric, in part because it is electrically insulating properties in SiO2-Si-based structure. 这种电绝缘是由于SiO2的相对大的带隙(8.9eV)使它成为一种没有导电性的好的绝缘体。 This is due to the electrically insulating SiO2 relatively large band gap (8.9eV) makes it a good insulator no conductivity. 显著减小它的带隙会排除它作为一种栅介质的材料。 Significantly reduced its bandgap material would exclude it as a gate dielectric. 当SiO2层的厚度降低时,在这厚度内的原子层层数或这种材料的单层层数将下降。 When reducing the thickness of the SiO2 layer, the number of atomic layers or a single layer of such material within this thickness decreases. 在一定的厚度下,单层层数将少到足以使SiO2层不能象在较厚的或整体层中那样具有完整的原子排列。 Under certain thickness, the single layer SiO2 layer at least not enough to make a complete like that atomic arrangement in whole or thicker layers. 较之整体结构而言,不完全构造的结果是,只有一层或二层单层的薄SiO2层将不能形成全带隙。 Compared with the overall structure, the results are not fully constructed, only one or two layers of thin SiO2 layer single will not be able to form a full band gap. 在SiO2栅介质中不是全带隙会在底层Si沟道和上层多晶硅栅之间造成有效短路。 Not all the band gap can cause a short circuit between the effective underlying Si channel and the upper polysilicon gate in SiO2 gate dielectric. 这不良特性对可以按比例缩小的SiO2层的实体厚度规定了限制值。 This undesirable characteristics can be scaled down to the thickness of the SiO2 layer entity specified limit. 由于这单层效应,这最小厚度被认为是约7~8。 Since this single effect, which is considered the minimum thickness of about 7 ~ 8. 所以,对于要求teq小于约10的未来的器件来说,必需考虑除SiO2以外别的介质用作栅介质。 Therefore, the requirements for future devices teq about 10 less than it is necessary to consider other media as the gate dielectric in addition to SiO2.

对于用作栅介质的典型介质层,其电容根据适用于平行板电容的公式确定: For a typical dielectric layer used as the gate dielectric, the capacitance according to the formula applicable to the determination of a parallel-plate capacitor: 式中K是介电常数, Where K is the dielectric constant, 是自由空间的电容率,A是电容器的面积,和t是这介质的厚度。 Is the permittivity of free space, A is the area of the capacitor, and t is the thickness of that medium. 对于给定电容的将SiO2的介电常数,Kox=3.9,与teq结合的某种材料的厚度t与teq的关系如下t=(K/Kox)teq=(K/3.9)teq于是,介电常数大于SiO2的介电常数3.9的材料,其具有的实体厚度,当提供了所要求的等效氧化物厚度时,将显著地大于所要求的teq。 For a given capacitor of the SiO2 dielectric constant, Kox = 3.9, the relationship between teq combined with a material thickness t teq follows t = (K / Kox) teq = (K / 3.9) teq Thus, the dielectric SiO2 dielectric constant of the material is greater than 3.9, an entity which has a thickness of, while providing an equivalent oxide thickness required, it will be significantly greater than the required teq. 例如,具有介电常数10的替代介质材料可以具有约25.6的厚度,便可使teq为10,不计及任何耗尽/反型层效应。 For example, a dielectric material having a dielectric constant substitute 10 may have a thickness of about 25.6, will be able to make teq 10, without taking into account any depletion / inversion layer effects. 于是,通过采用具有介电常数高于SiO2的介质材料就能实现降低晶体管的等效氧化物厚度。 Thus, by using SiO2 having dielectric constant higher than the dielectric material of the transistor can be reduced to achieve an equivalent oxide thickness.

为了获得较低的晶体管工作电压和较小的晶体管尺寸而所需的较薄的等效氧化物厚度可以利用很多种材料来实现,但额外的制作要求使确定替代SiO2的合适的置换材料变得困难了。 In order to achieve a lower operating voltage and smaller transistor size of transistors required thinner equivalent oxide thickness can be used to implement a wide variety of materials, but the extra production requirements make identification of alternative SiO2 suitable replacement material becomes difficult. 微电子工业目前的观点仍然是赞成Si基器件。 The current view of the microelectronics industry is still in favor of Si-based devices. 这就要求采用的栅介质要能生长在硅衬底或硅层上,而这就对取代的介质材料设置了大量的限制。 This requires the use of the gate dielectric can be grown on a silicon substrate or silicon layer, and this set of substituted dielectric material a lot of restrictions. 介质在硅层上形成的过程中,除了所要求的介质之外,还存在有可能形成一小层SiO2的可能性。 The process medium is formed on the silicon layer, in addition to the desired medium, there is also the possibility of a small layer may be formed of SiO2. 结果实际上是一种由二层彼此平行的子层组成的介质层和在其上形成该介质的硅层。 It is actually a result of the dielectric layer parallel to each other two layers composed of sub-layers forming the dielectric and the silicon layer thereon. 在这种情况下,最终的电容是二个串联介质的电容。 In this case, the final capacitor is two capacitors connected in series medium. 因此,介质层的teq是SiO2层的厚度与所形成的介质的厚度乘以系数之和,写成teq=tSiO2+(Kox/K)t因此,如果在此过程中形成了SiO2层,那么teq再次受SiO2层的限制。 Thus, teq is the thickness of the dielectric layer thickness multiplied by the coefficient of the SiO2 layer is formed with medium and written as teq = tSiO2 + (Kox / K) t Thus, if the SiO2 layer is formed in the process, then again by teq limit SiO2 layer. 即使是在硅层和要求的介质之间有防止SiO2层形成的阻挡层,teq仍会受具有最小介电常数的那层的限制。 Even between the silicon layer and the requirements for preventing SiO2 dielectric layer formed on the barrier layer, teq limit it will have a minimum dielectric constant layer by. 可是,不管是采用了具有高介电常数的单层介质层还是采用了介电常数比SiO2高的阻挡层,与硅层面接的层必须具有高质量的界面,以保持高的沟道载流子迁移率。 However, whether using a single dielectric layer having a high dielectric constant higher than the dielectric constant or the use of a barrier layer of SiO2, into contact with the silicon layer must have a level of a high quality interface to maintain a high channel carrier mobility.

GDWilk等人的最新一篇论文发表在应用物理杂志第89卷10期第5243~5275页(2001)上,该论文讨论了用作栅介质的高介质材料的材料性能。 GDWilk et al. Paper published in the latest Journal of Applied Physics, vol. 89 10 Section 5243 - 5275 (2001), the paper discusses the material properties used as the gate dielectric of high dielectric material. 公开的资料之一是Al2O3作为SiO2的置换材料的适用性。 Public information is one of the applicability of Al2O3 SiO2 as replacement materials. 公开的Al2O3具有用作栅介质的良好的性能,例如大带隙,直至高温在Si上仍具有热力稳定性,和非晶形结构。 As disclosed Al2O3 gate dielectric having good properties, such as a large band gap, until the temperature in the Si still has thermal stability, and an amorphous structure. 此外,Wilk公开了在硅上形成Al2O3层不会导致出现SiO2界面层。 In addition, Wilk discloses the Al2O3 layer is formed on the silicon does not cause SiO2 interface layer appears. 可是,Al2O3的介电常数仅为9,其一些薄层可能具有的介电常数为约8~约10。 However, only 9 of the dielectric constant of Al2O3, some of which may have a thin layer of a dielectric constant of from about 8 to about 10. 虽然Al2O3介电常数比SiO2有改进,但仍希望栅介质采用更高的介电常数。 Although Al2O3 dielectric constant than SiO2 has improved, but still want to use a higher dielectric constant gate dielectric. Wilk所论及的其它介质及其性能如下 Wilk are addressed and other media properties are as follows

使用SiO2作为栅介质的优点之一是形成的SiO2层是一种非晶形的栅介质。 One advantage of using SiO2 as the gate dielectric is SiO2 layer is an amorphous gate dielectric. 栅介质具有非晶形结构是有利的,因为在多晶形栅介质中的晶界提供高的漏电路径。 Gate dielectric having an amorphous structure is advantageous because polymorphs gate dielectric with high grain boundary leakage paths. 另外,在整个多晶形栅介质中晶粒尺寸和取向的变化可能引起该薄膜的介电常数发生变化。 Further, the entire gate dielectric polymorphs grain size and orientation changes may cause changes in the dielectric constant of the film. 上述材料的性能包括结构都是针对呈整体状态的材料的。 Material properties of such materials include structures are present for the whole state of. 具有介电常数高于SiO2这一优点的材料也有呈结晶形态,至少呈整体构型这一缺点。 SiO2 having a dielectric constant higher than that of the material also has the advantage in crystalline form, at least this shortcoming was the overall configuration. 用来替代SiO2作为栅介质的最佳选择材料是具有高介电常数的,能将它们制作成具有非晶形状态的薄层的那些材料。 As the best choice to replace SiO2 gate dielectric material having a high dielectric constant, they can make those materials in a thin layer of amorphous state has.

在共同未决的,共同转让的美国专利申请:标题为“用作栅介质的原子层沉积LaALO3薄膜”代理卷号1303050 US1,序列号10/137499中公开了LaALO3作为SiO2的替换材料,在电子器件例如MOS晶体管中用来形成栅介质和其它介质薄膜。 In the co-pending, commonly assigned U.S. patent application: the title is "used as the gate dielectric thin films atomic layer deposition LaALO3" Attorney Docket No. 1303050 US1, serial number 10/137499 discloses LaALO3 as SiO2 replacement material in electronic devices such as MOS transistors used to form the gate dielectric film, and other media. 这份申请公开了,其中包括,应用原子层沉积法利用含镧源和含铝源在硅上形成LaALO3层。 This application discloses, including, atomic layer deposition method using lanthanum source and aluminum-containing source LaALO3 layer is formed on the silicon. 控制镧顺序沉积和铝顺序沉积便可形成这样一种栅介质,它是一种具有预定介电常数的组合物。 Lanthanum and aluminum deposition control sequence can be sequentially deposited to form such a gate dielectric, which is a composition having a predetermined dielectric constant.

在本发明所讲授的某一种实施方案中,利用原子层沉积(ALD)法,也称为原子层外延(ALE)法,使HfAlO3层沉积在硅上。 In a particular embodiment of the invention taught, using atomic layer deposition (ALD) method, also known as atomic layer epitaxy (ALE) method, so HfAlO3 layer is deposited on silicon. ALD作为化学气相沉积(CVD)的一种改进是在20世纪70年代初期开发出来的,所以也叫“交替脉冲型CVD”。 ALD as a chemical vapor deposition (CVD) is an improvement in the early 1970s developed, it is also called "alternate pulsed CVD". 在ALD中,将各种气体前体每次一种引导到放置在反应室(或反应釜)中的衬底表面上。 On ALD, the precursor gases a guide to every place in the reaction chamber (or reactor) in the substrate surface. 这些气体前体的引进采用脉冲输送每种气体前体的方式。 These precursor gases introduced by way of the gas before pulsing each body. 在各个脉冲之间用惰性气体吹洗反应室或抽空反应室。 In between each pulse with an inert gas purge reaction chamber or reaction chamber is evacuated. 在第一个脉冲相中,在前体饱和地化学吸附在衬底表面的情况下,与衬底的化学反应发生了。 In the first phase of a pulse, the precursor chemical in the case of the saturated adsorbed substrate surface, chemical reaction with the substrate occurs. 随后利用惰性气体吹洗清除反应室中剩余前体。 Then purged with an inert gas purge reaction chamber before the remaining body.

第二脉冲相将另一种前体引至衬底上,在此发生所要求的薄膜的生长反应。 The second pulse phase will lead to another precursor on the substrate, this growth response occurs in the film claims. 在薄膜生长反应之后,从反应室中清除反应的副产物和剩余前体。 After the film growth reaction, remove from the reaction chamber and the remaining by-product precursors. 在正确设计的流动式反应室内,凭借良好的前体化学性质,这些前体在衬底上积极地吸附和彼此发生反应,能在小于1秒钟的时间内进行一次ALD循环。 In a properly designed flow type reaction chamber, with a good precursor chemical nature, these precursors positively adsorbed on the substrate and the occurrence of each reaction can be carried out once ALD cycle in less than 1 second. 典型地,前体的脉冲输送时间范围从约0.5秒到约2至3秒。 Typically, precursor pulsing time ranges from about 0.5 seconds to about 2 to 3 seconds.

在ALD中,有利之处是所有反应和净化阶段处于饱和状态使生长受到自身限制。 In ALD, the advantageous of all reaction and purification stage is saturated so that growth is self-limiting. 这种自身限制式生长导致大面积的均匀性和共形性,这对于诸如平板衬底,深沟槽这类情况,并在多孔硅,和高表面面积的二氧化硅以及氧化铝粉末的加工中有着重要的应用价值。 This self-limiting growth results in a large area of formula uniformity and conformality, such that the flat substrate, the deep trench such cases, and in the processing of porous silicon and high surface area silica and alumina powders It has an important application value. 有意义的是,ALD提供了通过控制生长循环次数来控制薄膜厚度的一种直截了当的简单的方法。 Significant that, ALD provides a simple method for controlling the growth straightforward cycles by controlling the film thickness.

最初,开发ALD是为了制造场致发光显示器中所需的发光薄膜和介质薄膜。 Originally developed in order to produce ALD is a thin film electroluminescent light emitting display and a dielectric film required. 经多方努力已将ALD应用于掺杂硫化锌和碱土金属硫化物的薄膜的生长。 The various efforts have been applied to doping ALD growth of zinc sulfide and alkaline earth metal sulfide films. 另外,已研究出将ALD应用于各种各样的外延II-V和II-VI薄膜的生长,非外延的结晶或非晶形的氧化物和氮化物薄膜的生长,和这些薄膜的多层结构的形成。 Additionally, ALD has been developed to be applied to a wide variety of epitaxial growth of II-V and II-VI films, the growth of crystalline or amorphous oxide and nitride films of non-epitaxial, these multilayer structures and films formation. 还有值得感兴趣的是关于硅和锗薄膜的ALD生长,但是由于困难的前体化学,故这一努力不十分成功。 Also worthy of interest is about the ALD growth of silicon and germanium films, but because of the difficulties of precursor chemicals, it is not very successful in this endeavor.

这些前体可以是气体,液体或固体。 These precursors can be a gas, liquid or solid. 但是,液体或固体前体必须是易发挥的。 However, the liquid or solid precursor must be easy to play. 蒸气压力必须足够高以便能有效地输送质量。 Vapor pressure must be high enough to be able to efficiently deliver quality. 还有,固体前体和某些液体前体必需在反应室内加以加热并通过受热式管路将其引至衬底上。 Also, the solid precursor and some liquid precursors required to be heated in a reaction chamber and heated pipe line through which is incorporated onto the substrate. 必需的蒸气压力务必在低于衬底温度的温度下达到,以避免前体凝结在衬底上。 Always vapor pressure at a temperature below the required temperature of the substrate temperature is reached, to avoid precursor condensation on the substrate. 由于ALD的这种自身限制生长机理,对固体前体可以采用比较低的蒸气压力,虽然在此过程中由于它们的表面面积改变,蒸发速度可能有点变化。 Because of this self-limiting ALD growth mechanism, solid precursor may be employed for a relatively low vapor pressure, though in the process because of their surface area change, the evaporation rate may change somewhat.

对用于ALD的前体有一些其它要求。 Precursors for ALD has some other requirements. 这类前体在衬底温度下必须是热稳定的,因为它们的分解会破坏表面控制,并从而破坏了基于前体在衬底表面上形成反应物的ALD方法的优点。 Such precursor at a substrate temperature must be thermally stable because they will damage the surface decomposition control, and thus undermine the advantages of ALD method based reactant precursor formed on the substrate surface. 当然,如果这种分解与ALD生长相比是缓慢的,则少量分解是可以允许的。 Of course, if such decomposition is slow compared with the ALD growth, the small amount of decomposition can be tolerated.

前体应该化学吸附在衬底表面上或与表面起化学反应,虽然前体和表面之间相互作用以及吸附的机理对于不同的前体是不同的。 Chemical precursors should be adsorbed on the substrate surface or chemically react with the surface, although the mechanism of interaction between the precursor and the surface and adsorption for different precursors are different. 衬底表面上的分子必须积极地与第二前体发生反应以便形成要求的固体薄膜。 Molecules on the substrate surface must react aggressively with the second precursor to form a solid film occurred required. 另外,前体不应该与薄膜发生反应而引起浸蚀,和前体不应该溶于薄膜中。 In addition, the precursors should not react with the film caused by etching, and precursors should not be dissolved in the film. 在ALD中使用高活性前体与常规CVD的前体选用形成了对比。 Highly active conventional CVD precursors in ALD precursor chosen contrasts.

在本反应中的副产物必须是气体,以便很容易地将其从反应室中排出,再者,这副产物不应该发生反应或吸附在表面上。 In this reaction byproducts must be a gas, in order to be easily discharged from the reaction chamber which, furthermore, this pair of products should not react or adsorbed on the surface.

在一种实施方案中,采用以下程序使HfAlO3薄膜形成在放置于反应室内的衬底上,即将含铪前体脉冲输入反应室,随后脉冲输入第一含氧前体,然后将含铝前体脉冲输入反应室,接着将第二含氧前体脉冲输入反应室。 In one embodiment, the following program causes HfAlO3 film is formed on the substrate placed in the reaction chamber, i.e. hafnium-containing precursor pulses fed to the reaction chamber, followed by a first oxygen-containing precursor pulse input, and then the aluminum-containing substance before pulse input of the reaction chamber, followed by the second oxygen-containing precursor pulses fed to the reaction chamber. 在每次脉冲输送之间,将吹洗气体引入反应室。 Between each pulse transmission, the purge gas is introduced into the reaction chamber. 将含铪前体脉冲输入反应室,随后脉冲输送第一含氧前体,同时在每次脉冲输送之后接着进行吹洗便构成一个铪顺序。 The hafnium-containing body pulse input before the reaction chamber, followed by pulsing the former first oxygen-containing body, while pulsing after each followed by a purge sequence will constitute a hafnium. 类似地,将含铝前体脉冲输入反应室,随后将第二含氧前体脉冲输入反应室,同时在每次脉冲输送之后接着进行吹洗便构成一个铝顺序。 Similarly, the aluminum-containing precursor pulse input of the reaction chamber, followed by the body before the pulse input of the second oxygen-containing reaction chamber, while feeding after each pulse followed by a purge of aluminum constitutes a sequence. 选择第一含氧前体取决于被脉冲输入反应室的含铪前体,同样,第二含氧前体取决于被脉冲输入反应室的含铝前体。 Selecting a first oxygen-containing precursor depends on the pulse input hafnium-containing precursors reaction chamber, again, depends on the second oxygen-containing precursor is an aluminum-containing precursor pulse input of the reaction chamber. 另外,可以将不同的吹洗气体应用于铪顺序和铝顺序。 In addition, you can wash different blowing gas to the hafnium and aluminum sequential order. 此外,按照预定的周期逐一地对将每一种前体脉冲输入反应室加以控制,此处每种前体的预定周期根据前体的性质而不同。 Further, according to a predetermined one by one for each period one precursor pulse input to control the reaction chamber, each of the predetermined period where the precursor according to the nature of the precursor varies.

这样选择前体,以致在进行了一个铪顺序之后接着进行一个铝顺序便完成一次HfAlO3层的ALD沉积循环。 After this selection precursor, so making a hafnium aluminum sequential order followed by a ALD deposition cycle is completed once HfAlO3 layer. HfAlO3层的厚度取决于所采用的前体,脉冲输送的周期和工艺温度。 HfAlO3 precursor layer thickness depends on the use of periodic pulses delivered and the process temperature. 通过重复进行若干次铪顺序和铝顺序循环来形成具有预定厚度的HfAlO3薄膜。 By repeating the sequence several times hafnium and aluminum to form a cyclic order HfAlO3 film having a predetermined thickness. 一旦形成了具有要求厚度的HfAlO3薄膜,就对HfAlO3薄膜进行退火。 Once formed HfAlO3 film having a desired thickness, the film is annealed to HfAlO3.

在本发明的某一实施方案中,前体气体被用来在晶体管主体上形成用作栅介质的HfAlO3薄膜。 In one embodiment of the present invention, the precursor gas is used as the gate dielectric film is formed on the HfAlO3 transistor body. 另一方面,固体或液体前体可用于恰当设计的反应室中。 On the other hand, a solid or liquid precursor can be used in appropriately designed reaction chamber. 其它材料的ALD形成公开于共同未决的,共同转让的美国专利申请中,标题“原子层沉积和转化”代理卷号303.802US1,序列号10/137,058,和“利用VLS1栅原子层沉积法形成的,用作栅介质层的AlOx原子层”。 ALD formed of other materials are disclosed in co-pending, commonly assigned U.S. patent application entitled "atomic layer deposition and transformation" Attorney Docket No. 303.802US1, Serial No. 10 / 137,058, and "the use of VLS1 gate atomic layer deposition method for use as the gate dielectric layer AlOx atomic layer. " 代理卷号1303.048US1,系列号10/137,168。 Attorney Docket No. 1303.048US1, Serial No. 10 / 137,168.

图2A描述了本发明所讲授的加工HfAlO3薄膜用的原子层沉积系统的实施方案。 Figure 2A illustrates an embodiment of the present invention teaches processing HfAlO3 films atomic layer deposition system. 所描述的部件是讨论本发明所必需的那些部件,以致本领域的那些技术人员无需过分的实验工作经验就可实践本发明。 Described components are those components of the present invention is necessary to discuss, so that those skilled in the art without undue experimentation work experience can practice the invention. 有关ALD反应室的进一步讨论可从在此引入作参考的,共同未决的,共同转让的美国专利申请:标题“均匀化学气相沉积所采用的方法,系统和装置”,代理卷号303.717US1,系列号09/797324中找得。 For further discussion of ALD reaction chamber from which is hereby incorporated by reference, the co-pending, commonly assigned U.S. patent application: The title "Uniform chemical vapor deposition employed, systems and devices," Attorney Docket No. 303.717US1, Serial No. 09/797324 are looking for, too. 在图2A中,衬底210被放置在ALD系统200的反应室220内。 In Figure 2A, a substrate 210 is placed within the reaction chamber 220 of ALD system 200. 在反应室220内还放置了加热元件230,它和衬底210发生热耦合,以控制衬底的温度。 Also within the reaction chamber 220 heating element 230 is placed, it and the substrate 210 are thermally coupled, to control the temperature of the substrate. 气体分配装置240将前体气体引至衬底210。 Gas distribution means 240 of the precursor gas is introduced to the substrate 210. 每一种前体气体来源于各自的气体源251~254,其流量分别由质量流量控制器256~259控制。 Each precursor gas from each gas source 251 to 254, respectively, by the flow mass flow controllers 256 to 259 control. 气体源251~254或者通过储存气体状前体的方法或是通过提供用于蒸发固体或液体材料以形成所选的前体气体所需的场所和装置的方法来提供前体气体。 Gas source 251 to 254 or to provide a precursor gas by storing gaseous precursor method or by providing a solid or liquid material is evaporated to form a method and apparatus places the selected precursor gas required.

在ALD系统中还包括吹洗气体源261,262,其中每个分别与质量流量控制器266,267相耦合。 In ALD system further includes purge gas source 261, 262, respectively, each of which is coupled with the mass flow controllers 266, 267. 气体源251~254和吹洗气体源261-262通过它们的质量流量控制器与公共输气管或导管270相耦合,这输气导管又与反应室220内的气体分配装置240相耦合。 A gas source 240 is coupled 251 to 254 and 261-262 purge gas source mass flow controller through their public pipeline or conduit 270 is coupled to gas conduit which in turn reacted with the gas distribution chamber 220 within the apparatus. 这输气导管270还通过质量流量控制器286与真空泵或排气泵281相耦合,以便在吹洗程序结束时从输气导管中除去剩余的前体气体,吹洗气体,和副产品气体。 This gas conduit 270 through mass flow controller 286 and a vacuum pump or an exhaust pump 281 is coupled, to remove residual precursor gas from gas duct purge at the end of the process, the purge gas, and byproduct gases.

真空泵或排气泵282与质量流量控制器287相耦合,以便在吹洗程序结束时从反应室220中除去剩余的前体气体,吹洗气体,和副产物气体。 A vacuum pump or the exhaust pump 282 and a mass flow controller 287 is coupled to remove the remaining precursor gas purge at the end of the program from the reaction chamber 220, purge gas, and byproduct gases. 为了方便起见,本领域的那些技术人员熟知的控制器显示器,固定装置,温度传感器件,衬底操纵装置和必需的电气引线,在图2A上均未示出。 For convenience, those skilled in the art well known in the display controller, fixing means, the temperature sensor element, the substrate handling means and the necessary electrical leads, in FIG. 2A are not shown.

图2B描述了本发明所讲授的加工HfAlO3薄膜用的原子层沉积室的气体分配装置的实施方案。 Figure 2B depicts an embodiment of a gas distribution device according to the present invention process taught HfAlO3 films atomic layer deposition chamber. 气体分配装置240包括气体分配部件242和气体进气管244。 Gas distribution means 240 comprises a gas distribution member 242 and the gas inlet pipe 244. 气体进气管244使气体分配部件242与图2A的输气导管270相耦合。 Gas inlet pipe 244 of the gas distribution component gas conduit 242 and 270 of FIG. 2A coupled. 气体分配部件242包括气体分配孔或出口246和气体分配管道248。 Gas distribution means 242 includes a gas distribution holes or outlet 246 and the gas distribution pipeline 248. 在这示范性实施方案中,这些孔246基本上都是具有同样的直径为15~20微米的圆;气体分配管道248具有同样的宽度20~45微米。 In this exemplary embodiment, the holes 246 basically have the same diameter of 15 to 20 microns circle; gas distribution pipes 248 have the same width of 20 to 45 microns. 具有气体分配孔246的气体分配部件的表面249基本上是平面且平行于图2A的衬底210。 Gas distribution hole 246 having a gas distribution member 249 is substantially planar surface and parallel to the substrate 210 of FIG. 2A. 但是,其它一些实施方案采用了其它的表面形式以及孔和管道的形状和尺寸。 However, other embodiments using other forms of surface and hole and pipe shapes and sizes. 孔的分布和尺寸还可能影响沉积厚度,因而可以用来参与厚度控制。 Pore size distribution and may also affect the deposition thickness, which can be used to participate in thickness control. 孔246通过气体分配管道248与气体进气管244相耦合。 Hole 246 through the gas distribution piping 248 and 244 is coupled to the gas inlet pipe. 虽然ALD系统200很适宜于实践本发明,但市场上有售的其它ALD系统也可使用。 Although ALD system 200 is suitable for the practice of the present invention, but the market for sale to other ALD systems may be used.

沉积薄膜所采用的反应室的应用,结构和基本运作,对于半导体制作领域的那些普通技术人员来说都是了解的。 Applications, the basic structure and operation of the reaction chamber deposition film used for semiconductor fabrication to those of ordinary skill in the art to understand for both. 本发明可以在各种这样的反应室内得以实施无需过分的实验工作经验。 The present invention can be implemented without undue experimentation experience in a variety of such reaction chamber. 此外,本领域的每个普通技术人员一阅读本公开内容就将会理解半导体制作领域中所必需的探测,测量和控制技术。 In addition, each of ordinary skill in the art of a reading of the present disclosure will be understood that it is necessary in the field of semiconductor fabrication detection, measurement and control technology.

图3说明了本发明所讲授的HfAlO3薄膜加工方法的实施方案所采用的单元的流程图。 Figure 3 illustrates a flowchart of embodiments of the invention taught HfAlO3 film processing method employs a unit. 本方法可利用图2A,B所示的原子层沉积系统得以实现。 This method can be used to Figure 2A, B atomic layer deposition system shown can be achieved. 在程序块305内,制备衬底。 In block 305, the substrate is prepared. 用来形成晶体管的衬底典型地是硅或含硅材料。 A substrate for forming a transistor is typically a silicon or silicon-containing materials. 在其它实施方案中,可以采用锗,砷化镓,和蓝宝石上硅衬底。 In other embodiments, it may be employed germanium, gallium arsenide, and silicon-on-sapphire substrates. 这制备方法包括在形成栅介质之前清洗衬底210和形成衬底的各层和各个区,例如金属氧化物半导体(MOS)晶体管的漏区和源区。 This preparation includes cleaning the substrate prior to forming the gate dielectric 210 and the formation of layers and each region of the substrate, such as metal-oxide-semiconductor (MOS) transistor, the drain region and the source region. 正被加工的晶体管其各个区的形成顺序遵循着在MOS晶体管的制作中通常采用的,本领域的那些技术人员众所周知的典型顺序。 The formation order is being processed for each region of the transistor which followed in the production of MOS transistors commonly used, those skilled in the art of well-known typical sequence. 在形成栅介质之前所包括的加工是在栅介质形成过程中要加以防护的衬底区的掩蔽,这正是MOS制作过程中典型地要进行的工作。 Before forming the gate dielectric processing is included in the process to form the gate dielectric substrate region to be masked protection, work which is typically MOS production process to be carried out. 在本实施方案中,非掩蔽的区包括晶体管的主体区,可是,本领域的每个技术人员将认识到其它的半导体器件结构可以利用本方法。 In this embodiment, the non-masked region includes a body region of the transistor, however, each skilled in the art will recognize that other semiconductor device structures may utilize this method. 另外,将处于准备加工状态的衬底210传送到进行ALD作业所采用的反应室220中的某一位置上。 Further the substrate, the processing in a ready state 210 is transferred to the reaction chamber 220 ALD operation used in a certain position.

在程序块310内,将含铪前体脉冲输入反应室220。 In block 310, the hafnium-containing precursor pulses fed to the reaction chamber 220. 尤其是,HfCl4用作源材料。 Especially, HfCl4 used as source material. HfCl4通过位于衬底210上方的气体分配装置240被脉冲输入反应室220。 HfCl4 through substrate 210 located above the gas distribution means 240 is a pulse input chamber 220. 来自气体源251的HfCl4流量由质量流量控制器256加以控制。 HfCl4 flow from the gas source 251 are controlled by the mass flow controller 256. HfCl4源的气体温度范围为约130℃~约154℃。 HfCl4 source gas temperature in the range of from about 130 ℃ ~ about 154 ℃. HfCl4与位于由衬底210的非遮掩面所定义的要求区中的衬底210的表面发生反应。 HfCl4 react with the surface of the substrate at a defined by the cover surface 210 of the non-requirement region 210 of the substrate occurs.

在程序块315内,将第一吹洗气体脉冲输入反应室220。 In block 315, the first purge gas pulses fed to the reaction chamber 220. 尤其是,纯度大于99.99%的纯净氮气用作HfCl4的吹洗气体。 In particular, a purity of greater than 99.99% pure HfCl4 nitrogen as a purge gas. 来自吹洗气体源261的氮进入输气导管270的流量由质量流量控制器266控制。 From the purge gas source 261 of nitrogen into the gas flow conduit 270 is controlled by the mass flow controller 266. 利用纯净氮气吹洗避免了前体脉冲和可能的气相反应发生重叠。 Use pure nitrogen purge to avoid a possible precursor pulse and the gas phase reactor overlap. 吹洗之后,在程序块320内,将第一含氧前体脉冲输入反应室220。 After purging, in block 320, the first oxygen-containing precursor pulse input chamber 220. 对于使用HfCl4作为前体的铪顺序,选择水蒸气作为前体起着氧化反应物的作用,以便在衬底210上形成氧化铪。 For HfCl4 order as hafnium precursors, choose water vapor plays a precursor role as the oxidation of the reactants to form a hafnium oxide on the substrate 210. 来自气体源252的水蒸气,利用质量流量控制器257,以约0.5~约1.0mPam3/秒的流速,通过输气导管270,将其脉冲输入反应室220。 Water vapor from the gas source 252, the use of mass flow controllers 257, from about 0.5 to about 1.0mPam3 / sec flow through gas conduit 270, which pulse input chamber 220. 水蒸气在衬底210的表面上发生积极的反应。 Steam generating positive reactions on the surface of the substrate 210.

在脉冲输送氧化反应物水蒸气之后,在程序块325内,将第一吹洗气体喷射入反应室220。 After the oxidation reaction was pulsing steam, in block 325, the first purge gas is injected into the reaction chamber 220. 在HfCl4/水蒸气顺序中,在脉冲输送每种前体气体之后,利用纯氮气体吹洗反应室。 In HfCl4 / water vapor sequence, after the pulsing of each precursor gas using nitrogen gas purge the reaction chamber. 利用吹洗气体,清除掉系统中的剩余前体气体和反应副产物,同时利用真空泵282,通过质量流量控制器287抽空反映器220,和利用真空泵281,通过质量流量控制器286抽空输气导管270。 The use of purge gas, the system removed the residual precursor gas and reaction by-products, while the vacuum pump 282, through a mass flow controller 287 reflects 220 evacuated, and the vacuum pump 281, a mass flow controller 286 was evacuated through the gas conduit 270.

在实施HfCl4/水蒸气顺序过程中,通过加热元件230和使用呈低压(250Pa)热壁构形的反应室一起使衬底温度保持为约350℃~约550℃。 In the embodiment HfCl4 / vapor sequential process by heating element 230 and use was low pressure (250Pa) hot-wall reaction chamber together topography and the substrate temperature maintained at about 350 ℃ ~ about 550 ℃. 在其它的一些实施方案中,使衬底温度保持为约500℃~1000℃。 In other embodiments, the substrate temperature was maintained at about 500 ℃ ~ 1000 ℃. HfCl4的脉冲输送时间在约1.0秒~2.0秒范围内。 HfCl4 the pulsing time in about 1.0 seconds to 2.0 seconds. 在脉冲输送HfCl4之后,继续进行包括吹洗脉冲,接着水蒸气脉冲,再接着吹洗脉冲在内的铪顺序。 After pulsing HfCl4, continue to include purging pulse, followed by water vapor pulse, followed by purging pulse sequence including hafnium. 在一种实施方案中,进行吹洗脉冲,接着水蒸气脉冲,再接着吹洗脉冲共费时约2秒。 In one embodiment, the pulse purged, followed by water vapor pulse, and then purge pulse followed by a total of about 2 seconds and time-consuming. 在另一实施方案中,在脉冲输送HfCl4之后,在铪顺序中,每个脉冲有2秒的脉冲周期。 In another embodiment, after pulsing HfCl4, Hf in sequence, each pulse has a pulse period of 2 seconds.

在程序块330内,将含铝前体脉冲输入反应室220。 In block 330, the aluminum-containing precursor pulse input chamber 220. 在一种实施方案中,在HfCl4/臭氧顺序之后,三甲基铝(TMA),Al(CH3)3,用作含铝前体。 In one embodiment, after HfCl4 / ozone sequence, trimethyl aluminum (TMA), Al (CH3) 3, as an aluminum-containing precursor. 来自气流源253的TMA,利用质量流量控制器258,通过气流分配装置240,将其脉冲输送到衬底210的表面。 TMA gas flow from source 253, the use of mass flow controllers 258, 240 through the air distribution device, which pulse supplied to the surface of the substrate 210. TMA被引至在HfCl4/水蒸气顺序进行过程中形成的二氧化铪薄膜上。 TMA is introduced onto the HfCl4 / water vapor formed during the sequence of hafnium dioxide film.

在程序块335内,第二吹洗气体被引入系统。 In block 335, the second purge gas is introduced into the system. 对于TMA前体,纯净氩气用作吹洗气体和载气。 For TMA precursors, pure argon gas is used as a purge gas and a carrier gas. 来自吹洗气源262的氩气进入输气导管270,随后进入反应室220,其流量由质量流量控制器267控制。 From purge gas source 262 into the argon gas conduit 270, and then into the reaction chamber 220, the flow controller 267 is controlled by the mass flow. 在经氩气吹洗之后,在程序块340内,将第二含氧前体脉冲输入反应室220。 After argon-purged, in block 340, the second oxygen-containing precursor pulses fed to the reaction chamber 220. 对于使用TMA作为前体的铝顺序,选用蒸馏水蒸气作为前体起氧化反应物作用,以便和位于衬底210上的TMA相互作用。 For TMA as the aluminum precursor sequence, use distilled water vapor from the oxidation reaction is as a precursor role for and located on the substrate 210. TMA interactions. 来自气体源254的蒸馏水蒸气,利用质量控制器259,通过输气导管270将其脉冲输入反应室220。 Distilled water vapor from the gas source 254, the use of quality controller 259 via gas conduit 270 to 220 pulses fed to the reaction chamber. 蒸馏水蒸气在衬底210的表面上发生积极的反应,从而形成HfAlO3薄膜。 Distilled water vapor positive reactions occur on the surface of the substrate 210, thereby forming HfAlO3 film.

在脉冲输送起氧化反应物作用的蒸馏水蒸气之后,在程序块345内,将第二吹洗气体喷射入反应室220。 After the pulse was delivered from the oxidation effects of distilled water vapor, in block 345, the second purge gas is injected into the reaction chamber 220. 在TMA/蒸馏水蒸气顺序中,在脉冲输送每种前体气体之后,用氩气吹洗反应室。 In the TMA / distilled water vapor sequence, pulsing after each precursor gas, purged with argon chamber. 在另一实施方案中,纯净氮气重新用作吹洗气体。 In another embodiment, pure nitrogen gas is reused as purge. 利用吹洗气体,清除掉系统中的剩余前体气体和反应副产物,同时利用真空泵282,通过质量流量控制器287,抽空反应室220,和利用真空泵281,通过质量流量控制器286,抽空输气导管270。 The use of purge gas, rid the system of the gas and the remaining reaction byproduct precursors, while taking advantage of the vacuum pump 282, through the mass flow controller 287, evacuation of the reaction chamber 220, and the vacuum pump 281, through the mass flow controller 286, taking input gas conduit 270. 这不仅完成了TMA/蒸馏水蒸气顺序,而且它还完成了铪顺序/铝顺序循环,从而形成了具有与一种ALD循环有关的设定厚度的HfAlO3层。 This not only completed the TMA / distilled water vapor order, and it completed the hafnium order / aluminum order cycle, which formed a combination with one ALD cycle-related settings HfAlO3 layer thickness.

在进行TMA/蒸馏水蒸气顺序的过程中,通过加热元件230,使衬底温度保持为约350℃~约450℃。 Conducting TMA / distilled water vapor sequential process, by heating element 230, the substrate temperature is maintained from about 350 ℃ ~ about 450 ℃. 使反应室的温度保持为约150℃,以便使反应物凝结的可能性降至最低。 The temperature of the reaction chamber is maintained at about 150 ℃, so that the possibility of condensation of the reactants to a minimum. 使工艺压力在脉冲输送前体气体时保持为约230m托,而用于脉冲输送吹洗气体时保持为约200m托。 Making the process pressure was maintained at about 230m Torr, while for pulsing purge gas maintained at about 200m Torr when pulsing precursor gas. 用于TMA和蒸馏水蒸气二种前体的脉冲时间均约为1秒,而用于吹洗的脉冲时间约为15秒。 Pulse time for TMA and distilled water vapor two precursor was about one second, and used to purge the pulse time of about 15 seconds. 在一种实施方案中,在完整的HfCl4/水蒸气/TMA/蒸馏水蒸气循环过程中,使衬底温度保持为约350℃。 In one embodiment, the full HfCl4 / steam / TMA / distilled water steam cycle process, the substrate temperature is maintained at about 350 ℃. 在另一实施方案中,在完整的HfCl4/水蒸气/TMA/蒸馏水蒸气循环过程中,使衬底温度保持为约550℃。 In another embodiment, the intact HfCl4 / steam / TMA / distilled water steam cycle process, the substrate temperature is maintained at about 550 ℃.

作为一种替代的铝顺序,可使用DMEAA/氧顺序而不是TMA/蒸馏水蒸气顺序。 As an alternative to aluminum order, may be used DMEAA / oxygen instead of sequentially TMA / distilled water vapors order. 含铝前体DMEAA是一种铝烷(AlH3)和二甲基乙烷[N(CH3)2(C2H5)]的加合物。 DMEAA aluminum-containing precursor is an aluminum alkyl (AlH3) and dimethyl ethane [N (CH3) 2 (C2H5)] adduct. 在程序块330内,来自气体源253的DMEAA气体被脉冲输送到衬底210表面上。 In block 330, DMEAA gas from the gas source 253 is pulsed into the surface of the substrate 210. 通过将温度控制在25℃的气泡型蒸发作用向气体源253提供DMEAA气体。 By controlling the temperature in the bubble-type evaporation provided 25 ℃ DMEAA gas to the gas source 253. 在程序块335内,与DMEAA有关的吹洗气体和载气是来自吹洗气体源262的氢。 In block 335, and DMEAA relevant purge gas and the carrier gas is hydrogen from purge gas source 262. 在程序块340内,为了在衬底210上产生必要的反应,来自气体源254的作为第二含氧前体的氧被脉冲输入反应室220。 In the block 340, 210 on the substrate in order to generate the necessary response, from the second oxygen-containing gas as the oxygen source precursor is pulse input 254 of the reaction chamber 220. 在程序块345内,来自吹洗气体源262的吹洗气体氢再次流过反应室220。 In block 345, the purge gas from purge gas source 262 through the hydrogen flow reaction chamber 220 again.

在进行DMEAA/氧顺序的过程中,利用加热元件230使衬底温度保持为约100℃~约125℃。 Process performing DMEAA / oxygen in order, by heating element 230 to maintain the substrate temperature of about 100 ℃ ~ about 125 ℃. 在进行DMEAA/氧顺序的过程中,使工艺压力保持为约30m托。 Process during DMEAA / oxygen in order to make the process pressure was maintained at approximately 30m Torr.

在利用DMEAA替代铝顺序时,可在与TMA/蒸馏水顺序相同的温度和压力范围下使用DMEAA/蒸馏水蒸气顺序。 In the use of DMEAA order instead of aluminum may be used DMEAA / distilled water vapor in the order and TMA / distilled water order in the same temperature and pressure range. 在本发明的某一实施方案中,在完整的HfCl4/水蒸气/DMEAA/蒸馏水蒸气循环过程中使衬底温度保持为约350℃。 In one embodiment of the present invention, in the full HfCl4 / steam / DMEAA / steam cycle process, to distilled water and kept at a substrate temperature of about 350 ℃. 另一方面,可在使衬底温度保持为约550℃的条件下,进行完整的HfCl4/水蒸气/DMEAA/蒸馏水蒸气循环。 On the other hand, the substrate temperature can be kept under the condition of about 550 ℃, a complete HfCl4 / steam / DMEAA / distilled water steam cycle.

在一个循环之后的HfAlO3薄膜的厚度,在已知温度下,由在铪顺序和铝顺序中所采用的脉冲周期确定。 In a cycle of a thickness of the film after HfAlO3, at a known temperature, determined by the order in hafnium and aluminum used in the pulse sequence cycle. ALD方法的脉冲周期取决于所使用的反应系统200和前体以及吹洗气体源的特性。 The method depends on the pulse period 200 and ALD precursor and purge gas source used in the reaction system properties. 典型地,在给定温度下,脉冲周期可以在一个要比前体的最小脉冲时间长一些的较大范围内变化,但基本上没有改变生长速率。 Minimum pulse over a long time, typically, at a given temperature, pulse period than the body can be in front of a large range of some changes, but essentially unchanged growth rate. 一旦一个循环的周期组被确定,那么HfAlO3薄膜的生长速率将被定为某一值例如Nnm/循环。 Once the period of one cycle of the group is determined, then the growth rate HfAlO3 film will be set to a value such as Nnm / cycle. 例如在形成MOS晶体管的栅介质的应用中,为了使HfAlO3薄膜达到要求的厚度t,ALD方法应重复t/N次循环。 For example, in the application of the gate dielectric of the MOS transistor is formed, in order to achieve the required film thickness HfAlO3 t, ALD method should be repeated t / N cycles.

在程序块350内,要确定HfAlO3薄膜是否达到了要求的厚度t。 In block 350, to determine whether the requirements HfAlO3 film thickness t. 正如所述,要求的厚度应在t/N次循环后完成。 As mentioned, the thickness of the claim should be completed in the t / N cycles. 如果完成的循环次数小于t/N,本方法从脉冲输送含铪前体的程序块310处重新开始,在上面所讨论的实施方案中,这含铪前体就是HfCl4气体。 If the number of cycles completed less than t / N, the method comprising the block from the pulsing hafnium body 310 before restart, in embodiments discussed above, this body is HfCl4 hafnium-containing gas before. 如果t/N次循环已完成,不再进一步要求继续ALD作业,而在程序块355内,对HfAlO3薄膜进行退火。 If t / N cycles have been completed, no further requested to continue ALD operation, and in the 355 block of HfAlO3 film annealed. 退火是生产HfAlO3薄膜的最后的加热循环,是在温度约300℃~800℃下进行的,以便生产出具有最佳性能的介质绝缘体。 Annealing the film is produced HfAlO3 final heating cycle is at a temperature of about 300 ℃ ~ 800 ℃ carried out in order to produce the best performance of the insulator medium. 退火可以在惰性气氛或氮气气氛中进行。 Annealing may be performed in an inert atmosphere or nitrogen atmosphere.

在程序块360内,在形成HfAlO3薄膜之后,含HfAlO3薄膜的器件的加工便完成了。 In block 360, after forming HfAlO3 film processing devices containing HfAlO3 film is complete. 在一种实施方案中,完成这个器件包含完成晶体管的构成。 In one embodiment, the device contains complete completion constituting transistors. 另一方面,完成这方法包括完成存储器的构建,这存储器具有由HfAlO3薄膜栅介质形成的存取晶体管组成的阵列。 On the other hand, the completion of this method include building complete memory, this memory has an array of access transistor gate dielectric film formed by the HfAlO3 composition. 再者,在另一实施方案中,完成这方法包括含有信息处理器的电子系统的形成,这信息处理器采用的电子器件使用了由HfAlO3薄膜栅介质形成的晶体管。 Further, in another embodiment, this method comprises forming a complete information processor containing an electronic system, the electronic device which uses the information used by the processor HfAlO3 gate dielectric film transistor formed. 典型地,信息处理器例如计算机包括许多存储器,这些存储器内装有许多存取晶体管。 Typically, information processor such as a computer comprising a plurality of memory, many of these memories built access transistor.

在一种实施方案中,用作栅介质的HfAlO3薄膜是通过采用铪/水蒸气/铝/水蒸气循环的ALD方法使其形成在晶体管的本体区内。 In one embodiment, as the gate dielectric film through the use of hafnium HfAlO3 / steam / ALD method Al / steam cycle to form the body region of the transistor. 这循环是铪/水蒸气顺序和铝/水蒸气顺序的组合。 This cycle is hafnium combination / sequential and aluminum vapor / steam sequence. 在铪/水蒸气顺序结束时终止这循环将典型地导致形成HfO2薄膜。 This cycle is terminated at the end of a hafnium / steam sequence will typically result in the formation of HfO2 films. 只进行铝/水顺序则典型地会导致形成Al2O3薄膜。 Were only aluminum / water order will typically result in the formation Al2O3 film.

最近W.Zhu等人在第一届国际电子器件会议上发表的,刊登在会议论文集P.463~466(2001)上的论文,报导了利用喷射蒸汽沉积法形成的HfO2和HfAlO薄膜的生长。 Recently W.Zhu, who at the first session of the International Electron Devices Meeting on published papers published in conference proceedings P.463 (2001) on the ~ 466, reported a growth formed by jet vapor deposition of HfO2 films and HfAlO . 大约3nm厚的HfO2薄膜在400℃~500℃下似乎发生了晶化,而含有约6.8%Al的HfAlO薄膜在比HfO2薄膜约高200℃的温度下发生晶化,含有约31.7%Al的HfAlO薄膜则在比HfO2薄膜约高400℃的温度下发生晶化。 About 3nm thick HfO2 films at 400 ℃ ~ 500 ℃ crystallization seems to happen, but HfAlO film contains about 6.8% Al at 200 ℃ higher than HfO2 films about temperature crystallize, containing about 31.7% Al of HfAlO film is higher than an HfO2 film occurs at a temperature of about 400 ℃ crystallization. 因此,该论文指出HfAlO薄膜在较高温度下对其进行加工时往往导致形成结晶形结构。 Therefore, the paper points out HfAlO film when processed at higher temperatures result in the formation of its crystalline structure often. 可是非晶形结构有利于用作栅介质。 However, an amorphous structure is advantageous as the gate dielectric.

最近J.Aarik等人在应用表面科学第173卷P.15~21(2001)上发表了一篇论文,报导了通过使用HfCl4/水蒸气顺序的ALD形成HfO2薄膜的生长。 Recently J.Aarik et al. Applied Surface Science, Vol. 173 P.15 on to 21 (2001) published a paper, reported growth by using HfCl4 / vapor form sequential ALD HfO2 films. 在衬底温度保持在从500℃到1000℃范围内的不同温度的情况下,HfCl4源的温度范围为130℃~154℃。 In the case where the substrate temperature is maintained within a range from 500 ℃ to 1000 ℃ different temperatures, HfCl4 source temperature range of 130 ℃ ~ 154 ℃. 对于衬底温度为940℃和水蒸气流速0.7mPa/m3的情况,已证实最终的薄膜结构取决于HfCl4源的温度。 For substrate temperature of 940 ℃ and steam flow rate 0.7mPa / m3 in the case, it was confirmed the final film structure depends on the temperature HfCl4 source. 在HfCl4源温度为128℃时,薄膜是单斜晶系的,此时生长速率为0.034nm/循环,而在HfCl4源温度为152℃时,薄膜是立方晶系的,此时生长速率为0.067nm/循环。 HfCl4 source at a temperature of 128 ℃, the film is monoclinic, this time the growth rate of 0.034nm / cycle, while at HfCl4 source temperature of 152 ℃, the film is a cubic system, where growth rate is 0.067 nm / cycle. 该报导断定,通过采用HfCl4和水蒸气的ALD生长成的HfO2薄膜的表面结构,当改变生长温度和前体剂量时,可以发生变化。 The report concluded that, by adopting HfCl4 and water vapor grown ALD HfO2 surface structure of the film, when changing the growth temperature and precursor dose, can be changed.

最近Y.Kim等人在应用物理通讯71(25)卷P.3604~3606(1997)页上发表的论文,报导了通过使用TMA/蒸馏水蒸气顺序的ALD形成Al2O3薄膜的生长。 Recently Y.Kim et al. Applied Physics Letters, published on page 71 (25) volumes P.3604 ~ 3606 (1997) paper, reported by using the TMA / ALD distilled water vapor formed sequentially grown Al2O3 film. 在衬底温度保持为370℃和TMA和蒸馏水蒸气的脉冲输送时间设定为各1秒的情况下,Al2O3薄膜的生长速率确定为每个循环约0.19nm。 The substrate temperature was maintained and distilled water vapor and TMA pulsing time is set to one second each case 370 ℃, the growth rate of Al2O3 thin films is determined for each cycle of about 0.19nm. 确定的这个生长速率对于TiN,Si,和SiO2衬底都是相同的。 The growth rate determined for the TiN, Si, SiO2, and the substrate are the same. 在最近由C.Jeong等人发表的刊登在日本应用物理杂志第40卷1部1章P.285~289页(2001)上的论文中,报导了利用ALD在100℃下Al2O3的生长速率为24.4/循环,此处一个循环为利用DMEAA作为前体进行五次Al沉积随后是O2等离子体氧化。 In the paper recently published by the C.Jeong et al published in the Japanese Journal of Applied Physics, Vol. 40 P.285 Page 1 Chapter 1 ~ 289 (2001), the reported use at 100 ℃ under Al2O3 ALD growth rate 24.4 / cycle, where a cycle of use DMEAA conducted as a precursor Al deposition followed by five O2 plasma oxidation. 典型地,由ALD形成的Al2O3薄膜是非晶形的。 Typically, formed by the ALD Al2O3 film amorphous.

含HfAlO3,Al2O3和HfO2的介质薄膜具有的介电常数在从Al2O3的介电常数9到HfO2的介电常数25的范围内。 Containing dielectric film HfAlO3, Al2O3 and HfO2 having a dielectric constant of the dielectric constant of Al2O3 in the range from 9 to 25 of the dielectric constant of HfO2. 通过控制铪顺序的循环次数和铝顺序的循环次数,就能控制沉积在衬底表面区上的铪和铝的数量。 By controlling the sequence of cycles of hafnium and aluminum sequential cycles, you can control the number of hafnium and aluminum is deposited on the substrate surface area. 因此,通过采用铪顺序和铝顺序的ALD所形成的介质薄膜可利用由含有选定或预定百分率的HfAlO3,Al2O3和HfO2组成的组合物制成,在这种情况下,这薄膜的有效介电常数将被选定或预定在9~25的范围内。 Therefore, the dielectric film by using a hafnium order and sequential ALD aluminum can formed by the use of a composition containing a selected or predetermined percentage HfAlO3, Al2O3 and HfO2 composition formed, in this case, the effective dielectric film of this It will be selected or predetermined constant in the range of 9 to 25. 此外,在铪顺序之后采用铝顺序,最后所得的含HfAlO3的介质应是非晶形的。 In addition, the use of aluminum in order after order hafnium-containing medium HfAlO3 last income should be amorphous.

除了分别控制在ALD方法中的铪顺序和铝顺序的循环次数外,也可通过控制以下因素将含有HfAlO3的介质薄膜制造成具有选定的特性,即控制每个顺序所用的前体材料,每个顺序所采用的工艺温度和压力,各个前体的脉冲输送时间,以及在本方法的末尾,在每个循环的末尾和在每个顺序的末尾的热处理。 In addition to the number of cycles were controlled ALD method hafnium and aluminum sequential order, but also by controlling the following factors will contain dielectric film HfAlO3 manufacturer to have selected characteristics, namely the control of precursor materials used for each sequence, each sequential process temperature and pressure employed, each precursor pulse delivery time, and at the end of the process, at the end of each cycle and heat-treated at the end of each sequence. 热处理可包括在原位在各种环境包括在氩和氮环境中进行退火。 The heat treatment may include in-situ annealing in a variety of environments including argon and nitrogen environments.

前体的脉冲输送时间范围为约0.5秒~约2至3秒,尽管可以使用较长的脉冲。 Precursor pulsing time is from about 0.5 seconds to about 2-3 seconds, although the use of a longer pulse. 典型地,吹洗气体的脉冲输送时间范围从等于与其相关的前体脉冲输送时间到数量级大于该相关前体脉冲输送时间,以便将所有剩余材料和副产物从反应系统中吹洗掉。 Typically, the purge gas pulse delivery times range from equal to its associated precursor pulsing time is orders of magnitude larger than the associated precursor pulsing time, so that all remaining materials and byproducts from the reaction system to blow wash. 通常吹洗气体的脉冲输送时间范围为约1秒~约30秒。 Typically purge gas pulsing time ranges from about 1 second to about 30 seconds. 在一种实施方案中,吹洗气体的脉冲输送时间范围为1~2秒。 In one embodiment, the purge gas pulse delivery time ranges from 1 to 2 seconds.

所制成的含HfAlO3的薄膜的生长速率将受各个顺序的生长速率控制,而典型地可以是约0.34/循环~约5/循环。 The growth rate of the film containing HfAlO3 made will be subject to the control of the growth rate for each sequence, and typically can be about 0.34 / cycle to about 5 / cycle. 其它的生长速率也可获得。 Other growth rate can be obtained.

在本发明的各种实施方案中可能得到的等效氧化物厚度teq的范围与形成具有介电常数为约9~约25的组合物的能力有关,和与达到实体薄膜厚度约2~约3nm和以上的能力有关。 The scope and form in various embodiments of the present invention may be obtained in the equivalent oxide thickness teq having a dielectric constant of about 9 to about 25 ability of the composition is related to the entity and the film thickness reaches about 2 to about 3nm and above capacity. 符合本发明的teq的范围示于下表: The extent consistent with teq present invention are shown in the following table:

含HfAlO3的层其定标的下限将取决于形成全带隙所必须的薄膜的各单层,以使底层硅层和对着HfAlO3薄膜的上层导电层之间保持良好绝缘性。 Containing layer HfAlO3 limit its scaling will depend on the monolayer to form a full band gap necessary for the film, so that the underlying silicon layer and between the upper conductive layer against the film HfAlO3 good insulation. 这一要求是避免底层硅层和上层导电层之间可能发生短路所必需的。 This requirement is necessary to avoid a short circuit may occur between the underlying silicon layer and an upper conductive layer. 根据上面所述,可明显看到可以实现使含HfAlO3的薄膜具有的teq为3~12。 According to the above, it is apparent the film can have a teq containing HfAlO3 is 3 ~ 12. 再说,基本上没有界面层的薄膜可以达到的teq显著地小于2或3甚至小于1.5。 Moreover, the film is essentially no interface layer can be achieved teq significantly less than 2 or even less than 3 1.5.

上面所述的利用铪顺序/铝顺序沉积循环进行原子层沉积的新颖方法具有很多优点。 The use of the above-described sequence of hafnium / aluminum deposition sequence of a novel method of atomic layer deposition cycles has many advantages. 再者,通过独立地控制每个顺序的各个参数便可形成具有选定介电常数的栅介质。 Furthermore, by independently controlling the parameters of each sequence can be formed having a selected dielectric constant gate dielectric. 另外,提供的这新颖的方法可以用来形成各种晶体管,存储器和信息处理器。 In addition, this novel method can be used to provide various transistors are formed, and the information processor memory.

图1中所描绘的晶体管100可以由形成在硅基衬底110中的源/漏区120和另一个源/漏区130构成,而这二个源/漏区120,130被主体区132隔开。 Source / drain regions 120 and another source / drain regions depicted in Figure 1 transistor 100 may be formed in the silicon substrate 130. 110, and these two source / drain regions 120, 130, 132 separated by subject area On. 源/漏120和源/漏130隔开的主体区132定义了具有沟道长度134的沟道。 The source / drain 120 and the source / drain 130 separated from the main body region 132 defines a channel having a channel length of 134. HfAlO3薄膜利用ALD方法形成,这ALD方法包括将含铪前体脉冲输入装有衬底110的反应室,将第一含氧前体脉冲输入反应室,将含铝前体脉冲输入反应室,以及将第二含氧前体脉冲输入反应室。 HfAlO3 use ALD method for forming thin films, which ALD method includes hafnium-containing precursor pulse input containing the reaction chamber of the substrate 110, the first oxygen-containing precursor pulse input of the reaction chamber, the aluminum-containing precursor pulse is fed to the reaction chamber, and The second oxygen-containing precursor pulses fed to the reaction chamber. 每一种前体根据选定的时间周期被脉冲输入反应室。 Each one precursor according to the selected time period is the pulse input of the reaction chamber. 脉冲输送每一种前体所需时间的长短根据所采用的前体选定。 Precursor pulsing time required for each precursor used in accordance with the length selected. 在每次脉冲输送前体之间,将剩余前体和反应的副产物从反应室中去除。 Between each pulsing precursor-product remaining precursor and reaction removed from the reaction chamber. HfAlO3薄膜的厚度由重复进行脉冲输送含铪前体,第一含氧前体,含铝前体,和第二含氧前体的循环次数来控制,直到在主体区上形成要求厚度的含HfAlO3的薄膜140。 HfAlO3 film thickness of the hafnium-containing precursor, a first oxygen-containing precursor, an aluminum-containing precursor, and a number of cycles of the second oxygen-containing precursor is controlled by pulsing is repeated until a desired thickness on the body region containing HfAlO3 The film 140. 栅形成在栅介质140的上方。 Gate is formed over the gate dielectric 140. 典型地,形成栅包括形成多晶硅层,虽然在另外别的方法中可以形成金属栅。 Typically, the polysilicon layer forming the gate comprises forming, although other methods may be in another form a metal gate. 可采用本领域的那些技术人员周知的标准方法来形成衬底,源/漏区和栅。 Standard methods may be employed to those skilled in the art known to form a substrate, the source / drain regions and a gate. 另外,用来形成晶体管的工艺各个单元的操作程序是按照对本领域的那些技术人员来说也是周知的标准制作程序进行的。 In addition, procedures for forming the respective units in accordance with the process of the transistors to those skilled in the art is also well-known standard production procedures.

利用ALD形成用作栅介质的HfAlO3薄膜的方法的实施方案可以应用于其它的含有介质层的晶体管结构。 Embodiments utilize ALD HfAlO3 formed as the gate dielectric film may be applied to other methods transistor structure comprising dielectric layers. 例如,图4描绘了一种本发明所讲授的可以用来制作一种晶体管400构型的实施方案。 For example, Figure 4 depicts a teaching of the present invention can be used to produce A transistor 400 configuration embodiments. 晶体管400包括硅基衬底410和被主体区432隔开的二个源/漏区420,430。 Transistor 400 comprises a silicon substrate 410 and the body region 432 spaced two source / drain regions 420, 430. 位于二个源/漏区420,430之间的主体区432定义了具有沟道长度434的沟道区。 Located two source / drain regions 420, 430 of the body 432 defines a region 434 having a channel length of the channel region. 位于主体区432上方的是叠层455,它包括栅介质440,浮栅452,浮栅介质442,和控制栅450。 Located in the upper body region 432 is a laminate 455, which includes a gate dielectric 440, a floating gate 452, the floating gate dielectric 442, and a control gate 450. 栅介质440按照上述本发明所讲授的ALD方法形成,而晶体管400的其余单元采用本领域的那些技术人员熟知的方法形成。 Gate dielectric 440 ALD method according to the present invention is formed as taught, while the rest of the cell transistor 400 of the present art methods well known to those skilled formed. 另一方面,栅介质440和浮栅介质442二者均可按照上述本发明所讲授的ALD方法形成。 On the other hand, the gate dielectric 440 and the floating gate dielectric 442 can be formed both ALD method according to the present invention are taught.

采用上述方法产生的晶体管可以用于存储器和包含信息处理器的电子系统中。 Produced by the above method may be used for the memory transistor and an electronic system comprising information processors. 内含HfAlO3薄膜介质层的信息处理器可以采用上述方法的各种实施方案构成。 It contains information processor HfAlO3 thin-film dielectric layer may be employed in various embodiments of the method described above constitute. 这类信息处理器包括各种无线系统,电信系统和计算机。 Such information processor includes a variety of wireless systems, telecommunications systems and computers. 一种内含HfAlO3薄膜介质层的计算机实施方案示于图5~7并叙述如下。 One kind of thin film dielectric layers containing computer HfAlO3 embodiment is shown in Figures 5-7 and described below. 虽然下面所示的是特定形式的存储器和计算器件,但本领域的每一位技术人员都承认各个不同形式的存储器和和包含信息处理器的电子系统均可利用本发明。 Although shown below is a particular form of memory and computing devices, but every skill in the art will recognize various forms of memory and information and electronic system including processors can utilize the present invention.

个人用计算机如图5和图6所示,它包括监视器500,键盘输入502和中央处理机504。 Personal computer shown in FIG. 5 and FIG. 6, which includes a monitor 500, keyboard input 502 and a central processing unit 504. 处理机部件504典型地包括微处理机606,存储器总线电路608,它含有许多存储器沟槽612(a~n),和其它外围电路610。 Processor means 504 typically comprises a microprocessor 606, memory bus circuit 608, comprising a number of memory grooves 612 (a ~ n), and other peripheral circuits 610. 外围电路610允许各种外围器件624通过输入/输出(I/O)总线622与处理机/存储器总线620连接。 Peripheral circuit 610 allows various peripheral devices 624 input / output (I / O) bus 622 is connected to processor / memory bus 620 through. 图5和图6所示的个人用计算机还包括至少有一个这样的晶体管,它具有按照本发明所讲授的一种实施方案形成的含HfAlO3薄膜的栅介质。 Individual Figures 5 and 6 as shown by computer further comprises at least one such transistor having a gate dielectric film containing HfAlO3 According to one embodiment of the present invention is formed as taught.

微处理机606产生控制和地址信号,以便控制存储器总线电路608和微处理和606之间以及存储器总线电路608和外围电路610之间的数据交换。 The microprocessor 606 generates control and address signals to control data exchange circuit 608 and the memory bus between the microprocessor and the memory bus circuit 606 and 608 and between the peripheral circuit 610. 这种数据交换是通过高速存储器总线620和通过高速I/O总线622完成的。 This data exchange is through the completion of high-speed memory bus 620 and high-speed I / O bus 622.

许多存储器沟槽612(a~n)与存储器总线620耦合,这些沟槽能容纳对本领域的那些技术人员来说是众所周知的各种存储器。 Many memory grooves 612 (a ~ n) coupled to memory bus 620, these grooves can accommodate to those skilled in the art is known various memories. 例如单列直插式存储模块(SIMM)和双列直插式存储模块(DIMM)可用于本发明的装置中。 For example, single in-line memory module (SIMM) and dual in-line memory module (DIMM) that can be used in the present invention.

这些存储器可根据各种不同的设计生产,这些设计提供不同的读出和写入存储器沟槽612的动态存储单元的方法。 These memories may be based on a variety of design and production, these designs provide different read and write memory trench method of dynamic memory cells 612. 一种这样的方法是页面模式运行。 One such method is the page mode operation. DRAM中的页面模式运行由如下方法定义,存取一行存储单元阵列和随机地存取这阵列的不同的列。 The DRAM page mode operation is defined by the following methods, accessing a row of memory cell array and random access to this array of different columns. 当存取该列的时候,储存在上述行和该列相交处的数据便可读出并输出。 When access to the column, the data stored in the row and the column can be read out at the intersection and output. 页面模式DRAM要求有一些限制存储器电路608通信速度的存取步骤。 Page Mode DRAM requires some limitations communication speed memory access circuit 608 steps.

一种替代型器件是扩充数据输出(EDO)型存储器,它使储存在存储器阵列地址处的数据,在寻址列已关闭之后仍可以有效输出。 An alternative is to expand the data output device (EDO) type memory, which allows data to be stored in the memory array at the address, after the address column is closed output can still be effective. 这种存储器由于允许较短的存取信号而增加了一些通信速度,但没有降低存储器输出数据在存储器总线620上有效的时间。 This memory by allowing shorter access signals and adds some communication speed, but the memory output data is valid on the memory bus 620 time is not reduced. 其它别的类型的器件包括SDRAM,DDR SDRAM,SLDRAM和直接式RDRAM,以及其它的例如SRAM或快速存储器。 Other other types of devices including SDRAM, DDR SDRAM, SLDRAM and Direct RDRAM, and other such as SRAM or Flash memory.

图7阐明了本发明所讲授的DRAM存储器700的实施方案的示意图。 Figure 7 illustrates a schematic view of the teachings of the present invention is an embodiment of a DRAM memory 700. DRAM器件700是与存储器沟槽612(a~n)相容的。 DRAM memory device 700 is compatible with the groove 612 (a ~ n) of the. 对DRAM700的叙述已作了简化,为的是阐明DRAM存储器而不是用来全面叙述DRAM的所有特性。 Description of DRAM700 has been simplified in order to clarify the DRAM memory rather than to a comprehensive account of all the characteristics of DRAM. 本领域的那些技术人员都承认各种各样的存储器均可用于本发明的装置中。 Those skilled in the art will recognize a wide variety of memory devices can be used in the present invention. 图6所示的DRAM存储器实例包括至少有一个这样的晶体管,它具有按本发明所讲授的实施方案形成的HfAlO3薄膜的栅介质。 DRAM memory example shown in Figure 6 comprises at least one such transistor having a gate dielectric taught by the invention embodiment formed HfAlO3 film.

通过存储器总线620提供的控制,地址和数据信息由DRAM700的各路输入进一步表示,正如图7所示。 Control provided by the memory bus 620, the address and data information represented by each input DRAM700 further, as shown in Figure 7. 这些各路的表示由数据线702,地址线704和指向控制逻辑部件706的各条分立的线来阐明。 The brightest is represented by the data lines 702, address lines 704 and pointing control logic unit 706 pieces of separate lines to clarify.

正如本领域内众所周知的,DRAM700包括存储器阵列710,它本身包含行和列的可寻址存储器单元。 As well known in the art, DRAM700 includes a memory array 710, which itself contains rows and columns of addressable memory cells. 同一行上的每个存储器单元与一条公用字线相耦合。 Each memory cell with a common word line coupled to the same line. 这字线与各个晶体管的栅相耦合,此处至少有一个晶体管具与采用前面所述方法和结构形成的含HfAlO3的栅介质相耦合的栅。 This word line coupled to the gate of each transistor, having at least one transistor with a gate dielectric containing HfAlO3 using previously described methods and structures formed by the gate coupled here. 另外,在同一列上的每个存储器单元与一条公用位线相耦合。 Further, each memory cell and a common bit line coupled to the same column. 在存储器阵列710中的每个单元包括本领域内常见的存储电容器和存取晶体管。 Each cell in the memory array 710 include the art of common access transistor and a storage capacitor.

例如,DRAM700通过地址线704和数据线702与微处理机606相连接。 For example, DRAM700 connected via address lines 704 and data lines 702 and 606 microprocessors. 另一方面,DRAM700可以与DRAM控制器,微控制器,芯片装置或其它电子系统相连接。 On the other hand, DRAM700 can be connected to a DRAM controller, a microcontroller, a chip or other electronic systems. 微处理机606还向DRAM700提供许多控制信号,包括但不限于行和列地址选通信号RAS和CAS,写入启动信号WE,输出启动信号OE和其它常规控制信号。 The microprocessor 606 also provides control signals to many DRAM700, including but not limited to the row and column address strobe signal RAS and CAS, write enable signal WE, an output enable signal OE, and other conventional control signals.

行地址缓冲器712和行译码器714接收和译解来自行地址信号的行地址,这行地址信号由微处理机606经地址线704提供。 Row address buffer 712 and row decoder 714 receives and decode the row address signal from the row address, the row address signal 704 which is provided by the microprocessor 606 via address lines. 每个唯一的行地址与存储器阵列710中的一行单元相对应。 Each unique row address memory array 710 corresponds to a row of cells. 行译码器714包括字线驱动器,地址译码器树,和电路系统,这电路系统译出收到的来自行地址缓冲器712的给定行地址以及通过字线驱动器有选择地激活存储器阵列710的适合的字线。 The memory array row decoder 714 includes a word line driver, an address decoder tree, and electrical systems, this circuitry translated received from the row address buffer 712 and a row address given by the word line driver selectively activated Suitable word line 710.

列地址缓冲器716和列译码器718接收和译解通过地址线704提供的列地址信号。 Column address buffer 716 and column decoder 718 receiving and deciphering by the column address signal lines 704 provide. 列译码器718还确定列何时发生了故障和确定置换列的地址。 The column decoder 718 also determines the fault and determine the replacement column address column when occurred. 列译码器718与读出放大器720相耦合。 Column decoder 718 and sense amplifier 720 is coupled. 读出放大器720与存储器阵列710的互补位线对相耦合。 Amplifiers 720 and complementary bit line memory array is read out 710 is coupled to.

读出放大器720与数据输入缓冲器722和数据输出缓冲器724相耦合。 The sense amplifier 720 and the data input buffer 722 and coupled to the data output buffer 724. 数据输入缓冲器722和数据输出缓冲器724均与数据线702相耦合。 Data input buffer 722 and data output buffer 724 are coupled to the data line 702. 在写入运作过程中,数据线702向数据输入缓冲器722提供数据。 In the write operation of the data line 702 to the data input buffer 722 provides data. 读出放大器720接收来自数据输入缓冲器722的数据并将数据储存在存储器阵列710中,以电荷形式储存在地址线704上规定地址处的单元的电容中。 The sense amplifier 720 receives the data buffer 722 and the data stored in the memory array 710 to the charge stored in the form of unit at the address on the address line 704 predetermined capacitance from the data input.

在读出运作过程中,DRAM700将数据从存储器阵列710传输到微处理机606。 In the course readout, DRAM700 the data transferred from the memory array 710 to the microprocessor 606. 在预充电运行期间使存取单元的互补位线平衡于基准电压,该基准电压由平衡电路和基准电压源提供。 During the pre-charging operation so complementary bit line access unit balance to the reference voltage, the reference voltage is provided by the balance circuit and a reference voltage source. 于是,储存在存取单元中的电荷与相关的位线分享。 Thus, the storage access unit in charge share associated with the bit line. 诸读出放大器720的一个读出放大器检测和放大互补位线之间的电压差。 Read-out of a sense amplifier 720 detects and amplifies the voltage difference amplifier complementary bit line. 读出放大器将放大的电压传到数据输出缓冲器724。 The sense amplifier to amplify the voltage transmitted data output buffer 724.

控制逻辑部件706用来控制DRAM700的许多有用的功能。 The control logic unit 706 to control many useful features DRAM700 of. 此外,正如本领域的那些技术人员所熟知的那些用来启动DRAM700并使DRAM700运作保持同步的各种控制电路和信号在本文中没有详述。 Moreover, as those skilled in the art are well known to those used to start DRAM700 and DRAM700 operating holding various control circuits and signals are not described in detail herein synchronized. 如上所述,已对DRAM700的叙述作了简化,以便阐明本发明和没有打算完整叙述DRAM的所有性能。 As described above, it has been simplified for DRAM700 narrative in order to clarify the present invention and not intended for a complete description of all performance DRAM. 本领域的那些技术人员应认识,许多种存储器,包括但不限于,SDRAM,SLDRAM,RDRAM,和其它的DRAM和SRAM,VRAM和EEPROM,均可用于本发明的装置中。 Those skilled in the art will appreciate that many kinds of memory, including but not limited to, SDRAM, SLDRAM, RDRAM, and other DRAM and SRAM, VRAM and EEPROM, can be used in apparatus of the present invention. 文中所描述的DRAM装置仅是为了说明,并没有排他或限制的意图。 DRAM devices described herein are merely illustrative, and not exclusive or limiting his intention.

结论一种含HfAlO3的栅介质和一种制作这一类栅介质的方法生产出了一种可靠的栅介质,它具有的等效氧化物厚度比采用SiO2可能得到的要薄。 Conclusion containing HfAlO3 gate dielectric and a method of making this type of gate dielectric to produce a reliable gate dielectric equivalent oxide thickness thinner than it has adopted SiO2 might get.

使用本文中所述方法形成的HfAlO3栅介质是热力稳定的,以致形成的栅介质在加工过程中与硅衬底或其它结构有极微弱的反应。 Using the method described herein HfAlO3 gate dielectric is formed of heat stable, so as to form the gate dielectric in the process a very weak reaction with the silicon substrate or other structures.

晶体管,高水平IC或器件,和系统是应用了形成超薄等效氧化物厚度teq的栅介质的新颖方法构成的。 Transistors, high-level IC or device, and the system is the application of a novel method of forming a thin gate dielectric equivalent oxide thickness teq constituted. 形成的含HfAlO3的栅介质层或薄膜具有高的介电常数(κ),此处的栅介质的teq能够小于10,小于SiO2栅介质的预定限制值。 HfAlO3 containing gate dielectric layer or film having a high dielectric constant is formed (κ), where the gate dielectric can be less than teq 10, is smaller than the predetermined limit value of the SiO2 gate dielectrics. 同时,HfAlO3层的实体厚度比与SiO2的teq限制值相关的SiO2厚度厚得多。 Meanwhile, the physical thickness HfAlO3 layer is much thicker than SiO2 and SiO2 teq associated limit values. 形成较厚厚度有利于加工栅介质。 A thicker gate dielectric thickness is conducive to working. 此外,通过控制衬底的ALD加工过程中的铪顺序和铝顺序能使形成的含HfAlO3,Al2O3和HfO2的介质的介电常数可在Al2O3的介电常数到HfO2的介电常数范围内选择。 In addition, by controlling the substrate ALD process hafnium aluminum order to make the dielectric constant of the order and containing HfAlO3, Al2O3 and HfO2 medium formed in Al2O3 dielectric constant into the HfO2 dielectric constant range selection.

虽然在本文中已对一些具体的实施方案作了阐明和陈述,但本领域的那些普通技术人员都知道,任何以达到同样目的为目标的方案均可以代替所示的这些具体实施方案。 Although some specific embodiments set forth and statements made in this article, but those of ordinary skill in the art will appreciate that any order to achieve the same purpose as the goal of the program can be replaced by these specific embodiments illustrated. 本申请意图是包含本发明的任何修改或变更。 This application is intended that contain any changes to the present invention. 可以认为上面的叙述是为了用来阐明的而不是限制的。 The above description is considered in order to clarify and not of limitation. 在审阅上面陈述时,上述实施方案和其它的实施方案的组合对本领域的那些技术人员来说是显而易见的。 When reviewing the above statement, combinations of the above embodiments and other embodiments to those skilled in the art is obvious. 本发明的范围包括其中采用了上述结构和制作方法的任何其它申请。 The scope of the invention includes any other applications in which the use of the above-described structure and fabrication method. 本发明的范围应由附于后面的权利要求书,以及与该权利要求书所给予的范围等同的全范围来确定。 The scope of the invention should be rights attached to the back of the claims, and given the scope of the full range of equivalents of the claims to determine.

Referenced by
Citing PatentFiling datePublication dateApplicantTitle
CN101962758A *9 Sep 20102 Feb 2011南京大学Method for forming Hf-based gate medium film on germanium substrate by atomic layer deposition at low temperature
CN101962758B9 Sep 201027 Mar 2013南京大学Method for forming Hf-based gate medium film on germanium substrate by atomic layer deposition at low temperature
CN102099673B7 Jan 20099 Jul 2014罗伯特.博世有限公司Sensor element of a gas sensor
Classifications
International ClassificationH01L21/28, H01L21/316, H01L27/108, H01L27/115, C23C16/40, H01L21/8247, H01L21/8242, H01L29/78, H01L27/10, H01L29/51, H01L29/792, H01L29/788
Cooperative ClassificationH01L21/28194, H01L21/28185, H01L29/518, H01L21/28176, H01L29/513, H01L29/517
European ClassificationH01L29/51B2, H01L21/28E2C2C, H01L21/28E2C2B, H01L29/51M, H01L21/28E2C2D
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8 Jul 2009C14Granted